JPS63217658A - Optical semiconductor device - Google Patents

Optical semiconductor device

Info

Publication number
JPS63217658A
JPS63217658A JP62052316A JP5231687A JPS63217658A JP S63217658 A JPS63217658 A JP S63217658A JP 62052316 A JP62052316 A JP 62052316A JP 5231687 A JP5231687 A JP 5231687A JP S63217658 A JPS63217658 A JP S63217658A
Authority
JP
Japan
Prior art keywords
type
photodiode
layer
integrated circuit
diffused
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62052316A
Other languages
Japanese (ja)
Inventor
Kazuo Yamanaka
山中 一雄
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62052316A priority Critical patent/JPS63217658A/en
Publication of JPS63217658A publication Critical patent/JPS63217658A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1443Devices controlled by radiation with at least one potential jump or surface barrier

Abstract

PURPOSE:To render an adverse effect of electromagnetic wave negligibly small and therefore to dispense with an electromagnetic shield by a method wherein a photodiode and an amplifying circuit are formed on one semiconductor substrate, whereby a monolithic IC is accomplished. CONSTITUTION:A P-type buried layer 7 is diffused into the region of a high resistivity N-type substrate 5 except a photodiode region, the growth of a low resistivity N-type epitaxial layer 2 is performed, and a P-type insulating layer is diffused so as to insulate the photodiode from an integrated circuit and subject a required part of the integrated circuit region to dielectric isolation. A process follows, wherein a P-type base layer 1' is diffused into a P-type anode layer 1 of the photodiode and an integrated circuit part and furthermore, an N-type emitter layer 4 is diffused into the P-type base layer 1' and a photodiode cathode 6 is simultaneously diffused. The photodiode is formed on an N-type substrate, and the integrated circuit is formed as well. The N-type epitaxial layer 2 is formed to be a low resistivity thin layer so that the integrated circuit has the advantage of the high speed operation. By these processes, an electromagnetic shield can be dispensed with.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はPIN型ホトダイオード(以下ホトダイオード
と称す)と集積回路をひとつの半導体基板上に集積させ
た光半導体集積回路装置に関し、特にリモートコントロ
ールの受光部に用いる光半導体集積回路装置に関する。
[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to an optical semiconductor integrated circuit device in which a PIN type photodiode (hereinafter referred to as a photodiode) and an integrated circuit are integrated on one semiconductor substrate, and particularly relates to an optical semiconductor integrated circuit device in which a PIN type photodiode (hereinafter referred to as a photodiode) and an integrated circuit are integrated on a single semiconductor substrate. The present invention relates to an optical semiconductor integrated circuit device used in a light receiving section.

〔従来の技術〕[Conventional technology]

従来、リモートコントロールの受光部は、ホトダイオー
ドとホトダイオードによって受光され電流に変換された
信号を増幅する集積回路装置による混成集積回路で構成
されていた。なぜなら、ホトダイオードはN型の高比抵
抗でかつ厚いエピタキシャル層または半導体基板にP型
不純物を拡散し、これに反し集積回路はP型半導体基板
にN型エピタキシャル層を形成し、次にP型あるいはN
型不純物を拡散している。すなわち、使用する基板が全
く異なるからである。
Conventionally, a light receiving section of a remote control has been configured with a hybrid integrated circuit including a photodiode and an integrated circuit device that amplifies a signal received by the photodiode and converted into an electric current. This is because photodiodes diffuse P-type impurities into an N-type high resistivity and thick epitaxial layer or semiconductor substrate, whereas integrated circuits form an N-type epitaxial layer on a P-type semiconductor substrate and then diffuse P-type or N
Diffusion of type impurities. That is, the substrates used are completely different.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述のように、従来のリモートコントロール受光部は混
成集積回路で構成されている為、ホトダイオードと項中
部を含む集積回路との配線距離が長くなり、電磁波の影
響を受は易く雑音成分のもととなり、誤動作の原因にな
っている。また、入射する光が信号光だけでなく、室内
灯、日光なども入射する為S/N比を恣<シており、電
磁波の影響を助長している。上記の様な電磁的な雑音成
分をとυ込むのを防ぐ為、ホトダイオードと増巾部を含
む集積回路までの配線を短かくしたり、ホトダイオード
の受光面のみを露出させてリモートコントロール受光部
全体を電磁シールドしなければならないといった問題点
があり、小型、安価の市場要求に答えられないといった
短所がある。
As mentioned above, the conventional remote control light receiving section is composed of a hybrid integrated circuit, so the wiring distance between the photodiode and the integrated circuit including the midsection is long, and it is easily affected by electromagnetic waves and is a source of noise components. This causes malfunction. Furthermore, since the incident light is not only signal light but also indoor lights, sunlight, etc., the S/N ratio is arbitrary and the influence of electromagnetic waves is amplified. In order to prevent the introduction of electromagnetic noise components such as those mentioned above, the wiring to the integrated circuit including the photodiode and amplification section is shortened, and only the light receiving surface of the photodiode is exposed to prevent the entire remote control light receiving section from being introduced. There are problems such as the need for electromagnetic shielding, and disadvantages such as the inability to meet market demands for smaller size and lower cost.

〔問題点を解決するための手段〕[Means for solving problems]

本発明の構造は、N型高比抵抗基板とP型埋込層とN型
低比抵抗エビタ千シアル層を有している。
The structure of the present invention includes an N-type high resistivity substrate, a P-type buried layer, and an N-type low resistivity Evitar layer.

〔実施例〕〔Example〕

次に本発明について図面を参照して説明する。 Next, the present invention will be explained with reference to the drawings.

第1図は本発明の一笑翔例の縦断面図である。FIG. 1 is a longitudinal sectional view of one embodiment of the present invention.

高比抵抗のN型基板5のホトダイオードの領域以外の領
域にP型埋込層7を拡散し、次に低比抵抗のN型エピタ
キシャル層2t−成長し、P型絶縁層3を拡散して、ホ
トダイオードと集積回路部を絶縁す込とともに、集積回
路領域の必要な個所を絶縁分離する。その後ホトダイオ
ードのP型アノード層1及び集積回路部にP型ベース層
1′を拡散し、さらにP型ベース層1′にN型エミ、り
層4を拡散する、この時ホトダイオードのカソード6を
同時に拡散しておく。こうすることによJN型基板にホ
トダイオードを形成するとともに集積回路が形成された
ことになる。ここでN型エピタキシャル層2は集積回路
が高速動作に有利な嵌に薄い低比抵抗層とする、これは
、ホトダイオードの空乏層の基板方向の広がり巾を広く
し、高感度を得る為でもある。
A P-type buried layer 7 is diffused in a region other than the photodiode region of a high resistivity N-type substrate 5, and then a low resistivity N-type epitaxial layer 2t is grown, and a P-type insulating layer 3 is diffused. In addition to insulating the photodiode and the integrated circuit section, necessary parts of the integrated circuit area are also insulated and separated. After that, a P-type base layer 1' is diffused into the P-type anode layer 1 and the integrated circuit part of the photodiode, and an N-type emitter layer 4 is further diffused into the P-type base layer 1'.At this time, the cathode 6 of the photodiode is simultaneously diffused. Spread it out. By doing this, a photodiode was formed on the JN type substrate, and an integrated circuit was also formed. Here, the N-type epitaxial layer 2 is a thin, low-resistivity layer that is advantageous for high-speed operation of the integrated circuit.This is also to widen the width of the depletion layer of the photodiode in the substrate direction and obtain high sensitivity. .

〔実施例2〕 第2図は本発明の実施例2の秩断面である。高比抵抗の
N型半導体基板15にP型埋込層17を形成したのち比
較的比抵抗の高いN型エピタキシャル層20を成長しP
型アノード層11とP型ゲート層21t−形成し、N型
ンースN18、N型ドレイン層19を拡散しnチャンネ
ルジャンクションFETを作り込んだものである。N型
エピタキシャル#20の比捻抗を低くする必要がないの
でホトダイオードの空乏層の巾がより広くなるので高感
度が得られ、また、ジャンクシvs y F E Tは
、出力インピーダンスの高いホトダイオードの出力を受
けるのに適している。
[Example 2] FIG. 2 is a cross section of Example 2 of the present invention. After forming a P-type buried layer 17 on an N-type semiconductor substrate 15 with a high resistivity, an N-type epitaxial layer 20 with a relatively high resistivity is grown.
A type anode layer 11 and a P type gate layer 21t are formed, and an N type source N18 and an N type drain layer 19 are diffused to form an n channel junction FET. Since there is no need to lower the specific torsion of N-type epitaxial #20, the width of the depletion layer of the photodiode becomes wider, resulting in higher sensitivity. suitable for receiving.

〔発明の効果〕〔Effect of the invention〕

以上説明したように、本発明はホトダイオードと増巾回
路をひとつの半導体基板く形成しモノリシ、りIC化し
ているので、電磁波による悪影響が無視出来る位小さく
なるので!磁シールドを必要としないという効果がある
As explained above, in the present invention, the photodiode and the amplification circuit are formed on one semiconductor substrate and are made into a monolithic or IC, so the adverse effects of electromagnetic waves are minimized to the point where they can be ignored! This has the effect of not requiring a magnetic shield.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の実施例1の縦断面図、第2図は実施例
2の縦断面図である。 1・・・・・・P型アノード層、2・・・・・・N型エ
ピタキシャル層、3・・・・・・P型絶縁層、4・・・
・・・N型エミツタ層、5・・・・・・N型基板、6・
・・・・・カソード層、7・・・・・・P型埋込層、1
8・・・・・・N型ソース層、19−・・・・・N型ド
レイン層、20・・・・・・N型エピタキシャル膚、2
1・・・・・・P型ゲート層。
FIG. 1 is a vertical cross-sectional view of a first embodiment of the present invention, and FIG. 2 is a vertical cross-sectional view of a second embodiment. 1... P-type anode layer, 2... N-type epitaxial layer, 3... P-type insulating layer, 4...
...N-type emitter layer, 5...N-type substrate, 6.
... Cathode layer, 7 ... P-type buried layer, 1
8... N-type source layer, 19-... N-type drain layer, 20... N-type epitaxial layer, 2
1...P-type gate layer.

Claims (1)

【特許請求の範囲】[Claims] N型高比抵抗半導体基板表面の一部にP型領域を形成し
た後、N型低抵抗層をエピタキシャル成長し、前記P型
領域部に集積回路を形成し、他の領域にPIN型ホトダ
イオード形成したことを特徴とする光半導体装置。
After forming a P-type region on a part of the surface of the N-type high-resistivity semiconductor substrate, an N-type low-resistance layer was epitaxially grown, an integrated circuit was formed in the P-type region, and a PIN-type photodiode was formed in other regions. An optical semiconductor device characterized by:
JP62052316A 1987-03-06 1987-03-06 Optical semiconductor device Pending JPS63217658A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62052316A JPS63217658A (en) 1987-03-06 1987-03-06 Optical semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62052316A JPS63217658A (en) 1987-03-06 1987-03-06 Optical semiconductor device

Publications (1)

Publication Number Publication Date
JPS63217658A true JPS63217658A (en) 1988-09-09

Family

ID=12911377

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62052316A Pending JPS63217658A (en) 1987-03-06 1987-03-06 Optical semiconductor device

Country Status (1)

Country Link
JP (1) JPS63217658A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03111997A (en) * 1989-09-26 1991-05-13 Matsushita Electric Works Ltd Photoelectric smoke sensor
JPH09162378A (en) * 1995-12-13 1997-06-20 Nec Corp Optical semiconductor device
US6208447B1 (en) 1997-02-25 2001-03-27 Matsushita Electric Industrial Co., Ltd. Optical receiver

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH03111997A (en) * 1989-09-26 1991-05-13 Matsushita Electric Works Ltd Photoelectric smoke sensor
JPH09162378A (en) * 1995-12-13 1997-06-20 Nec Corp Optical semiconductor device
US6208447B1 (en) 1997-02-25 2001-03-27 Matsushita Electric Industrial Co., Ltd. Optical receiver

Similar Documents

Publication Publication Date Title
US3293087A (en) Method of making isolated epitaxial field-effect device
US4013489A (en) Process for forming a low resistance interconnect in MOS N-channel silicon gate integrated circuit
JPH0287684A (en) Integrated pin photo detector and method
JPH01205564A (en) Optical semiconductor device and its manufacture
EP0304335A3 (en) Photosensor device
JPH077147A (en) Charge coupled device image sensor
US3595714A (en) Method of manufacturing a semiconductor device comprising a field-effect transistor
US4796073A (en) Front-surface N+ gettering techniques for reducing noise in integrated circuits
JPS63217658A (en) Optical semiconductor device
US6392307B1 (en) Semiconductor device
US4109272A (en) Lateral bipolar transistor
JPS59159560A (en) Semiconductor device
US20060151814A1 (en) Optical semiconductor device
US3582830A (en) Semiconductor device intended especially for microwave photodetectors
JPH0779154B2 (en) Light receiving element with built-in circuit
JPH02196463A (en) Photodetector with built-in circuit
JPS6147664A (en) Semiconductor device
JP3553715B2 (en) Optical semiconductor device
JPS61258471A (en) Semiconductor integrated circuit device
GB1318979A (en) Semiconductor components
KR930008020B1 (en) Cmos inverter and manufacturing method of the same
KR900000816B1 (en) I2l device manufacturing method
JPH04345070A (en) Phototransistor element
JPH02294070A (en) Photodetector built-in integrated circuit device
JPS54149478A (en) Junction type field effect semiconductor device