GB1318979A - Semiconductor components - Google Patents

Semiconductor components

Info

Publication number
GB1318979A
GB1318979A GB5766970A GB5766970A GB1318979A GB 1318979 A GB1318979 A GB 1318979A GB 5766970 A GB5766970 A GB 5766970A GB 5766970 A GB5766970 A GB 5766970A GB 1318979 A GB1318979 A GB 1318979A
Authority
GB
United Kingdom
Prior art keywords
type
regions
region
base region
diffusing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Expired
Application number
GB5766970A
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Siemens AG
Original Assignee
Siemens AG
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Siemens AG filed Critical Siemens AG
Publication of GB1318979A publication Critical patent/GB1318979A/en
Expired legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76Making of isolation regions between components
    • H01L21/761PN junctions
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices
    • H01L21/82Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components
    • H01L21/822Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices to produce devices, e.g. integrated circuits, each consisting of a plurality of components the substrate being a semiconductor, using silicon technology
    • H01L21/8222Bipolar technology
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0821Combination of lateral and vertical transistors only
    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/02Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier
    • H01L27/04Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body
    • H01L27/08Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind
    • H01L27/082Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only
    • H01L27/0823Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components specially adapted for rectifying, oscillating, amplifying or switching and having at least one potential-jump barrier or surface barrier; including integrated passive circuit elements with at least one potential-jump barrier or surface barrier the substrate being a semiconductor body including only semiconductor components of a single kind including bipolar components only including vertical bipolar transistors only
    • H01L27/0826Combination of vertical complementary transistors

Landscapes

  • Engineering & Computer Science (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Manufacturing & Machinery (AREA)
  • Bipolar Transistors (AREA)
  • Bipolar Integrated Circuits (AREA)

Abstract

1318979 Semi-conductor devices SIEMENS AG 4 Dec 1970 [5 Dec 1969] 57669/70 Heading H1K In a semi-conductor device surrounded by an isolating region the distance between a region of the device of the same conductivity type as the isolating region and the underlying part of the isolating region is 5 to 10 Á. This reduces the effect of the parasitic transistor formed by the isolating region and the adjacent device regions. As shown, Fig. 1, P<SP>+</SP>-type regions 3, 4, 5 are formed by diffusing an impurity such as B into an N-type substrate 1 and are surrounded by channel stopper regions 7. An N-type epitaxial layer 6 is then deposited during which process the regions 3, 4, 5 and 7 spread upwards and a P--type layer 8 is formed at the substrate/ epitaxial layer interface due to rapid lateral diffusion and vaporization of impurities from regions 3, 4 and 5. P<SP>+</SP>-type regions 9, 10 and 11 are then diffused into the top surface of the wafer and a pair of complementary transistors are formed by diffusing a P-type base region 17 17 and an N<SP>+</SP>-type emitter region 16 into the N-type collector region 18 isolated by regions 10, 11, 4, 5 and 8, and by diffusing a P<SP>+</SP>-type emitter region 13 into the N-type base region 14 surrounded by P<SP>+</SP>-type collector region 9, 3. If the isolation regions 4, 5, 8 had been replaced by a single buried layer as indicated by dotted line 20 the base region 18 of the parasitic PNP transistor defined by regions 17, 18 and the buried isolation layer (20) would have been of the same order of thickness as the base region 14 of the PNP transistor shown on the left-hand side of the drawing and would therefore have had a high current gain. The actual construction used, however, provides a much thicker base region for the parasitic transistor and thus reduces its current gain to negligible proportions. The invention may also be applied to single diffused or double diffused (pinch) resistors. The substrate and epitaxial layer may alternatively by of P-type conductivity and phosphorus may be utilized to form N-type isolation regions.
GB5766970A 1969-12-05 1970-12-04 Semiconductor components Expired GB1318979A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
DE19691961247 DE1961247A1 (en) 1969-12-05 1969-12-05 Semiconductor component and method for its manufacture

Publications (1)

Publication Number Publication Date
GB1318979A true GB1318979A (en) 1973-05-31

Family

ID=5753171

Family Applications (1)

Application Number Title Priority Date Filing Date
GB5766970A Expired GB1318979A (en) 1969-12-05 1970-12-04 Semiconductor components

Country Status (7)

Country Link
AT (1) ATA1090170A (en)
CH (1) CH515619A (en)
DE (1) DE1961247A1 (en)
FR (1) FR2070742B1 (en)
GB (1) GB1318979A (en)
NL (1) NL7017770A (en)
SE (1) SE369355B (en)

Families Citing this family (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
DE2834719A1 (en) * 1978-08-08 1980-02-14 Siemens Ag SEMICONDUCTOR DEVICE WITH MULTIPLE SEMICONDUCTOR ELEMENTS WITH PN TRANSITIONS UNITED IN A SEMICONDUCTOR CRYSTAL AND FORMING AN INTEGRATED CIRCUIT

Family Cites Families (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR1539043A (en) * 1967-06-30 1968-09-13 Radiotechnique Coprim Rtc Integrated circuit comprising a transistor and its manufacturing process

Also Published As

Publication number Publication date
ATA1090170A (en) 1975-04-15
CH515619A (en) 1971-11-15
DE1961247A1 (en) 1971-06-16
NL7017770A (en) 1971-06-08
FR2070742B1 (en) 1974-10-31
SE369355B (en) 1974-08-19
FR2070742A1 (en) 1971-09-17

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Legal Events

Date Code Title Description
PS Patent sealed
PLNP Patent lapsed through nonpayment of renewal fees