JPS6147664A - Semiconductor device - Google Patents

Semiconductor device

Info

Publication number
JPS6147664A
JPS6147664A JP59169705A JP16970584A JPS6147664A JP S6147664 A JPS6147664 A JP S6147664A JP 59169705 A JP59169705 A JP 59169705A JP 16970584 A JP16970584 A JP 16970584A JP S6147664 A JPS6147664 A JP S6147664A
Authority
JP
Japan
Prior art keywords
signal processing
diffusion layer
processing circuit
section
photodiode
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP59169705A
Other languages
Japanese (ja)
Inventor
Toshibumi Yoshikawa
俊文 吉川
Masaru Kubo
勝 久保
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Sharp Corp
Original Assignee
Sharp Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Sharp Corp filed Critical Sharp Corp
Priority to JP59169705A priority Critical patent/JPS6147664A/en
Publication of JPS6147664A publication Critical patent/JPS6147664A/en
Pending legal-status Critical Current

Links

Classifications

    • HELECTRICITY
    • H01ELECTRIC ELEMENTS
    • H01LSEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L27/00Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate
    • H01L27/14Devices consisting of a plurality of semiconductor or other solid-state components formed in or on a common substrate including semiconductor components sensitive to infrared radiation, light, electromagnetic radiation of shorter wavelength or corpuscular radiation and specially adapted either for the conversion of the energy of such radiation into electrical energy or for the control of electrical energy by such radiation
    • H01L27/144Devices controlled by radiation
    • H01L27/1443Devices controlled by radiation with at least one potential jump or surface barrier

Abstract

PURPOSE:To increase the signal processing rate in a bipolar IC, by implanting ions for the purpose of decreasing the specific resistivity of an epitaxial layer in a signal processing circuit section except a photodiode section. CONSTITUTION:An N type diffusion layer 8 is formed by ion implantation in an N<-> type epitaxial layer 3 of a signal processing circuit section B but not of a photodiode section A. This N type diffusion layer 8 may be contacted with an N<+> buried diffusion layer 2 but should not be contacted with a P<+> isolating diffusion layer 7 in view of voltage resistivity. The ion implanting process is carried out after or during the process of providing the P<+> isolating diffusion layer.

Description

【発明の詳細な説明】 く技術分野〉 本発明はホトダイオード部とその信号処理回路を一体化
したバイポーラICに係る半導体装置に関する。
DETAILED DESCRIPTION OF THE INVENTION Technical Field The present invention relates to a semiconductor device related to a bipolar IC that integrates a photodiode section and its signal processing circuit.

〈従来技術〉 第2図に従来例を示す、Aはホトダイオード部、Bは信
号処理回路部で画部分A、Bが一体化して形成されてい
る。ホトダイオード部AはP型基板1にN9埋込拡散層
2、N型エピタキシャルN3゜P44拡散4. N+拡
散層6が層状に形成されて構成される。
<Prior Art> A conventional example is shown in FIG. 2, where A is a photodiode section, B is a signal processing circuit section, and image sections A and B are formed integrally. The photodiode section A includes a P-type substrate 1, an N9 buried diffusion layer 2, an N-type epitaxial N3°P44 diffusion 4. The N+ diffusion layer 6 is formed in layers.

また信号処理回路部BはP型基板1にN+埋込拡散層2
、N型エピタキシャル層3.P11拡散4、N0拡散層
5,6が層状に形成されて構成される。7はP1分離拡
散層である。
In addition, the signal processing circuit section B has an N+ buried diffusion layer 2 on a P type substrate 1.
, N-type epitaxial layer 3. The P11 diffusion layer 4 and the N0 diffusion layers 5 and 6 are formed in layers. 7 is a P1 separation diffusion layer.

ところでホトダイオードと信号処理回路を一体化したバ
イポーラICを高速化する場合、ホトダイオード部と信
号処理回路部のそれぞれを高速化する必要がある。その
ためには一般的にはホトダイオード部はその容量の低減
を図る必要があり、信号処理回路部は小数キャリアの蓄
積時間の低減が必要である。しかしながら、従来はこの
ような必要性を満した半導体装置の提供がなされていな
かった。
By the way, when increasing the speed of a bipolar IC that integrates a photodiode and a signal processing circuit, it is necessary to increase the speed of each of the photodiode section and the signal processing circuit section. To this end, it is generally necessary to reduce the capacitance of the photodiode section, and it is necessary to reduce the accumulation time of minority carriers in the signal processing circuit section. However, conventionally, no semiconductor device has been provided that meets these needs.

く目的〉 本発明はホトダイオードと信号処理回路を一体化したバ
イポーラICに係る半導体装置において高速化を実現で
きる装置の提供を目的とする。
Purpose of the present invention An object of the present invention is to provide a device that can realize higher speed in a semiconductor device related to a bipolar IC that integrates a photodiode and a signal processing circuit.

く構成〉 本発明者らは上記目的を達成するために、上記第1図に
おけるホトダイオード部AON型エピタキシャルN3の
比抵抗を大きくすることによりホトダイオード部の容量
を低減でき、また信号処理回路部BON型エピタキシャ
ル層3の比抵抗を小さくすることにより信号処理回路部
Bの小数キャリアの蓄積時間を低減できることに着目し
た結果、本発明をなした。すなわち、本発明はホトダイ
オード部とその信号処理回路部を一体化したバイポーラ
1.Cにおいて、ホトダイオード部以外の信号処理回路
部のエピタキシャル層の比抵抗をイオン注入により低下
させたことを特徴とする半導体装置である。
In order to achieve the above object, the present inventors have made it possible to reduce the capacitance of the photodiode section by increasing the specific resistance of the photodiode section AON type epitaxial N3 in FIG. The present invention was achieved by focusing on the fact that the accumulation time of minority carriers in the signal processing circuit section B can be reduced by reducing the resistivity of the epitaxial layer 3. That is, the present invention provides a bipolar 1.1. The semiconductor device in C is characterized in that the specific resistance of the epitaxial layer of the signal processing circuit section other than the photodiode section is lowered by ion implantation.

〈実施例〉 第1図は本発明の半導体装置の実施例を示す断面図であ
る。第1図中において第1図の符号と同じ符号は同じ層
ないし領域を示すものとする。
<Embodiment> FIG. 1 is a sectional view showing an embodiment of a semiconductor device of the present invention. In FIG. 1, the same reference numerals as those in FIG. 1 indicate the same layers or regions.

ずな゛わち本発明はホトダイオード部Aを除いた信号処
理回路部BのN−型エピタキシャル層3内にイオン注入
によりN型拡散層8を形成している。
That is, in the present invention, the N type diffusion layer 8 is formed in the N- type epitaxial layer 3 of the signal processing circuit section B excluding the photodiode section A by ion implantation.

このN型拡散N8はN4埋込拡散層2とタッチさビても
よい。またN型拡散層8は耐圧の点よりP+分離拡散層
7とはタッチさせないのがよい。イオン注入は2種類以
上のイオンを注入してもよい。
This N-type diffusion N8 may touch the N4 buried diffusion layer 2. Further, from the viewpoint of breakdown voltage, it is preferable that the N-type diffusion layer 8 not touch the P+ isolation diffusion layer 7. In the ion implantation, two or more types of ions may be implanted.

また信号処理部では必要に応じてイオン注入しない部分
を作ってもよい。
Further, in the signal processing section, a portion where ions are not implanted may be created as necessary.

イオン注入の工程はP“分離拡散層工程後、又はP+分
離拡散工程中に行なう。が、他の適当な時期に行なって
もよい。
The ion implantation process is performed after the P'' isolation diffusion layer process or during the P+ isolation diffusion process, but may be performed at any other suitable time.

またイオン注入の他の通常の不純物拡散によりN型拡散
層8を形成することも可能であるが、一般的に不純物濃
度は低濃度であり、またバラツキを低減する必要もある
からイオン注入がよい。
It is also possible to form the N-type diffusion layer 8 by ordinary impurity diffusion other than ion implantation, but ion implantation is preferable since the impurity concentration is generally low and it is also necessary to reduce variations. .

〈効果〉 本発明は以上の構成よりなり、ホトダイオード部とその
信号処理回路部を一体化したバイポーラICにおいて、
ホトダイオード部以外の信号処理回路部のエピタキシャ
ル層の比抵抗をイオン注入により低下させたので、ホト
ダイオードと信号処理回路を一体化したバイポーラIC
において、信号処理速度の高速化が達成できた。
<Effects> The present invention has the above-described configuration, and in a bipolar IC in which a photodiode section and its signal processing circuit section are integrated,
Since the specific resistance of the epitaxial layer in the signal processing circuit section other than the photodiode section has been lowered by ion implantation, it is possible to create a bipolar IC that integrates the photodiode and signal processing circuit.
, we were able to achieve faster signal processing speed.

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本発明の半導体装置の実施例を示す断面図、第
2図は従来の半導体装置の断面図である。 A−’ホトダイオード部 B・・・信号処理回路部 3・・・エピタキシャル層 8・・・N型拡散層
FIG. 1 is a sectional view showing an embodiment of the semiconductor device of the present invention, and FIG. 2 is a sectional view of a conventional semiconductor device. A-' Photodiode section B... Signal processing circuit section 3... Epitaxial layer 8... N-type diffusion layer

Claims (1)

【特許請求の範囲】[Claims] ホトダイオード部とその信号処理回路部を一体化したバ
イポーラICにおいて、ホトダイオード部以外の信号処
理回路部のエピタキシャル層の比抵抗をイオン注入によ
り低下させたことを特徴とする半導体装置。
1. A semiconductor device comprising a bipolar IC that integrates a photodiode section and its signal processing circuit section, characterized in that the specific resistance of an epitaxial layer of the signal processing circuit section other than the photodiode section is lowered by ion implantation.
JP59169705A 1984-08-13 1984-08-13 Semiconductor device Pending JPS6147664A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP59169705A JPS6147664A (en) 1984-08-13 1984-08-13 Semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP59169705A JPS6147664A (en) 1984-08-13 1984-08-13 Semiconductor device

Publications (1)

Publication Number Publication Date
JPS6147664A true JPS6147664A (en) 1986-03-08

Family

ID=15891344

Family Applications (1)

Application Number Title Priority Date Filing Date
JP59169705A Pending JPS6147664A (en) 1984-08-13 1984-08-13 Semiconductor device

Country Status (1)

Country Link
JP (1) JPS6147664A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63122164A (en) * 1986-11-11 1988-05-26 Pioneer Electronic Corp Optical sensor integrated circuit
JPS63182874A (en) * 1987-01-24 1988-07-28 Hamamatsu Photonics Kk Semiconductor photodetector
US5252851A (en) * 1991-01-30 1993-10-12 Sanyo Electric Co., Ltd. Semiconductor integrated circuit with photo diode
JP2006128724A (en) * 2006-01-23 2006-05-18 Toshiba Corp Solid-state imaging device

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS63122164A (en) * 1986-11-11 1988-05-26 Pioneer Electronic Corp Optical sensor integrated circuit
JPS63182874A (en) * 1987-01-24 1988-07-28 Hamamatsu Photonics Kk Semiconductor photodetector
US5252851A (en) * 1991-01-30 1993-10-12 Sanyo Electric Co., Ltd. Semiconductor integrated circuit with photo diode
JP2006128724A (en) * 2006-01-23 2006-05-18 Toshiba Corp Solid-state imaging device

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