JPS63214456A - Kanji-character generator - Google Patents

Abstract

PURPOSE:To freely set the address of an apparent KANJI, by storing address shift data in an address shift data memory and converting an input address signal to an internal address signal on reference to said data by an address shift converting circuit. CONSTITUTION:A user preliminarily programs the necessary address difference between an internal address and an external address in an address data memory 2 on the basis of an address data program signal to store the same in the address shift data memory 2 and an address shift converting circuit 1 shifts an input address signal 4 on the basis of the address shift data signal 6 showing the above mentioned address difference sent from the address shift data memory 2 to convert the same to an internal address signal 7. The internal address signal 7 is applied to an ROM part 3 which in turn outputs an output signal 8. By the above mentioned constitution, the user can freely set an apparent address.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a kanji character generator, and in particular to a kanji character generator.
The present invention relates to a kanji character generator in which kanji data is stored in a memory according to an IS or the like.

[Conventional technology]

Traditionally, in kanji character generators where the addresses of this type of kanji data are determined by JIS, the addresses of kanji data in memory must be made to match the JIS addresses, and the internal addresses and input addresses must match JIS. Only the kanji data array is made equal to the JIS array, and the entire array is moved to some part of the memory.
The input address was set to an internal address that was different from the JIS address.

[Problem that the invention seeks to solve]

In the conventional kanji character generator described above, either the address of the kanji data in the memory is made equal to the JIS address and the internal address and the input address are made equal, or the arrangement of the kanji data in the memory is made equal to the JIS arrangement and the input address is made equal. Because the kanji character generators are aligned with the internal addresses, the address arrangement is different even though the kanji data held in the memory is the same, so it is necessary to create different kinds of kanji character generators each with different internal data. However, there was a drawback in that the user had to be careful about the Kanji address of the Kanji character generator being used and add an address input signal suitable for that type of Kanji character generator. Furthermore, since the Kanji address is fixed, when the user uses the Kanji character generator in a subset, there is a drawback that the user must also be careful about the address signals used in other circuits.

In contrast to the conventional Kanji character generator described above, the present invention has an original content in that the user can freely set the apparent address.

[Means for solving problems]

The kanji character generator of the present invention includes an address shift data memory for storing address shift data, an address shift conversion circuit for shifting an input address signal using the address shift data and converting it into an internal address signal, and an address shift conversion circuit for converting the input address signal into an internal address signal. and a memory from which the stored kanji data is read out.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram of one embodiment of the present invention. 1 is an address shift conversion circuit, and 2 is an address shift data memory, which uses UV-PROM. 3 is a ROM section which corresponds to a conventional Kanji character generator. 4 is an input address signal, 5 is an address shift data program signal, 6 is an address shift data signal, 7 is an internal address signal, and 8 is an output signal.

First, the user programs (writes) in advance the address difference between the required internal address and external address into the address shift data memory 2 using the address data program signal 5, and stores the address difference in the address shift data memory 2. The address shift conversion circuit 1 shifts the input address signal 4 and converts it into an internal address signal 7 using the address shift data signal 6 sent from the address shift data memory 2 and indicating the above-mentioned address difference. Internal address signal 7 is applied to ROM section 3, and RO
The M section 3 outputs an output signal 8.

FIG. 2 is a block diagram of another embodiment of the invention. 9 is an address shift conversion circuit, and 10 is an address shift data memory using EEFROM. Reference numeral 11 represents a ROM section, which corresponds to a conventional Kanji character generator, and reference numeral 17 represents an inverter.

Further, 12 is an input address signal and address shift data signal, 13 is a WE (write enable) signal, 14 is an address shift data signal, 15 is an internal address signal, and 16 is an output signal.

The user can make the address shift data memory 10 programmable by applying the WE signal 13 in advance or just before using it as a Kanji character generator, and input the input address signal/address shift data signal 12 as an address shift data signal to the address shift data memory 10. When used as a Kanji character generator, the input address signal/address shift data signal 12 is added to the address shift conversion circuit 9 as an input address signal without adding the WE scratch signal. The address shift conversion circuit 9 uses an address shift data signal 12.
is shifted by the address shift data signal 14 and converted into an internal address signal 15. Internal address signal '15
is added to the ROM section 11, and the ROM section 11 receives the output signal 16.
Output.

In the case of this embodiment, E is stored in the address shift data memory 10.
Since EPROM is used, the user can electrically rewrite the address shift data, and the WE signal 13
It has the advantage that it can be easily rewritten by controlling the input address signal/address shift data signal 12.

〔Effect of the invention〕

As explained above, in the present invention, the user stores address shift data in the address shift data memory, and the address shift conversion circuit converts the input address signal into an internal address signal by referring to the address shift data. This has the effect of allowing the user to set the address in kanji as per their convenience.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of one embodiment of the Kanji character generator of the present invention, and FIG. 2 is a block diagram of another embodiment of the present invention.

Claims (1)

[Claims] an address shift data memory for storing address shift data, an address shift conversion circuit for shifting an input address signal using the address shift data and converting it into an internal address signal, and reading out the stored kanji data using the internal address signal. A kanji character generator comprising a memory.