JPS63209238A - System for supervising stuff multiplexing device - Google Patents

System for supervising stuff multiplexing device

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Publication number
JPS63209238A
JPS63209238A JP4034187A JP4034187A JPS63209238A JP S63209238 A JPS63209238 A JP S63209238A JP 4034187 A JP4034187 A JP 4034187A JP 4034187 A JP4034187 A JP 4034187A JP S63209238 A JPS63209238 A JP S63209238A
Authority
JP
Japan
Prior art keywords
parity
stuff
bit
circuit
stuff pulse
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP4034187A
Other languages
Japanese (ja)
Inventor
Hideto Miyamoto
秀人 宮本
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP4034187A priority Critical patent/JPS63209238A/en
Publication of JPS63209238A publication Critical patent/JPS63209238A/en
Pending legal-status Critical Current

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  • Time-Division Multiplex Systems (AREA)

Abstract

PURPOSE:To reduce the scale of a supervisory circuit and to improve reliability by adding a bit of parity information to a stuff pulse in a multiplexing format and checking a parity bit. CONSTITUTION:Stuffing is executed by the 'misalignment' of a phase difference and a stuff pulse is inserted in accordance with a high-order group multiplexing format. The stuff pulse is used as a parity bit, the number of marks of the data bit until the stuff pulse is inserted is counted, and in the case of an even number, '1' is inserted as the parity bit or '0' is inserted. Respective low-order group signals count the number of marks in parity checking circuits 81, 82-8n, check an even parity or an odd parity and obtain the matching with the parity bit. Here, when a hard fault exists, the matching cannot be obtained and the can be discovered.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はディジタル通信方式に使用されるスタッフ多重
化装置の装置障害を監視する方式に係り、特に公認のフ
レームフォーマット全変更することなく、したがって、
特性に影響を及ぼすことなく監視が行えるスタッフ多重
化装置の監視方式に関するものである。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a system for monitoring equipment failures in stuff multiplexing equipment used in digital communication systems, and in particular to a system for monitoring equipment failures in stuff multiplexing equipment used in digital communication systems, and in particular, for monitoring equipment failures without changing the entire approved frame format. ,
The present invention relates to a method for monitoring a stuff multiplexing device that allows monitoring to be performed without affecting its characteristics.

〔従来の技術〕[Conventional technology]

従来のスタッフ多重化装置の監視方式の一例を第2図に
示し説明する。
An example of a conventional monitoring method for a stuff multiplexer is shown in FIG. 2 and will be described.

図において%11,1!・・・・1nは低次群入力信号
が印加される入力端子、21 p 21 ・・・・2n
はスタッフ回路、3は多重化回路、4は分離回路、5.
In the figure %11,1! ...1n is an input terminal to which a low-order group input signal is applied, 21 p 21 ...2n
3 is a stuffing circuit, 3 is a multiplexing circuit, 4 is a separation circuit, 5.
.

5、・・・・5nはデスタッフ回路、a、、6.・・・
・6nは比較回路、Tは高次群出力信号が得られる出力
端子である。
5, . . . 5n is a destuffing circuit, a, 6. ...
- 6n is a comparison circuit, and T is an output terminal from which a high-order group output signal is obtained.

そして、入力信号全多重化回路3で多重化した後、その
多重化信号を再度復調1〜元の入力信号に復元し比較回
路61〜6nで入力信号と比較、相違がないかどうかの
照合を行う工うに構成されて℃する。
After multiplexing in the input signal full multiplexing circuit 3, the multiplexed signal is demodulated again to the original input signal and compared with the input signal in the comparison circuits 61 to 6n to check whether there is any difference. The process to be performed is configured as follows.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のスタッフ多重化装置の監視方式では、ハ
ードウェアの量が主信号の多重化回路と同規模程度とな
ジ、コストが高くつき、また、実装スペースが大きくな
り、監視回路の信頼度が悪くなるという問題点があった
In the conventional stuff multiplexer monitoring method described above, the amount of hardware is about the same scale as the main signal multiplexing circuit, so the cost is high, the mounting space is large, and the reliability of the monitoring circuit is low. There was a problem that it deteriorated.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のスタッフ多重化装置の監視方式は、スタッフ多
重化装置のフレームフォーマット上のスタップパルスに
パリティ情報を付加し、そのパリティビットを監視する
ことに工p自装置のハード障害を診断し得るようにした
ものである。
The stuff multiplexer monitoring method of the present invention adds parity information to the stap pulse on the frame format of the stuff multiplexer, and monitors the parity bit so that hardware failures in the equipment itself can be diagnosed. This is what I did.

〔作 用〕[For production]

本発明においては、多重化フォーマットの中のスタッフ
パルスにパリティ情報を付加し、そのパリティビットを
チェックすることにより多重化回路のハードウェアの障
害全監視する・ 〔実施例〕 以下、図面に基づき本発明の実施例を詳細に説明する。
In the present invention, parity information is added to the stuff pulse in the multiplex format, and all failures in the hardware of the multiplex circuit are monitored by checking the parity bit. Examples of the invention will be described in detail.

第1図は本発明によるスタッフ多重化装置の監視方式の
一実施例を示すブロック図である。
FIG. 1 is a block diagram showing an embodiment of a monitoring method for a stuff multiplexer according to the present invention.

この第1図において第2図と同一符号のものは相当部分
を示し、8Hp B!・・・・8nはパリティチェック
回路である。
In Fig. 1, the same reference numerals as in Fig. 2 indicate corresponding parts, and 8Hp B! ...8n is a parity check circuit.

つぎにこの第1図に示す実施例の動作を説明する。Next, the operation of the embodiment shown in FIG. 1 will be explained.

まず、入力端子1、〜1nに印加された低次群入力信号
は多重化回路3からのクロック信号にエフスタッフ回路
2.〜2nKエク同期化されるが、そのとき、位相差の
1ずれlにエフスタッフインクが行なわれ、高次群多重
化フォーマットにしたがってスタッフパルスが挿入され
る。このスタッフパルスは受信側の装置において消去さ
れるため、そのビットのマーク信号%l l、スペース
信号%01の規定は行なわれてい々い。
First, the low-order group input signals applied to the input terminals 1, . ~2nK E-synchronization is performed, at which time E-stuff ink is performed for a phase difference of 1, and stuff pulses are inserted according to the higher-order group multiplexing format. Since this stuff pulse is erased in the receiving side device, the mark signal %l_l and space signal %01 of that bit need not be defined.

そこで、このスタッフパルスをパリティビットとして使
用し、スタッフパルスが挿入されるまでのデータビット
のマークの数をカウントし、偶数ならパリティビットと
して* I  ft′挿入(奇パリティ方式)、または
10′を挿入(偶ハIJティ方式)する工うに決めてお
く。
Therefore, this stuff pulse is used as a parity bit, the number of data bit marks is counted until the stuff pulse is inserted, and if the number is even, *I ft' is inserted as a parity bit (odd parity method), or 10' is inserted. I decided to insert it (even high IJ tee method).

つぎに、この工うに多重化回路3にLv多重化された信
号は、本装置より送出されるが、一方、一部は監視系に
分岐され、分離回路4にエフ逆変換され、低次群信号に
分離される。ここで、各低次群信号はパリティチェック
回路8..8.〜8nにおいて、マークの数をカウント
し、偶パリティまたは奇パリティのチェックを行い、バ
リテイビットとの整合をとる。ここで、もし、ハード障
害(ハードウェアの障害)がある場合には、その整合が
とれな(なり、障害の発見が可能となる。
Next, the signals Lv-multiplexed into the multiplexing circuit 3 in this way are sent out from this device, but on the other hand, a part is branched to the monitoring system, is inversely F-transformed to the separation circuit 4, and is converted into a low-order group. Separated into signals. Here, each low-order group signal is processed by a parity check circuit 8. .. 8. ~8n, the number of marks is counted, even parity or odd parity is checked, and consistency with the validity bit is determined. Here, if there is a hardware failure (hardware failure), the consistency will be lost and the failure can be discovered.

〔発明の効果〕〔Effect of the invention〕

以上説明した工うに、本発明は、多重化フォーマットの
中のスタッフパルスにパリティ情報全付加し、そのパリ
ティビットをチェックすることにより、多重化回路のハ
ードウェアの障害を監視する方式であり、監視回路の規
模を縮少することができ、信頼度も良くすることができ
る効果がある。
As explained above, the present invention is a method for monitoring hardware failures in a multiplexing circuit by adding all parity information to stuff pulses in a multiplexed format and checking the parity bit. This has the effect of reducing the scale of the circuit and improving reliability.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明にLるスタッフ多重化装置の監視方式の
一実施例を示すブロック図、第2図は従来のスタッフ多
重化装置の監視方式の一例を示すブロック図である。 21〜2n・・・・スタッフ回路、3・―・・多重化回
路、4・・・・分離回路、8.〜8n・・・・パリティ
チェック回路。
FIG. 1 is a block diagram showing an embodiment of a monitoring method for a stuff multiplexer according to the present invention, and FIG. 2 is a block diagram showing an example of a monitoring method for a conventional stuff multiplexer. 21-2n...stuff circuit, 3...multiplexing circuit, 4...separation circuit, 8. ~8n...Parity check circuit.

Claims (1)

【特許請求の範囲】[Claims] スタッフ多重化装置のフレームフォーマット上のスタッ
フパルスにパリティ情報を付加し、そのパリティビット
を監視することにより自装置のハード障害を診断し得る
ようにしたことを特徴とするスタッフ多重化装置の監視
方式。
A monitoring method for a stuff multiplexer, characterized in that parity information is added to the stuff pulse on the frame format of the stuff multiplexer, and by monitoring the parity bit, it is possible to diagnose hardware failures in the stuff multiplexer itself. .
JP4034187A 1987-02-25 1987-02-25 System for supervising stuff multiplexing device Pending JPS63209238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP4034187A JPS63209238A (en) 1987-02-25 1987-02-25 System for supervising stuff multiplexing device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP4034187A JPS63209238A (en) 1987-02-25 1987-02-25 System for supervising stuff multiplexing device

Publications (1)

Publication Number Publication Date
JPS63209238A true JPS63209238A (en) 1988-08-30

Family

ID=12577925

Family Applications (1)

Application Number Title Priority Date Filing Date
JP4034187A Pending JPS63209238A (en) 1987-02-25 1987-02-25 System for supervising stuff multiplexing device

Country Status (1)

Country Link
JP (1) JPS63209238A (en)

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