JPS63208375A - Output circuit for charge coupled device - Google Patents

Abstract

PURPOSE:To improve S/N by providing a synchronizing detector or the like demodulating an extracted modulation component and a BPF extracting a side band component (modulation component) so as to eliminate noise included in the output signal of the charge coupled device. CONSTITUTION:The output signal of a charge coupled device CCD 9 is amplified by a preamplifier 10 and fed to a BPF 11. The BPF 11 extracts the distributed side band component (modulation component) by using the clock pulse frequency fc in the distributed modulation component in the high frequency region as a carrier frequency. The modulation component and the detection carrier having a frequency fc equal to that of a transfer clock pulse from a driving circuit 13 at synchronizing detector 12 are subjected to synchronizing detection and demodulation. Then the output of the detector 12 is subjected to high frequency component rejection of the LPF 14 and an objective signal is obtained. In this case, since the noise is reduced at a high frequency region being the pass band of the BPF 11, the modulation component with less noise is obtained from the BPF 11, resulting that a signal whose S/N is improved is obtained from the LPF 14.

Description

DETAILED DESCRIPTION OF THE INVENTION (Industrial Application Field) The present invention relates to a signal processing method for a charge-coupled device, and more particularly to an output circuit that removes noise from a gated charge-integrating output circuit.

(Conventional technology) FIG. 3(a) shows a charge coupled device (hereinafter abbreviated as COD).

) is a schematic circuit diagram showing an example of an output circuit. CCD
There is a COD near one transfer electrode 2 of the transfer channel 1.
A detection diode 3 is provided for detecting the signal charge transferred by and converting it into an output voltage. Transfer lock voltage 41. The signal charge transferred by the transfer electrode 4 to which ≠2 is applied is 1 of the transfer clock pulse.
It flows into the detection diode 3 every cycle and changes its potential. This potential change is received by the buffer circuit 5, and the output is taken out to the outside. Gate 7 of reset transistor 6
A reset pulse φ8 is applied at a period equal to the transfer clock pulse to turn on the reset transistor 6, thereby resetting the potential of the detection diode 3 to the reference potential. This output circuit is formed on a common semiconductor substrate together with the CCD transfer channel 1 to constitute a CCD 9. This output circuit is well known as a gated charge integration type output circuit.

In this gated charge integrating output circuit, the reset transistor 6 produces a certain amount of reset noise as described below. In other words, FIG. 3(b) is a waveform diagram showing the operating waveforms of each part of the gated charge integration type output circuit in FIG. 3(a), and the reset pulse φ is applied from time t0 to time t. When the reset transistor 6 is turned on, the potential of the detection diode 3 rises to the drain voltage of the reset transistor 6 (■). Next, when the reset transistor 6 is turned off at time t, the potential of the detection diode 3 changes between the detection diode 3 and the buffer circuit 5.
A constant reference potential V is determined by two capacitances: the capacitance 8 corresponding to the sum of the gate capacitance of the reset transistor 6 and the gate-source capacitance of the reset transistor 6. Next, at time t8, the signal charge is completely transferred to the detection diode 3 and flows into the detection diode 3, changing its potential to obtain the output voltage vS. By the way, while the reset transistor 6 is conductive from time t0 to t□, the reset transistor 6 generates a certain amount of noise E. occurs. This noise E. Nyotte reference potential v0
is influenced and changes. For example, as shown in FIG. 3(b), each time the reset pulse φR is completely applied, v0→■. →
...and becomes a reset noise.

This reset noise causes the output voltage V to fluctuate and the output S/N to deteriorate.

Furthermore, the reset transistor 6 is not the only noise source that generates noise in the output circuit shown in FIG. 3(a), but the buffer circuit 5 is also a noise source that generates random noise. The random noise Vb generated by the buffer circuit 5 is a noise called 1/f noise with a large low frequency component.

One way to remove this reset noise and 1/f noise and improve the S/N is to set the reference potential ■ at time t. is clamped to a certain constant potential, and then at time t4 the output voltage V
, is well known as the correlated double sampling method.

13= (Problems to be Solved by the Invention) In the conventional technology described above, the noise that can be removed by the correlated double sampling method is limited to the low-frequency components of reset noise and 17f noise. In other words, when trying to remove noise using the correlated double sampling method, when the reference potential v0 is clamped to a certain constant potential, the clamping effect occurs at time t under the influence of the random V included in the output batch. However, at this time, due to the clamping operation, the random noise V at that point cannot be sampled, causing aliasing distortion, and when the output voltage vs is sampled at time t4, the output voltage containing the random noise V is similarly sampled. As a result, aliasing distortion is generated by sampling the random noise V, also at this time.

In other words, although the conventional correlated double sampling method can remove the reset noise generated by the reset transistor, it cannot remove all the random noise generated by the buffer circuit, resulting in a poor S/N ratio. there were.

41. The present invention eliminates the above-mentioned conventional drawbacks, and provides an output circuit for a charge-coupled device that can eliminate both reset noise and random noise contained in the output signal of a COD and improve the S/N ratio. With the goal.

(Means for Solving the Problems) Means provided by the present invention to solve the above-mentioned problems are: outputting a signal with an amplitude corresponding to the reference potential and the signal charge for each cycle of the transfer clock pulse; A circuit that receives the amplitude signal from a charge-coupled device having a gated charge integration type output circuit and extracts a signal expressed by the signal charge:
The bandpass filter includes a bandpass filter that receives an amplitude signal, and a synchronous detector that receives the output of the bandpass filter; the bandpass filter has the frequency of the transfer clock pulse as a center frequency, and the synchronous detector The method is characterized in that a signal expressed by the signal charge is extracted by performing synchronous detection using a frequency signal as a demodulated carrier.

(Function) In order to solve the above-mentioned conventional problems, the present invention
The output signal obtained in synchronization with the transfer clock pulse is passed through a bandpass filter whose center frequency is the frequency fc of the transfer clock pulse, at the frequency f of the transfer clock pulse. is the carrier frequency, the modulation component amplitude-modulated by the signal component is extracted, and this is synchronously detected at the carrier frequency, and the synchronously detected output is obtained as an output from which noise has been removed.

When the modulation components as described above are extracted and synchronous detection is performed, low-frequency 17f noise is removed by a bandpass filter, and noise other than the vicinity of the carrier frequency can be removed by synchronous detection. According to the configuration described above, there is no sampling system,
Therefore, S due to aliasing distortion of sampling as mentioned above
The drawback of /H deterioration is solved.

(Example) Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a block diagram showing an embodiment of the output circuit of a charge-coupled device according to the present invention.

In the figure, an output signal obtained from a CCD 9 is amplified by a preamplifier 10 and then supplied to a bandpass filter 11 whose center frequency is the frequency fc of the transfer clock pulse. The high frequency component extracted by the bandpass filter 11 is then supplied to a synchronous detector 12. Synchronous detector 12
The frequency f is equal to the transfer clock pulse from the drive circuit 13 which supplies clock pulses to drive the CCD 9. detection carriers are supplied. The detected demodulated signal obtained from the synchronous detector 12 is then supplied to a low-pass filter 14 to remove high frequency components and obtain signal components.

FIG. 2 is a schematic diagram showing the frequency spectrum of the output signal obtained from the CCD 9 to explain the operation of the output circuit in FIG. 1.

As shown in FIG. 2, the output signal obtained from the output circuit of the CCD 9 has a frequency fa of 172 of the frequency fc of the transfer clock pulse. Signal components are distributed in the baseband band below (Nyquist frequency), while in the high frequency region, carriers with frequencies that are integral multiples of the clock pulse frequency fc are modulated by the signal component, and the number of modulations = 7- is distributed. ing. Furthermore, the broken line in FIG. 2 indicates the frequency spectrum of the noise component contained in the output signal. As shown in the figure, the noise component is 1/f noise which is large in the low frequency range and decreases in the high frequency range.

Next, referring to FIGS. 1 and 2, the output signal of the CCD 9 is amplified by a preamplifier 10, and then a bandpass filter 11
can be supplied to. The bandpass filter 11 has a sideband component (out of the modulation components distributed in the high frequency region, the frequency fc of the clock pulse is distributed as a carrier frequency), as shown by the dashed line in FIG.
The characteristics are selected to extract the modulation component).

Next, the modulated component is synchronously detected and demodulated by a synchronous detector 12 using a detection carrier having a frequency fc equal to the transfer clock pulse supplied from the drive circuit 13. The output of the synchronous detector 12 is passed through a low-pass filter 14 to remove high frequency components and obtain the desired signal.

As mentioned above, noise is reduced in the high frequency region that is the pass band of the band pass filter 11, so a modulation component with less noise is obtained from the band pass filter 11, and as a result, the S/N is improved from the low pass filter 14. A signal is obtained.

As described above, the present invention improves the S/N by extracting sideband components (modulation components) from the CCD output signal when removing noise components contained in the COD output signal.

(Effects of the Invention) As explained above, according to the present invention, it is possible to remove the noise generated by the gated charge integration type output circuit of the COD without using a lamp circuit or a sample circuit as in the prior art. Therefore, it is possible to obtain a signal with a good S/N ratio without aliasing distortion.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the output circuit of the charge-coupled device of the present invention, FIG. 2 is a schematic diagram showing the frequency spectrum of the output signal obtained from the CCD 9 in FIG. 1, and FIG. 3(a) 1 is a schematic circuit diagram showing an example of a conventional COD output circuit, and FIG. 2B is a waveform diagram showing various signals in the conventional CCD output circuit. 1... COD transfer channel, 2, 4... transfer electrode,
3... Detection diode, 5... Buffer circuit, 6
... Reset transistor, 7... Gate electrode, 8
... Capacity, 9... Charge coupled device (CCD), 10.
・・Front neck amplifier, 11 ・・Band pass filter, 12
...Synchronous detector, 13...ffi rotation L 14...
・Low pass filter.

Claims (1)

[Claims] Receiving the amplitude signal from a charge-coupled device having a gated charge integration type output circuit that outputs a signal with an amplitude corresponding to the reference potential and the signal charge every cycle of the transfer clock pulse, and extracting a signal expressed by the signal charge. A circuit comprising: a bandpass filter that receives an amplitude signal; and a synchronous detector that receives the output of the bandpass filter; the bandpass filter has the frequency of the transfer clock pulse as a center frequency, and the synchronous detector An output circuit for a charge-coupled device, characterized in that a signal having a frequency of a transfer clock pulse is used as a demodulated carrier to perform synchronous detection and extract a signal expressed by the signal charge.