JPS63204722A - Manufacture of semiconductor integrated circuit - Google Patents

Abstract

PURPOSE:To improve the alignment precision of pattern by a method wherein alignment marks are detected by optically scanning multiple parts of an alignment mark. CONSTITUTION:Different two positions of alignment marks 104A, 104B in X, Y direction are scanned by laser beams. For example, when any one alignment mark is detected to be defective, one signal wave from 108A out of two signals 107A, 108A transmitted from a mark end is disturbed making it impossible to detect a central line 111 in a correct position. In such a case, further different positions are scanned by laser beams to obtain another wave form 108B, a composite mean of normal wave form 108 and disturbed wave form 108A. Resultantly, a middle point 111B between a wave form 108B and another wave form 107B is to recognize the correct position.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a method for manufacturing a semiconductor integrated circuit, and particularly to alignment of circuit patterns in the manufacturing process.

[Conventional technology]

In order to transfer the pattern of a semiconductor integrated circuit to a predetermined location on a semiconductor substrate, special alignment marks made on the semiconductor substrate in the previous manufacturing process are detected and the position on the semiconductor substrate is accurately grasped. Must-have.

In recent exposure apparatuses, this alignment is almost automatically performed, and there are various detection methods. However, as a means of detection, first, a laser beam is scanned over the alignment mark on the semiconductor substrate, and the optical signal reflected from there is inspected with a photodetector, which is converted into an electrical signal and processed. detecting the exact location of.

As a laser light source, He-Ne laser, He-Cd
A laser is used, and the beam shape is circular, oval, slit, etc. In many cases, the laser beam scans the same part of the alignment mark multiple times, and the multiple The system takes in multiple optical signals and finally averages those signals.

[Problem that the invention seeks to solve]

The above-mentioned alignment mark detection means in the conventional semiconductor integrated circuit manufacturing process scans the laser beam on the same part of the alignment mark, so if there is a defect in this mark, for example, the defect The detection signal is disturbed and accurate position detection becomes impossible. That is, even if multiple scans are performed, the influence of mark defects cannot be reduced.

Furthermore, since alignment marks are formed during each manufacturing process, there may be nonuniformity in mark shape depending on the position inside the semiconductor substrate, and slight differences in mark shape between different semiconductor substrates, such as within a wafer, within a lot, or between lots. There are variations between them. This non-uniformity leads to variations in detection accuracy when the same portion of the alignment mark is scanned and detected, and there is a drawback that highly accurate alignment cannot be achieved.

SUMMARY OF THE INVENTION An object of the present invention is to provide a method for manufacturing a semiconductor integrated circuit, which eliminates the above-mentioned drawbacks and allows accurate pattern alignment.

[Means for solving problems]

A method for manufacturing a semiconductor integrated circuit according to the present invention is a method for manufacturing a semiconductor integrated circuit in which alignment marks formed on a semiconductor substrate are optically detected and patterns are aligned, the method comprising:
Detection of the alignment mark is performed by optically scanning multiple parts of the alignment mark.

〔Example〕

Next, the present invention will be explained with reference to the drawings.

FIG. 1 is a plan view of a chip area for explaining a first embodiment of the present invention.

In FIG. 1, circuit patterns are transferred onto a semiconductor wafer and are divided into chip areas 103 by scribe lines 102. In FIG. A circuit pattern (not shown) is provided within this chip area 103.
, an X-direction alignment mark 104A, and a Y-direction alignment mark 104B.

First, when the alignment mark 104A in the X direction is scanned at two different locations with a laser beam, the traces of the beam are shown by arrows 106. Y-direction alignment mark 104
The same process is performed for B.

FIGS. 2(a) to 2(c) show examples of signal waveforms as a result of scanning the laser beam.

As shown in FIG. 2(a), there is no particular problem if the signals coming from the alignment mark are almost ideal, that is, the two signals 107 coming from the edges of the alignment mark.
, 108 or the midpoint 111 of the center lines 109 and 110 can be recognized as the position of the alignment mark.

However, as shown in FIG. 2(b), for example, if there is a defect in the alignment mark, the signal waveform 108A of one of the two signals 107A and 108A coming from the edge of the mark is disturbed, and its center line 111A is distorted. It may not be possible to detect the correct position. In this case, the laser beam is scanned at different locations. That is, the same alignment mark 10
The second result is the result of scanning different parts of 4A with a laser beam.
If (a>, (b)), the signal shown in Fig. 2 (c) can be obtained by combining and averaging them. Fig. 2 (
The waveform 108B in C) is the normal waveform 108 in FIG. 2(a).
is the composite average of the disturbed waveform 108A in FIG.
This means that B recognizes a more correct position of the mark than the intermediate point 111A in FIG. 2(b).

In this example, the case where the beam scanning position is set to two positions of the alignment mark has been explained, but as the number of scanning positions increases, the influence of the disturbed waveform due to the mark defect decreases, so that the true mark position can be detected. .

FIG. 3 is a plan view of a chip area for explaining a second embodiment of the present invention, in which alignment marks 104 in the X direction are shown.
A, 104C and Y direction alignment marks 104B, 10
This is a case where 4D is detected. Arrow 106 in FIG. 3 indicates the scanning trace of the laser beam.

In this way, by scanning the container portion of the four alignment marks, the number of scans is four times each in the X direction and the Y direction, and since the scan positions are at different locations within the chip area, The influence of non-uniformity, variation, etc. in the shape of alignment marks during the wafer manufacturing process can be reduced. Furthermore, since the scanning directions of the beams are opposite within the same mark, it is possible to reduce the influence of differences between both ends of the alignment mark.

Incidentally, in the above embodiment, a case has been described in which laser beam scanning is performed at two locations for the same alignment mark, but this is not limited to two locations, and the pattern alignment accuracy improves as more locations are scanned.

〔Effect of the invention〕

As explained above, according to the present invention, multiple parts of the alignment mark are optically scanned to detect the mark position, so even if there is a defect in a part of the alignment mark, the influence of the defect is minimized. However, this has the effect of improving pattern alignment accuracy.

The present invention is particularly effective when the alignment mark detection signal is small.
It is also extremely effective in cases where reflection is strong and the metal film is easily affected by the adverse effects of metal grain boundaries.

[Brief explanation of the drawing]

FIG. 1 is a plan view of the chip area for explaining the first embodiment of the present invention, FIGS. 2(a) to (c) are signal waveform diagrams when scanning alignment marks, and FIG. FIG. 7 is a plan view of a chip area for explaining a second embodiment of the present invention. 102... Scribe line, 103... Chip area,
104A to 104D... Alignment marks, 106...
・Laser beam scanning trace, 107, 107A, 107B
, 108.108A, 108B... signal waveform, 109
．． 109A, 109B, 110.11OA, 110B・
...Center of signal waveform, 111. IIIA, 11B...
Midpoint of the signal waveform. Agent Patent Attorney Susumu Uchihara r□□□人・r

Claims (1)

[Claims] In a semiconductor integrated circuit manufacturing method in which pattern alignment is performed by optically detecting alignment marks formed on a semiconductor substrate, the detection of the alignment marks is performed by optically scanning multiple parts of the alignment marks. A method for manufacturing a semiconductor integrated circuit, characterized in that the manufacturing method is performed by: