JP2797195B2 - Semiconductor wafer alignment method - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION [Summary] The present invention relates to a semiconductor wafer alignment method suitable for performing projection reduction exposure when manufacturing a semiconductor device. A reticle having a rectangular reticle window and a wafer having a pattern in which dots are displaced in a stepwise manner corresponding to the longitudinal direction of the reticle window with the purpose of enabling high-accuracy superposition with the reticle. A semiconductor wafer having an alignment mark formed thereon is opposed to the semiconductor wafer or one of the light is irradiated onto the wafer alignment mark through the reticle window while irradiating the wafer alignment mark with light. The semiconductor wafer is moved in a direction perpendicular to the longitudinal direction of the alignment mark to It is configured to perform alignment between c and the reticle.

[Industrial applications]

The present invention relates to a semiconductor wafer alignment method suitable for performing projection reduction exposure when manufacturing a semiconductor device.

2. Description of the Related Art With the miniaturization of patterns in semiconductor devices, there is an increasing demand for improving the accuracy of superposition in the field of photolithography.

[Conventional technology]

In order to meet the above demand, a mark (pattern) formed on the surface of the semiconductor wafer is irradiated with light through a reticle, and scattered light, which is reflected light from an edge of the mark, is detected by a detector. Has been realized to automatically superimpose a semiconductor wafer and a reticle.

In this case, the mark, that is, the wafer alignment mark is a linear pattern, and scanning is performed with light that has passed through a slit-shaped reticle window in a direction perpendicular to the pattern, and an edge of the pattern is formed. It detects the generated scattered light.

[Problems to be solved by the invention]

In the conventional technique, the entire edge of the wafer alignment mark, that is, all of the scattered light appearing from one edge is simultaneously detected by the detector in one scanning, so that the signal waveform is as follows. Once it rises, there is little change, that is, it becomes dull without sharp peaks. Therefore, it is difficult to perform high-accuracy superposition, and stable productivity cannot be obtained.

The present invention seeks to enable high-precision overlay by making simple modifications to the pattern of wafer alignment marks.

[Means for solving the problem]

In the semiconductor wafer alignment method according to the present invention, a reticle (for example, reticle 4) having a rectangular reticle window (for example, reticle window 4A).
And a wafer alignment mark (eg, a wafer alignment mark) having a pattern in which dots (eg, square dots 2X ₁ , 2X _2, ...) Are arranged in a stepwise manner corresponding to the longitudinal direction of the reticle window. The semiconductor wafer on which the mark 2) is formed (for example, the semiconductor wafer 1) is opposed to the semiconductor wafer or one of the light while irradiating the wafer alignment mark with light through the reticle window. The semiconductor wafer and the reticle are aligned by moving in a direction perpendicular to the longitudinal direction of the reticle window and the wafer alignment mark.

[Action]

By adopting the above means, the wafer alignment
Since the detector output obtained by detecting the scattered light generated at the edge of the mark has a sharp peak, it is easy to superimpose the semiconductor wafer and the reticle with high accuracy, which is effective for forming a fine pattern. is there.

〔Example〕

FIG. 1 is an explanatory view of a principal part showing a semiconductor wafer, a reticle, and other arrangement relations for explaining a case where the present invention is carried out.

In the figure, 1 is a semiconductor wafer, 2 is a semiconductor wafer 1
Wafer alignment mark provided on the surface of
Denotes a detector, 4 denotes a reticle, 4A denotes a reticle window, and 5 denotes an optical fiber.

FIG. 2 is a plan view of a main part of the wafer alignment mark.

In the figure, 2X indicates a wafer alignment mark corresponding to the X direction, and 2Y indicates a wafer alignment mark corresponding to the Y direction.

As is clear from the figure, the wafer alignment marks 2X or 2Y are formed by arranging square dots in a state of being shifted stepwise.

FIG. 3 is a plan view of a main part of the reticle window.

In the figure, 4AX indicates a reticle window corresponding to the X direction, and 4AY indicates a reticle window corresponding to the Y direction.

In this embodiment, the light from the optical fiber 5 irradiates the wafer alignment mark 2 on the semiconductor wafer 1 through the reticle window 4A in the reticle 4. Is mounted on an XY stage (not shown), and can be arbitrarily moved in the X and Y directions. It is needless to say that the semiconductor wafer 1 may be fixed and the reticle 4 and thus the light may be moved.

When the semiconductor wafer 1 is moved in the X direction for superposition, 2X is used as a wafer alignment mark, and 4AX is made to correspond to the reticle window. That is, the semiconductor wafer 1 is moved in the X direction while irradiating the light from the optical fiber 5 to the wafer alignment mark 2X through the reticle window 4AX.

FIG. 4 is a plan view of an essential part for explaining a case in which the above-mentioned movement, that is, scanning is performed, and FIGS.
The same symbols as those used in the drawings indicate the same parts or have the same meanings.

In the figure, 2X ₁ , 2X ₂ ,..., 2X _n indicate square dots constituting the wafer alignment mark 2X, and 4AX indicates a reticle window.

Here, a case in which the wafer alignment mark 2X and the reticle window 4AX are overlapped with each other will be described.

Now, it is assumed that the semiconductor wafer 1 on the XY stage, that is, the wafer alignment mark 2X moves in the arrow direction, that is, the X direction.

In this case, among the full-width dots forming the wafer alignment mark 2X, first the reticle window 4A
To reach X is an edge of the square dots 2X _1. Therefore, at that time, the scattered light from the edge of one square dot is detected by the detector 3. Then, scattered light generated edge of the square dots 2X ₂ has reached, thus, the detector 3 will detect the scattered light from the at edge square dots two minutes. In this way,
As the wafer alignment mark 2X is moved, the amount of scattered light detection increases one after another, and in the state shown in the figure, scattered light from the edges of all square dots is detected. Reach peak. After that, the detection amount of the scattered light gradually decreases to zero by following a completely reverse course.

FIG. 5 is a diagram for explaining the output of the detector. The horizontal axis represents the relative positional relationship between the wafer alignment mark 2X and the reticle window 4AX, and the vertical axis represents the output level of the detector 3. Are each taken.

As can be seen from the figure, since the output of the detector has a considerably sharp peak, it is possible to superimpose the semiconductor wafer 1 and the reticle 4 with high accuracy.

FIG. 6 is a diagram for explaining the variation in the superposition, in which the horizontal axis represents the measurement points and the vertical axis represents the deviation amount. FIG. 6A shows the case according to the present invention, that is,
Data obtained when using a wafer alignment mark having a pattern in which square dots are arranged in a stepwise manner as shown in FIG. 2, and FIG. 2 (B) shows a case according to the prior art, that is, a straight bar shape. Are data obtained when a wafer alignment mark is used.

As is clear from the figure, the shift amount is much smaller in the case of the present invention.

FIG. 7 is a diagram for explaining the output of the detector when the data shown in FIG. 6 is obtained, and the same symbols as those used in FIG. Shall have the same meaning.

In the figure, Figure 6 is a characteristic line OT ₁ (A) to the found output at detector when obtaining the data, ie, in the case where depending on the present invention, also, the characteristic line OT ₂ second Fig. 6 (B)
The detector output when the data seen in
That is, each of the cases according to the prior art is shown.

Characteristic line OT ₁ is a characteristic curve itself can be seen in Figure 5, also, the characteristic line OT ₂ be those obtained by the means described in the section of [Prior Art], once, after I get up Since only a slow change is seen, its peak, and therefore,
In order to determine the point where the semiconductor wafer 1 and the reticle 4 are completely overlapped, it takes time and skill to increase the variation.

In the above-described embodiment, the XY stage on which the semiconductor wafer 1 is mounted is moved for scanning the wafer alignment mark. However, it is also possible to move the light while the semiconductor wafer 1 is fixed. Is as described above.

FIG. 8 is an explanatory view of a principal part showing a positional relationship between a semiconductor wafer, a reticle, and other components for explaining another embodiment of the present invention. The same symbols as those used in FIG. Indicate parts or have the same meaning.

In the figure, 3A indicates a first detector, 3B indicates a second detector, and 6 indicates a mirror which can be rotated as indicated by an arrow.

FIG. 9 is a plan view of an essential part for explaining a case where scanning is performed, and the same symbols as those used in FIG. 4 indicate the same parts or have the same meanings.

In the figure, LB indicates a light beam focused to a predetermined size.

FIG. 10 is a diagram for explaining the output of the detector. The horizontal axis indicates the relative positional relationship between the signal obtained from the reticle alignment mark and the signal obtained from the wafer alignment mark, and The axis shows the output level of the detector.

In FIG, OT _R1 and OT _R2 signal output from the reticle alignment mark is detected by the detector 3A, OT
_W is the wafer alignment detected by detector 3B.
The signal output from the mark is shown.

In the present embodiment, as shown in FIG. 8, by rotating the mirror 6 as shown in FIG.
Scanning is performed by moving the LB. The scattered light generated by irradiating the reticle alignment mark 4B with the light beam LB is detected by the detector 3A, and the scattered light generated by irradiating the wafer alignment mark 2 is Detected by detector 3B. Finally, the signals detected by the detectors 3A and 3B are combined, and the signals of the detector 3B are aligned with reference to the output of the detector 3A. That is,
As shown in Figure 10, output based on signal from reticle alignment mark 4B detected by detector 3A
OT _R1 and OT center based on signals from the wafer alignment marks 2 detected by the detector 3B output between _R2
In which OT _W is alignment of the wafer 1 as it appears. In this embodiment, the reticle alignment
If the mark 4B has the same pattern as the wafer alignment mark 2X in the present invention, the alignment accuracy is further improved.

〔The invention's effect〕

In a semiconductor wafer alignment method according to the present invention, a reticle having a reticle window and a wafer alignment mark having a pattern in which dots are arranged in a stepwise manner corresponding to the longitudinal direction of the reticle window are formed. And moving one of the semiconductor wafer and the light in a direction perpendicular to the longitudinal direction of the reticle window and the wafer alignment mark while irradiating the wafer alignment mark with light. Thus, alignment between the semiconductor wafer and the reticle is performed.

By adopting the above configuration, the wafer alignment
Since the detector output obtained by detecting the scattered light generated at the edge of the mark has a sharp peak, it is easy to perform high-accuracy superposition of the semiconductor wafer and the reticle, which is effective for forming a fine pattern. is there.

[Brief description of the drawings]

FIG. 1 is a principal part explanatory view showing a semiconductor wafer, a reticle, and other arrangement relations for explaining a case where the present invention is implemented;
FIG. 2 is a plan view of a main part of the wafer alignment mark,
FIG. 3 is a plan view of a main part of the reticle window, FIG. 4 is a plan view of a main part for explaining movement, ie, scanning, and FIG. 5 is a diagram for explaining output of the detector. FIG. 6 is a diagram for explaining the variation in the superposition, FIG. 7 is a diagram for explaining the output of the detector when the data shown in FIG. 6 is obtained, and FIG. FIG. 9 is a main part explanatory view showing a semiconductor wafer, a reticle, and other arrangement relations for explaining another embodiment of the present invention. FIG. 9 is a main part plan view for explaining a case where scanning is performed. FIG. 10 shows a diagram for explaining the output of the detector. In the figure, 1 is a semiconductor wafer, 2 is a wafer alignment mark provided on the surface of the semiconductor wafer 1, 2X is a wafer alignment mark corresponding to the X direction, and 2Y is a wafer alignment mark corresponding to the Y direction. Reference numeral 3 denotes a detector, 4 denotes a reticle, 4A denotes a reticle window, 4AX denotes a reticle window corresponding to the X direction, 4AY denotes a reticle window corresponding to the Y direction, and 5 denotes an optical fiber.

──────────────────────────────────────────────────続 き Continued on front page (58) Field surveyed (Int.Cl. ⁶ , DB name) H01L 21/027

Claims (1)

(57) [Claims] A reticle having a rectangular reticle window and a semiconductor wafer having a wafer alignment mark having a pattern in which dots are displaced in a stepwise manner corresponding to the longitudinal direction of the reticle window are opposed to each other. Irradiating the wafer alignment mark with light through the reticle window and applying either the semiconductor wafer or the light to the reticle window and the wafer.
A method for aligning a semiconductor wafer with a reticle by moving the alignment mark in a direction orthogonal to the longitudinal direction of the alignment mark.