JPH02288218A - Alignment of semiconductor wafer - Google Patents

Abstract

PURPOSE:To superpose a semiconductor wafer and a reticle with high accuracy by simply changing the pattern of a wafer-alignment-mark. CONSTITUTION:A reticle (such as a reticle 4) with rectangular reticle-windows (such as reticle-windows 4A) and a semiconductor wafer (such as a semiconductor wafer 1) to which a wafer-alignment-mark (such as a wafer-alignment-mark 2) having a pattern, which is made to correspond in the longitudinal direction of the reticle-windows and in which dots (such as square-shaped dots 2X1, 2X2...) are displaced and arranged in a stepped form, is shaped are faced oppositely. Either one of the semiconductor wafer or light is moved in the direction orthogonal to the longitudinal direction of the reticle-windows and the wafer-alignment- mark while the wafer-alignment-mark is irradiated with light through the reticle- windows, and the semiconductor wafer and the reticle are aligned.

Description

[Detailed Description of the Invention] [Summary] Regarding a semiconductor wafer alignment method suitable for performing projection reduction exposure when manufacturing semiconductor devices, a simple modification is made to the pattern of the wafer alignment mark, and the semiconductor wafer and The purpose is to enable high-precision overlay with a reticle, and we use a reticle with a rectangular reticle window and a wafer with a pattern in which dots are staggered in correspondence with the longitudinal direction of the reticle window. The semiconductor wafers on which alignment marks are formed are placed facing each other, and the semiconductor wafer or one of the semiconductor wafers is placed between the reticle window and the wafer while irradiating the wafer alignment marks with light through the reticle window. The semiconductor wafer and the reticle are aligned by moving in a direction perpendicular to the longitudinal direction of the alignment mark.

[Industrial application field]

The present invention relates to a semiconductor wafer alignment method suitable for performing projection reduction exposure when manufacturing semiconductor devices.

With the miniaturization of patterns in semiconductor devices, photo
There is an increasing demand for improving overlay accuracy in the field of lithography.

[Conventional technology]

In order to meet the above requirements, a mark (pattern) formed on the surface of a semiconductor wafer is irradiated with light through a reticle, and a detector detects the scattered light that is reflected from the edges of the mark, and the detection signal is Technology has been realized for automatically overlaying semiconductor wafers and reticles by processing them.

In that case, the mark, i.e. wafer alignment
The mark is a linear pattern, and scanning is performed with light passing through a slit-shaped reticle window in a direction perpendicular to the pattern, and scattered light generated at the edges of the pattern is detected.

[Problem to be solved by the invention]

In the conventional technique, the entire edge of the wafer alignment mark, that is, all the scattered light appearing from the edge of the book, is simultaneously detected by the detector in - times of scanning, so the signal waveform is as follows. - Once it rises, there is little change, that is, it becomes dull with no sharp peaks. Therefore, it is difficult to perform highly accurate overlaying, and stable productivity cannot be obtained.

The present invention attempts to enable highly accurate overlay by making simple modifications to the pattern of wafer alignment marks.

[Means to solve the problem]

In the semiconductor wafer alignment method according to the present invention, a rectangular reticle window (e.g.
reticle with window 4A) (e.g. reticle 4)
and dots corresponding to the longitudinal direction of the reticle window (for example, square screwdrivers) 2X+, 2Xz...
A semiconductor wafer (e.g., semiconductor wafer 1) on which a wafer alignment mark (e.g., wafer alignment mark 2) having a pattern in which wafer alignment marks (such as While irradiating the wafer alignment mark with light, either the semiconductor wafer or the light is moved in a direction perpendicular to the longitudinal direction of the reticle window and the wafer alignment mark to align the semiconductor wafer and the reticle. configuration to perform alignment.

[Effect]

By adopting the above method, the output of the detector obtained by detecting the scattered light generated at the edge of the wafer alignment mark has a sharp peak, so that the semiconductor wafer and the reticle can be aligned with high precision. This facilitates the formation of fine patterns and is effective for forming fine patterns.

〔Example〕

FIG. 1 is an explanatory diagram of main parts showing the arrangement of a semiconductor wafer, a reticle, and other components for explaining the case of implementing the present invention.

In the figure, ■ indicates a semiconductor wafer, 2 indicates a wafer alignment mark provided on the surface of the semiconductor wafer 1, 3 indicates a detector, 4 indicates a reticle, 4A indicates a reticle window, and 5 indicates an optical fiber. .

FIG. 2 shows a plan view of essential parts of the wafer alignment mark.

In the figure, 2X is the wafer alignment mark corresponding to the X direction, and 2Y is the wafer alignment mark corresponding to the X direction.
Each mark is shown.

As is clear from the figure, the wafer alignment mark 2X or 2Y consists of rectangular dots arranged in a stepped manner.

FIG. 3 shows a plan view of essential parts of the reticle window.

In the figure, 4AX indicates a reticle window corresponding to the X direction, and 4AY indicates a reticle window corresponding to the X direction.

In this embodiment, the light from the optical fiber 5 is arranged to illuminate the wafer alignment mark 2 on the semiconductor wafer 1 through the reticle window 4A in the reticle 4, so that the light from the optical fiber 5 illuminates the wafer alignment mark 2 on the semiconductor wafer 1. is the X-Y stage (
(not shown) and can be moved arbitrarily in the X and Y directions. Of course, the semiconductor wafer 1 may be fixed and the reticle 4 and therefore the light may be moved.

When the semiconductor wafers 1 are moved in the X direction and overlaid, 2X is used as the wafer alignment mark, and 4AX is made to correspond to it as the reticle window. That is, the light from the optical fiber 5 is directed through the reticle window 4AX to the wafer alignment mark 2X.
The semiconductor wafer 1 is moved in the X direction while being irradiated with light.

FIG. 4 shows a plan view of the main parts for explaining the case of performing the above-mentioned movement, that is, scanning, and the same symbols as those used in FIGS. 1 to 3 indicate the same parts or shall have the same meaning.

In the figure, 2X+, 2Xz, . . . , 2X, 1 represent square dots constituting the wafer alignment mark 2X, and 4AX represents the reticle window.

Here, a case will be described in which the wafer alignment mark 2X and the reticle window 4AX are made to correspond and are overlaid.

Now, it is assumed that the semiconductor wafer 1 on the XY stage, and hence the wafer alignment mark 2X, moves in the direction of the arrow, that is, in the X direction.

In this case, of the full-width dots that make up the wafer alignment mark 2X, the reticle window 4
It is the edge of the square dot 2XI that reaches AX.

Therefore, at that point, the detector 3 detects the scattered light from the edges of the individual rectangular drivers I. Next, the edge of the square dot 2Xχ arrives and generates scattered light, so the detector 3 detects the scattered light from the edge of the square dot of the two bones. In this way, as the wafer alignment mark 2x is moved, the amount of detected scattered light increases one after another, and in the state shown in the figure, scattered light from the edges of all square dots is detected. It will reach its peak. After this, the process is completely reversed, and the detected amount of scattered light gradually decreases to zero.

Figure 5 is a diagram for explaining the output of the detector.
The horizontal axis represents the relative positional relationship between the wafer alignment mark 2X and the reticle window 94AX, and the vertical axis represents the output level of the detector 3.

As can be seen from the figure, since the output of the detector has a fairly sharp peak, it is possible to superimpose the semiconductor wafer 1 and the reticle 4 with high accuracy.

FIG. 6 is a diagram for explaining the variation in overlay, in which the horizontal axis shows the measurement points and the vertical axis shows the deviation amount, and (A) shows the case according to the present invention, that is, The data obtained when using a wafer alignment mark with a stepwise pattern of square dots as shown in Figure 2, and (B) shows the data obtained when using the prior art, that is, the straight bar-shaped wafer alignment mark. This is data obtained when using a wafer alignment mark that forms a wafer alignment mark.

As is clear from the figure, the amount of deviation is smaller in the case of the present invention.

Figure 7 shows a diagram for explaining the output of the detector when the data shown in Figure 6 is obtained, and the same symbols as those used in Figure 5 represent the same parts or shall have the same meaning.

In the figure, the characteristic line OT is the output of the detector when the data shown in FIG. Figure 6 (B
), respectively, show the output of the detector when obtaining the data shown in FIG.

The characteristic line OT is the characteristic line itself seen in FIG. Since only slow changes are observed, its peak, therefore,
Determining the point where the semiconductor wafer 1 and the reticle 4 are completely overlapped requires time and skill, and the variation becomes large.

In the above embodiment, the X-Y stage on which the semiconductor wafer 1 is placed is moved to scan the wafer alignment mark, but it is also possible to keep the semiconductor wafer 1 fixed and move the light. As mentioned above.

FIG. 8 is an explanatory diagram of main parts showing the arrangement relationship of a semiconductor wafer, a reticle, and others for explaining another embodiment of the present invention, and the same symbols as those used in FIG. 1 are the same. indicate a part or have the same meaning.

In the figure, 3A indicates a first detector, 3B a second detector, and 6 a rotatable mirror as shown by the arrows.

FIG. 9 shows a plan view of the main parts for explaining the case of scanning, and the same symbols as those used in FIG. 4 indicate the same parts or have the same meanings.

In the figure, LB indicates a light beam focused to a predetermined size.

Figure 10 is a diagram for explaining the output of the detector.The horizontal axis shows the relative positional relationship between the signal obtained from the reticle alignment mark and the signal obtained from the wafer alignment mark. The output level of the detector is measured on each axis.

In the figure, OT, and OT R2 are detector 3A.
OTw indicates the signal output from the reticle alignment mark detected by the detector 3B, and OTw indicates the signal output from the wafer alignment mark detected by the detector 3B.

In this embodiment, as shown in FIG. 8, by rotating the mirror 6, the light beam L is
Scanning is performed by moving B. Further, the scattered light generated when the light beam LB irradiates the reticle alignment mark 4B is detected by the detector 3A, and the scattered light generated when the wafer alignment mark 2 is irradiated is detected by the detector 3A. Detected by detector 3B. Finally, the signals detected by the detectors 3A and 3B are combined, and the signal from the detector 3B is aligned with the output to the detector 3 as a reference. That is, as seen in FIG.
At the center between the output OT*+ based on the signal from the reticle alignment mark 4B detected at A and OT R2, there is an output OTt based on the signal from the wafer alignment mark 2 detected by the detector 3B. The wafer 1 is aligned so that it appears. In this example, reticle alignment mark 4
B is also the wafer alignment mark 2X in the present invention.
If the same pattern is used, the alignment accuracy will be further improved.

〔Effect of the invention〕

In the semiconductor wafer alignment method according to the present invention, a wafer alignment mark is formed that has a reticle having a reticle window and a pattern in which dots are staggered in correspondence with the longitudinal direction of the reticle window. moving either the semiconductor wafer or the light in a direction perpendicular to the longitudinal direction of the reticle window and the wafer alignment mark while irradiating the wafer alignment mark with light; The semiconductor wafer and reticle are aligned using the following steps.

By adopting the above configuration, the output of the detector obtained by detecting the scattered light generated at the edge of the wafer alignment mark has a sharp peak, so that the semiconductor wafer and the reticle can be aligned with high precision. This facilitates the formation of fine patterns and is effective for forming fine patterns.

[Brief explanation of drawings]

FIG. 1 is an explanatory diagram of main parts showing the arrangement of semiconductor wafers, reticles, and other components for explaining the case of implementing the present invention;
Figure 2 is a plan view of the main part of the wafer alignment mark.
Fig. 3 is a plan view of the main part of the reticle window, Fig. 4 is a plan view of the main part to explain the case of movement, that is, scanning, and Fig. 5 is a diagram to explain the output of the detector. , Figure 6 is a diagram to explain the variation in overlay, Figure 7 is a diagram to explain the output of the detector when the data shown in Figure 6 is obtained, and Figure 8 is a diagram to explain the output of the detector when the data shown in Figure 6 is obtained. A main part explanatory diagram showing the arrangement relationship of a semiconductor wafer, a reticle, and others for explaining another embodiment of the present invention, FIG. 9 is a main part plan view for explaining the case of scanning, FIG. 10 shows diagrams for explaining the outputs of the detectors. In the figure, 1 is a semiconductor wafer, 2 is a wafer alignment mark provided on the surface of semiconductor wafer 1, and 2X
is a wafer alignment mark corresponding to the X direction, 2Y is a wafer alignment mark corresponding to the Y direction, 3 is a detector, 4 is a reticle, 4A is a reticle window,
4AX indicates a reticle window corresponding to the X direction, 4AY indicates a reticle window corresponding to the Y direction, and 5 indicates an optical fiber. Patent applicant: Fujitsu Limited (one other person) Representative Patent Attorney: Shoji Aitani Representative Patent Attorney: Hiroshi Watanabe - Plan view of essential parts of wafer alignment mark Figure 2 Plan view of essential parts of reticle window Steel 3 Figure 1Figure 5Figure 8Figure 7Figure 7A plan view of the main parts to explain the case of scanningFigure 9A diagram to explain the output of the detectorFigure 10

Claims (1)

[Claims] A reticle having a rectangular reticle window and a semiconductor wafer having a wafer alignment mark formed thereon having a pattern in which dots are staggered in correspondence with the longitudinal direction of the reticle window are placed facing each other. and directing either the semiconductor wafer or the light to the reticle window and the wafer alignment mark while irradiating the wafer alignment mark with light through the reticle window.
A semiconductor wafer alignment method comprising aligning the semiconductor wafer and a reticle by moving in a direction perpendicular to the longitudinal direction of an alignment mark.