JPS63204340A - Circuit for measuring covering rate of program - Google Patents

Circuit for measuring covering rate of program

Info

Publication number
JPS63204340A
JPS63204340A JP62036487A JP3648787A JPS63204340A JP S63204340 A JPS63204340 A JP S63204340A JP 62036487 A JP62036487 A JP 62036487A JP 3648787 A JP3648787 A JP 3648787A JP S63204340 A JPS63204340 A JP S63204340A
Authority
JP
Japan
Prior art keywords
address
microprogram
memory
value
count value
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP62036487A
Other languages
Japanese (ja)
Inventor
Shozo Iida
飯田 昌三
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP62036487A priority Critical patent/JPS63204340A/en
Publication of JPS63204340A publication Critical patent/JPS63204340A/en
Pending legal-status Critical Current

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  • Debugging And Monitoring (AREA)

Abstract

PURPOSE:To estimate the detail operation of a microprogram, by providing a pass memory and a count value arithmetic circuit, and storing the number of times of passing of each address of the microprogram. CONSTITUTION:A pass memory 103, after being cleared to all 0s at the time of starting up, stores a counted value which represents the number of times of passing in an address corresponding to each address of a memory 101 for storing the microprogram. The count value arithmetic circuit 104 reads out the counted value of the address from the pass memory 103 by the readout address of the memory 101 for storing the microprogram held in an address register 102, and adds (1) on the value, and rewrites an added value on the same address again. In such a way, it is possible to find the number of times of passing of a microinstruction with the same address by analyzing the value of the pass memory, and to estimate the detail operation of the microprogram.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明はマイクロプログラム制御の情報処理装置に間す
る。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram-controlled information processing device.

〔従来の技術〕[Conventional technology]

現在、稼動している情報処理装置のほとんどがマイクロ
プログラム制御により作動しているが。
Most of the information processing devices currently in operation are controlled by microprograms.

従来、マイクロプログラムの網羅率測定に関する技術は
ほとんどなく、あっても、マイクロプログラム格納用メ
モリの各アドレスに対して初期値″Onのフラグを持ち
、マイクロ命令が実行されると、そのマイクロ命令のア
ドレスに対応するフラグを′″1″にするというもので
あった。
Conventionally, there are few techniques for measuring the coverage rate of microprograms, and even if there were, there would be a flag with an initial value of "On" for each address in the memory for storing microprograms, and when a microinstruction is executed, the The idea was to set the flag corresponding to the address to ``1''.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来の情報処理装置は、実行されたマイクロ命
令の7ドレスに付随するフラグを′1”にセットするだ
けなので、実行されたマイクロ命令のアドレスは認識す
ることができるが、同一アドレスのマイクロ命令が何回
実行されたかまではわからず、そのために、上記のフラ
グの状態を見ただけではマイクロプログラムの詳細な動
作までは推定することができないという欠点がある。
The conventional information processing device described above only sets the flag associated with the 7th address of the executed microinstruction to '1', so the address of the executed microinstruction can be recognized, but the microinstruction at the same address It is not known how many times an instruction has been executed, and therefore the detailed operation of the microprogram cannot be estimated just by looking at the flag states.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のマイクロプログラム網羅率測定回路は、プログ
ラム格納メモリの読出しアドレスを保持するアドレスレ
ジスタの内容によりアドレスされるパスメモリと、パス
メモリを前記アドレスレジスタの内容により読出し、値
を更新して同じアドレスに書込むカウント値演算回路を
有している。
The microprogram coverage measurement circuit of the present invention reads a path memory addressed by the contents of an address register that holds a read address of a program storage memory, and reads the path memory according to the contents of the address register, updates the value, and then updates the path memory to the same address as the address register. It has a count value arithmetic circuit for writing into.

〔作 用〕[For production]

したがって、同一アドレスのマイクロ命令が何回実行さ
れたかがパスメモリの値を解析することによりわかり、
マイクロプログラムの詳細な動作を推定することができ
る。
Therefore, you can find out how many times a microinstruction at the same address has been executed by analyzing the path memory value.
Detailed operations of microprograms can be estimated.

〔実施例〕〔Example〕

次に1本発明の実施例について図面を参照して説明する
Next, an embodiment of the present invention will be described with reference to the drawings.

第1図は本発−のマイクロプログラム網羅率測定回路の
一実施例の構成を示す図である。説明を簡単にするため
に、サブルーチンは、使用しないものとする。アドレス
演算回路105はアドレスレジスタ102のアドレスに
t”を加算して、セレクタ107へ送出する0次アドレ
スレジスタ10Bはマイクロプログラム格納用メモリ1
01から読出されたマイクロ命令に記述された次アドレ
スを保持する。セレクタ10?は一アドレス演算回路l
O5と次アドレスレジスタ10Bからのアドレスを選択
してアドレスレジスタ102へ送出する。パスメモリ1
03はシステム立上時にオール0にクリアされ後、マイ
クロプログラム格納用メモリ101の各々のアドレスに
相対する番地に、そのアドレスを通った回数を示すカウ
ント値を記憶する。カウント値演算回路104は、アド
レスレジスタ102に保持されたマイクロプログラム格
納用メモリ101の読出しアドレスによりパスメモリ1
03からそのアドレスのカウント値を読出し、これに1
″′を加算し加算した値を再び同じアドレスに書き戻す
FIG. 1 is a diagram showing the configuration of one embodiment of the microprogram coverage measurement circuit of the present invention. To simplify the explanation, subroutines will not be used. The address calculation circuit 105 adds t'' to the address of the address register 102 and sends it to the selector 107.
Holds the next address written in the microinstruction read from 01. Selector 10? is one address calculation circuit l
O5 and the address from the next address register 10B are selected and sent to the address register 102. Pass memory 1
03 is cleared to all 0s at system start-up, and then a count value indicating the number of times the address has been passed is stored in an address corresponding to each address in the microprogram storage memory 101. The count value calculation circuit 104 reads the path memory 1 based on the read address of the microprogram storage memory 101 held in the address register 102.
Read the count value of that address from 03 and set 1 to it.
Add ″′ and write the added value back to the same address.

第2図は第1図の回路のタイミングチャートである。ア
ドレスレジスタ102の示すパスメモリ103の7ドレ
スAからカウント値aが読出された後、l加算されて同
じアドレスAに書込まれ1次のアドレスA+1からカウ
ント値すが読出された後l加算されて同じアドレスA+
1に書込まれ、次のアドレスA+2からカウント値Cが
読出された後、l加算された同じアドレスA+2に書込
まれる。
FIG. 2 is a timing chart of the circuit of FIG. After the count value a is read from the 7th address A of the path memory 103 indicated by the address register 102, it is added by l and written to the same address A. After the count value a is read from the primary address A+1, it is added by l. same address A+
After the count value C is written to 1 and read from the next address A+2, it is written to the same address A+2 to which l is added.

このようにして、マイクロプログラムの各アドレスを通
った回数がパスメモリ103の上記アドレスに相対する
番地に記憶される。
In this way, the number of times each address of the microprogram has been passed is stored in the path memory 103 at an address relative to the above address.

〔発明の効果〕   ・ 以上説明したように本発明は、パスメモリおよびカウン
ト値演算回路を設け、マイクロプログラムの各々のアド
レスを通った回数を各々の7ドレスについて記憶するこ
とにより、マイクロプログラムの網羅率を測定すること
ができるだけでなく、各アドレスのカウント値を解析す
ることにより、マイクロプログラム中の複数のシーケン
スの各々が実行された回数を割出し、マイクロプログラ
ムの詳細な動作を推定することができる効果がある。
[Effects of the Invention] - As explained above, the present invention provides a path memory and a count value calculation circuit, and stores the number of times each address of the microprogram has been passed for each of the seven addresses, thereby making it possible to cover the entire microprogram. In addition to being able to measure the rate, by analyzing the count value of each address, it is possible to determine the number of times each of multiple sequences in a microprogram is executed and estimate the detailed behavior of the microprogram. There is an effect that can be achieved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明のマイクロプログラム網羅率測定回路の
一実施例の構成を示す図、第2図はマイクロプログラム
の各アドレスを通った回数をカウントアツプする様子を
示すタイミングチャートである。 101・・・・・・マイクロプログラム格納用メモリ、
102・・・・・・アドレスレジスタ、103・・・・
・・パスメモリ。 104・・・・・・カウント値演算回路、105−−−
−−−アドレス演算回路、lOB・・・・・・次アドレ
スレジスタ、10?・・・・・・セレクタ。
FIG. 1 is a diagram showing the configuration of an embodiment of the microprogram coverage measurement circuit of the present invention, and FIG. 2 is a timing chart showing how the number of times each address of the microprogram is passed is counted up. 101...Memory for storing microprograms,
102...Address register, 103...
...Pass memory. 104... Count value calculation circuit, 105---
---Address calculation circuit, lOB...Next address register, 10? ······selector.

Claims (1)

【特許請求の範囲】 マイクロプログラム制御の情報処理装置において、 マイクロプログラム格納メモリの読出しアドレスを保持
するアドレスレジスタの内容によりアドレスされるパス
メモリと、 パスメモリを前記アドレスレジスタの内容により読出し
、値を更新して同じアドレスに書込むカウント値演算回
路を有するマイクロプログラム網羅率測定回路。
[Claims] A microprogram-controlled information processing device comprising: a path memory that is addressed by the contents of an address register that holds a read address of a microprogram storage memory; A microprogram coverage measurement circuit having a count value calculation circuit that updates and writes to the same address.
JP62036487A 1987-02-18 1987-02-18 Circuit for measuring covering rate of program Pending JPS63204340A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP62036487A JPS63204340A (en) 1987-02-18 1987-02-18 Circuit for measuring covering rate of program

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP62036487A JPS63204340A (en) 1987-02-18 1987-02-18 Circuit for measuring covering rate of program

Publications (1)

Publication Number Publication Date
JPS63204340A true JPS63204340A (en) 1988-08-24

Family

ID=12471179

Family Applications (1)

Application Number Title Priority Date Filing Date
JP62036487A Pending JPS63204340A (en) 1987-02-18 1987-02-18 Circuit for measuring covering rate of program

Country Status (1)

Country Link
JP (1) JPS63204340A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013145298A1 (en) * 2012-03-30 2013-10-03 富士通株式会社 Information processing device and method for collecting program analysis information

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2013145298A1 (en) * 2012-03-30 2013-10-03 富士通株式会社 Information processing device and method for collecting program analysis information

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