JPS63200551A - Lead frame - Google Patents
Lead frameInfo
- Publication number
- JPS63200551A JPS63200551A JP62033863A JP3386387A JPS63200551A JP S63200551 A JPS63200551 A JP S63200551A JP 62033863 A JP62033863 A JP 62033863A JP 3386387 A JP3386387 A JP 3386387A JP S63200551 A JPS63200551 A JP S63200551A
- Authority
- JP
- Japan
- Prior art keywords
- thickness
- mounting part
- element mounting
- lead
- lead frame
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000004065 semiconductor Substances 0.000 claims abstract description 13
- 238000007789 sealing Methods 0.000 abstract description 9
- 239000011347 resin Substances 0.000 abstract description 6
- 229920005989 resin Polymers 0.000 abstract description 6
- PCHJSUWPFVWCPO-UHFFFAOYSA-N gold Chemical compound [Au] PCHJSUWPFVWCPO-UHFFFAOYSA-N 0.000 abstract description 3
- 239000000853 adhesive Substances 0.000 abstract description 2
- 230000001070 adhesive effect Effects 0.000 abstract description 2
- 239000004020 conductor Substances 0.000 abstract description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 239000004593 Epoxy Substances 0.000 description 1
- 230000000694 effects Effects 0.000 description 1
- 230000005611 electricity Effects 0.000 description 1
- 238000005476 soldering Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L33/00—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof
- H01L33/48—Semiconductor devices having potential barriers specially adapted for light emission; Processes or apparatus specially adapted for the manufacture or treatment thereof or of parts thereof; Details thereof characterised by the semiconductor body packages
- H01L33/62—Arrangements for conducting electric current to or from the semiconductor body, e.g. lead-frames, wire-bonds or solder balls
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/44—Structure, shape, material or disposition of the wire connectors prior to the connecting process
- H01L2224/45—Structure, shape, material or disposition of the wire connectors prior to the connecting process of an individual wire connector
- H01L2224/45001—Core members of the connector
- H01L2224/45099—Material
- H01L2224/451—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof
- H01L2224/45138—Material with a principal constituent of the material being a metal or a metalloid, e.g. boron (B), silicon (Si), germanium (Ge), arsenic (As), antimony (Sb), tellurium (Te) and polonium (Po), and alloys thereof the principal constituent melting at a temperature of greater than or equal to 950°C and less than 1550°C
- H01L2224/45144—Gold (Au) as principal constituent
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/4805—Shape
- H01L2224/4809—Loop shape
- H01L2224/48091—Arched
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2224/00—Indexing scheme for arrangements for connecting or disconnecting semiconductor or solid-state bodies and methods related thereto as covered by H01L24/00
- H01L2224/01—Means for bonding being attached to, or being formed on, the surface to be connected, e.g. chip-to-package, die-attach, "first-level" interconnects; Manufacturing methods related thereto
- H01L2224/42—Wire connectors; Manufacturing methods related thereto
- H01L2224/47—Structure, shape, material or disposition of the wire connectors after the connecting process
- H01L2224/48—Structure, shape, material or disposition of the wire connectors after the connecting process of an individual wire connector
- H01L2224/481—Disposition
- H01L2224/48151—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive
- H01L2224/48221—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked
- H01L2224/48245—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic
- H01L2224/48247—Connecting between a semiconductor or solid-state body and an item not being a semiconductor or solid-state body, e.g. chip-to-substrate, chip-to-passive the body and the item being stacked the item being metallic connecting the wire to a bond pad of the item
-
- H—ELECTRICITY
- H01—ELECTRIC ELEMENTS
- H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
- H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
- H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
- H01L2924/181—Encapsulation
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Computer Hardware Design (AREA)
- Power Engineering (AREA)
- Led Device Packages (AREA)
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明は、半導体素子を搭載するリードフレームに関す
るもので、少なくとも半導体素子載置部または内部リー
ド部の厚さと外部リード部の一部の厚さを変えることに
より、素子性能を拡大し、素子の製造方法を容易にし、
且つ、素子の使用方法を普遍的なままに保つものである
。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a lead frame on which a semiconductor element is mounted. By changing the device performance, we can expand the device performance and simplify the device manufacturing method.
It also keeps the usage of the device universal.
従来の技術
従来の内部リード部、外部リード部と概ね同一表面に半
導体素子載置部を有するリードフレームを、第３図ａ、
ｂの平面図および断面図に示す。2. Description of the Related Art A conventional lead frame having a semiconductor element mounting portion on approximately the same surface as the inner lead portion and the outer lead portion is shown in FIG.
It is shown in the plan view and cross-sectional view of b.
素子載置部１および内部リード２．外部リード３の各厚
さはすべて同一寸法で形成されている。Element mounting section 1 and internal leads 2. The external leads 3 are all formed to have the same thickness.
かかるリードフレームに半導体素子を搭載し、封止用樹
脂で被覆して使用される。A semiconductor element is mounted on such a lead frame and used by covering it with a sealing resin.
発明が解決しようとする問題点
従来の内部リード部、外部リート部と概ね同一表面に素
子載置部を有するリードフレームは、素子載置部に凹部
を設けるなどの加工をする際、凹部形成の下部には突出
した部分が形成される。このようなリードフレームは、
下側が平坦ではなく、ダイスボンド、ワイヤボンドなど
組立時の大きな障害となる。そこで下側を平坦に保つた
めには、凹部の深さ寸法より厚い材料の採用が不可欠と
なる。即ち、このようなリードフレームでは、内部と外
部も同一の厚みとなり、通常の標準寸法の材料の使用が
不可能となり、封止金型や製品使用時のソケットの変更
が必要となる。また、性能上においても厚くなることに
より、ハンダ付は時の熱が内部へ伝わりやす（信頼性を
損うことやパッケージへのストレスが大きくなるなどの
問題が生ずる。一方、標準寸法の厚さを用いると、素子
載置部に凹部を付設するには、加工寸法及び精度に限界
があるという問題があった。Problems to be Solved by the Invention In a conventional lead frame that has an element mounting part on the same surface as the internal lead part and the external lead part, it is difficult to form the recess when performing processing such as providing a recess in the element mounting part. A protruding portion is formed at the bottom. This kind of lead frame is
The bottom side is not flat, which poses a major obstacle during assembly such as die bonding and wire bonding. Therefore, in order to keep the lower side flat, it is essential to use a material that is thicker than the depth of the recess. That is, in such a lead frame, the inside and outside have the same thickness, making it impossible to use materials with normal standard dimensions, and requiring changes to the sealing mold and the socket when the product is used. In addition, in terms of performance, due to the increased thickness, the heat of soldering is easily transmitted to the inside (which causes problems such as loss of reliability and increased stress on the package.On the other hand, the thickness of standard dimensions When using a recess, there is a problem in that there is a limit to the processing dimensions and accuracy in attaching a recess to the element mounting portion.
本発明は、このような問題を解決するもので、簡便な構
造のリードフレームにより、容易に組立、封止、加工を
可能にするとともに所定の性能を得ることを目的とする
ものである。The present invention is intended to solve these problems, and aims to enable easy assembly, sealing, and processing with a lead frame having a simple structure, and to obtain a predetermined performance.
問題点を解決するための手段
上記問題を解決するため、本発明は、半導体素子載置部
および内部リードの一部の厚さを大きくし、封止にかか
わる部分より外側を標準サイズの厚さにしである。Means for Solving the Problems In order to solve the above problems, the present invention increases the thickness of a part of the semiconductor element mounting part and the internal leads, and reduces the thickness of the part outside the part involved in sealing to the standard size. It's Nishide.
作用
半導体素子載置部の厚さを外部リードの厚さよりも大き
くすることにより、載置部の加工を容易にし、且つ、外
部リード部を通常の汎用寸法に設定するため、組立が容
易になり、信頼性面でも性能面でも改善が可能となる。By making the thickness of the active semiconductor element mounting part larger than the thickness of the external leads, processing of the mounting part is facilitated, and since the external lead part is set to normal general-purpose dimensions, assembly is facilitated. , it is possible to improve both reliability and performance.
実施例
第１図に、フラットタイプの発光素子を製作するに当た
り、発光効率の向上を図るため、パラボラ形成用の四部
を設けた場合の、本発明の一実施例を示す。第１図ａは
本発明のリードフレームの平面図、第１図すは断面図を
示す。半導体素子載置部１．内部リード部２．外部リー
ド部３が複数個、１つの導体平板に反復して形成されて
いる。Embodiment FIG. 1 shows an embodiment of the present invention in which four parts for forming a parabola are provided in order to improve luminous efficiency when manufacturing a flat type light emitting element. FIG. 1a shows a plan view of the lead frame of the present invention, and FIG. 1A shows a cross-sectional view. Semiconductor element mounting section 1. Internal lead part 2. A plurality of external lead portions 3 are repeatedly formed on one conductor flat plate.
半導体素子載置部１と内部リード部２Ａは、外部リード
部３の厚さ０．２５ｍｍに対して、０．５ｎ＋ｍの厚さ
を持たせている。第２図ａは、半導体素子載置部１の厚
さが０．５論、内部リード部２Ａの厚さが０ 、５ ｍ
ｍ、内部リード部２Ｂの厚さが０．２５ｍｍ、外部リー
ド部の厚さが０．２５ｍｍのリードフレームに凹部４を
設け、発光素子５を付設して封止樹脂６で被覆した一実
施例の平面図を示し、第２図すはその断面図を示す。素
子載置部１には、深さ０ 、３ ｍｍの四部４が設けら
れ、その底面に厚さ０ 、２５ ｍｍの発光素子５が導
電性接着剤で付設されている。凹部４の断面は４５°の
角度を有する反射面で上部外径１ 、２ ｍｍ−、下部
外径０、 、６ ｍｍ−である。発光素子５は金線７で
内部り−ド２Ａと接続されている。封止樹脂６はエポキ
シ系透明樹脂を用いている。発光素子５に外部り−ド３
から通電すると、発光素子５の断面から発する光は、凹
部４の反射面で反射されて上方へ導かれ、発光効率は、
発光素子を平面においた場合に比べ、約２５％に上昇す
るという大幅な改善がなされた。一方、耐熱性は外部リ
ード部の厚さが通常の厚さ七同じであるため、通常品と
変わらす２７０’Ｃ，１０秒の保証が可能である。The semiconductor element mounting portion 1 and the internal lead portion 2A have a thickness of 0.5n+m compared to the thickness of the external lead portion 3 of 0.25mm. In FIG. 2a, the thickness of the semiconductor element mounting part 1 is 0.5 m, and the thickness of the internal lead part 2A is 0.5 m.
m, an embodiment in which a recess 4 is provided in a lead frame in which the inner lead portion 2B has a thickness of 0.25 mm and the outer lead portion has a thickness of 0.25 mm, a light emitting element 5 is attached, and the lead frame is covered with a sealing resin 6. FIG. 2 shows a sectional view thereof. The element mounting part 1 is provided with four parts 4 having a depth of 0.3 mm, and a light emitting element 5 having a thickness of 0.25 mm is attached to the bottom surface of the four parts 4 with a conductive adhesive. The cross section of the recess 4 is a reflective surface having an angle of 45° and has an upper outer diameter of 1, 2 mm and a lower outer diameter of 0, 6 mm. The light emitting element 5 is connected to the internal wire 2A by a gold wire 7. The sealing resin 6 is made of epoxy transparent resin. External wire 3 to light emitting element 5
When electricity is applied from the light emitting element 5, the light emitted from the cross section of the light emitting element 5 is reflected by the reflective surface of the recess 4 and guided upward, and the luminous efficiency is
This is a significant improvement of about 25% compared to when the light emitting element is placed on a flat surface. On the other hand, as for heat resistance, since the thickness of the external lead part is the same as the normal thickness, it is possible to guarantee heat resistance of 270'C and 10 seconds, which is different from normal products.
発明の効果
以上のように、本発明によるリードフレームを用いるこ
とで、素子載置部に任意の加工をして、組立を容易にし
、且つ、素子の性能が改善され高い信頼性も実現できる
。また、封止の金型、製品使用時のソケット等も従来品
お同じ良いなど、その工業的価値は大である。Effects of the Invention As described above, by using the lead frame according to the present invention, it is possible to perform arbitrary processing on the element mounting portion to facilitate assembly, improve the performance of the element, and achieve high reliability. In addition, the mold for sealing and the socket when using the product are the same as conventional products, so its industrial value is great.
第１図ａ、ｂは本発明の一実施例によるリードフレーム
の平面図、断面図、第２図ａ、ｂは本発明のリードフレ
ームを用いて発光素子を製作した場合の一実施例の平面
図、断面図、第３図ａ、ｂは従来例リードフレームの平
面図、断面図である。
１・・・・・・半導体素子載置部、２・・・・・・内部
リード部、３・・・・・・外部リード部、４・・・・・
・凹部、５・・・・・・発光素子、６・・・・・・封止
樹脂、７・・・・・・金線。Figures 1a and b are a plan view and a sectional view of a lead frame according to an embodiment of the present invention, and Figures 2a and b are plane views of an embodiment in which a light emitting device is manufactured using the lead frame of the present invention. Figures 3a and 3b are a plan view and a sectional view of a conventional lead frame. 1... Semiconductor element mounting part, 2... Internal lead part, 3... External lead part, 4...
- Concave portion, 5...Light emitting element, 6...Sealing resin, 7...Gold wire.
Claims (1)
有するリードパターンが複数個、１つの導体平板に反復
して形成されており、前記半導体素子載置部の厚さの一
部が異なっていることを特徴とするリードフレーム。A plurality of lead patterns having a semiconductor element mounting part, an internal lead part, and an external lead part are repeatedly formed on one conductive flat plate, and the thickness of the semiconductor element mounting part is partially different. A lead frame characterized by:
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62033863A JPS63200551A (en) | 1987-02-17 | 1987-02-17 | Lead frame |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP62033863A JPS63200551A (en) | 1987-02-17 | 1987-02-17 | Lead frame |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63200551A true JPS63200551A (en) | 1988-08-18 |
Family
ID=12398338
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP62033863A Pending JPS63200551A (en) | 1987-02-17 | 1987-02-17 | Lead frame |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63200551A (en) |
Cited By (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1791190A1 (en) * | 2005-11-25 | 2007-05-30 | Samsung Electro-Mechanics Co., Ltd. | Side view light emitting diode package |
| JP2011233928A (en) * | 2006-07-13 | 2011-11-17 | Cree Inc | Package of lead frame base for solid light emitting device, and method of manufacturing package of lead frame base for solid light emitting device |
| US8941134B2 (en) | 2006-07-13 | 2015-01-27 | Cree, Inc. | Leadframe-based packages for solid state light emitting devices having heat dissipating regions in packaging |
-
1987
- 1987-02-17 JP JP62033863A patent/JPS63200551A/en active Pending
Cited By (6)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| EP1791190A1 (en) * | 2005-11-25 | 2007-05-30 | Samsung Electro-Mechanics Co., Ltd. | Side view light emitting diode package |
| EP2112698A1 (en) * | 2005-11-25 | 2009-10-28 | Samsung Electro-Mechanics Co., Ltd. | Side view light emitting diode package |
| EP2315265A1 (en) * | 2005-11-25 | 2011-04-27 | Samsung LED Co., Ltd. | Side view light emitting diode package |
| US10096756B2 (en) | 2005-11-25 | 2018-10-09 | Samsung Electronics Co., Ltd. | Side view light emitting diode package |
| JP2011233928A (en) * | 2006-07-13 | 2011-11-17 | Cree Inc | Package of lead frame base for solid light emitting device, and method of manufacturing package of lead frame base for solid light emitting device |
| US8941134B2 (en) | 2006-07-13 | 2015-01-27 | Cree, Inc. | Leadframe-based packages for solid state light emitting devices having heat dissipating regions in packaging |
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