JPS63197357U - - Google Patents

Info

Publication number
JPS63197357U
JPS63197357U JP8986887U JP8986887U JPS63197357U JP S63197357 U JPS63197357 U JP S63197357U JP 8986887 U JP8986887 U JP 8986887U JP 8986887 U JP8986887 U JP 8986887U JP S63197357 U JPS63197357 U JP S63197357U
Authority
JP
Japan
Prior art keywords
circuit board
multilayer circuit
sub
flange
chip module
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP8986887U
Other languages
English (en)
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP8986887U priority Critical patent/JPS63197357U/ja
Publication of JPS63197357U publication Critical patent/JPS63197357U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Wire Bonding (AREA)
JP8986887U 1987-06-10 1987-06-10 Pending JPS63197357U (de)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP8986887U JPS63197357U (de) 1987-06-10 1987-06-10

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP8986887U JPS63197357U (de) 1987-06-10 1987-06-10

Publications (1)

Publication Number Publication Date
JPS63197357U true JPS63197357U (de) 1988-12-19

Family

ID=30949240

Family Applications (1)

Application Number Title Priority Date Filing Date
JP8986887U Pending JPS63197357U (de) 1987-06-10 1987-06-10

Country Status (1)

Country Link
JP (1) JPS63197357U (de)

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