JPS63193538A - Testing method for wafer of semiconductor element - Google Patents

Abstract

PURPOSE:To measure a saturation voltage at 100 mA or more stably, by applying a required current to a pair of probes, and measuring the characteristic of the saturation voltage with another pair of probes. CONSTITUTION:Electrode lead-out terminals 7, 7', 8 and 8' are formed for an emitter electrode 4 and a collector electrode 6. A pair of probes 9 and 10 are contacted with the terminals 7 and 8, which are connected to the electrode 4 and the electrode 8. Another pair of probes 9' and 10' are contacted to the similar terminals 7 ' and 8'. A current is applied to the probes 9 and 10, and the characteristic of a saturation voltage is measured with the probes 9, and 10'. Then the effect of the contact resistances generated among the probes 9, 10, 9' and 10' and the terminals 7, 8, 7, and 8' is removed. Thus the saturation voltage of at 100 mA or more is measured stably.

Description

DETAILED DESCRIPTION OF THE INVENTION <Object of the Invention> (Industrial Application Field) The present invention relates to wafer testing of integrated circuits and individual semiconductor elements, and is particularly suitable for large current drive type semiconductor devices.

(Prior Art) The manufacturing of semiconductor devices involves a pre-processing process in which circuits or devices are built into a semiconductor package or crystal, and a post-processing or assembly process in which each element is made into a structure suitable for being incorporated into the necessary electronic equipment. The necessary measurements are carried out at the end of each process, which is commonly known as the die sorter test after the pretreatment process.

This die sorter test generally uses a so-called probe card, and the reality is that probers are widely sold as equipment to which the probe cards are attached, and are in operation at production sites.

Although this probe card is replaced depending on the type of semiconductor device to be measured, as shown in FIGS. Conductive metal electrode lead terminals ts and i formed on the emitter electrodes 13 and collector electrodes 14 of 12
A method is adopted in which voltage is measured while applying current while in contact with s.

On the other hand, the semiconductor devices to be measured include individual semiconductor devices and integrated circuits (hereinafter referred to as ICs).
There are also transistors that measure saturation voltages of 00 mA or more, and bipolar IC devices that monolithically integrate these transistors.

(Problems to be Solved by the Invention) By the way, the electrode extraction terminal provided on the semiconductor device to be measured is AQ, AQ-5i, or AQ-3i- which exhibits conductivity.
Cu is used, and the diameter of the probe needle that comes into contact with Cu is also selected depending on the semiconductor element.

However, in actual measurement, the voltage, that is, the potential difference, is measured while applying a predetermined current, so it cannot be denied that the contact resistance between the electrode lead terminal and the probe needle is added in series to the measurement circuit shown in Figure 4. do not have.

As mentioned above, when an output transistor that measures a saturation voltage of 100 mA or more and an IC integrated with the same are measured with the probe needle, the surface of the probe needle is oxidized by the heat generated by the contact resistance between the two, and as the oxidation progresses, This results in a vicious cycle in which the contact resistance increases. Therefore, what initially showed several ohms after the start of the measurement reaches several hundred ohms, and the measured values for each element fluctuate significantly, making stable measurement extremely difficult.

For this reason, die sorter tests (
At the stage (hereinafter referred to as wafer test), the saturation voltage is measured in a current range of about several tens of mA, where relatively stable measurements can be made, and is guaranteed by correlating it with the saturation characteristics in the large current range of the finished product.

However, since this correlation is greatly influenced by various parameters in semiconductor wafer manufacturing, it is practically difficult to guarantee it.

The present invention provides a novel wafer testing method that overcomes the above-mentioned difficulties, and improves the yield of finished semiconductor devices by stably measuring the saturation voltage characteristics in the large current region especially during the probe test stage. The purpose is to

<Structure of the Invention> (Means for Solving the Problems) In order to achieve this object, in the present invention, of the two electrode lead terminals installed for each terminal to be measured of the semiconductor element, one pair is connected to a current A method is adopted in which the saturation voltage is measured using the other pair.

(for production) What are the saturation voltage characteristics that occur in the transistor output section?

Since there is a potential difference between the collector part and the emitter part that constitute this output part, two electrode extraction terminals are installed on each of the two electrodes or the conductive electrodes that are electrically connected to this, and one pair of them and the other Separate probe needles are brought into contact with one pair to measure the saturation voltage characteristics.

Moreover, since the necessary current is energized to this pair and the other pair measures the potential difference between them, that is, the saturation voltage characteristics, the influence of contact resistance generated between the probe needle and the electrode lead terminal is eliminated. This makes it possible to stably measure a saturation voltage of 100+nA or more.

(Example) An example according to the present invention will be described in detail with reference to FIGS. 1 and 2, with new numbers added to descriptions that overlap with those in the conventional technology column.

FIG. 1 is a top view showing the layout of the emitter, base, and collector of a transistor whose saturation voltage to be measured is 10011 IA or more, and FIG. 2 is a measurement circuit diagram thereof.

This figure 2 shows the open collector output format of a common emitter type NPN transistor.
The state in which the method of the present invention is applied to a transistor is shown in FIG. 1 together with the layout.

That is, the emitter 1, base 2, and collector 3 are provided with electrodes 4, 5.6 according to the conventional method, and the emitter electrode 4 and collector electrode 6 are similarly made of Al2, Al2-5i.
Electrode extraction terminals 7.7' and 8.8' made of one type of aluminum or Al2-5L-Cu are formed to prepare for contact with probe needles 9.9' and 10.10'.

These probe needles 9 to 10' are fixed to a known probe card, and in the present invention, four probe needles are prepared, which is more than the conventional probe needles, and one pair of probe needles is connected to the emitter electrode 4 and the collector electrode 6. Output terminals 7, 8 and other 1
The pair is brought into contact with similar electrode extraction terminals 7' and 8', and a potential difference, that is, a saturation voltage of 100 mA or more is applied to one pair, and a current is applied to the other pair.

In this measurement, since the probe needle, the necessary current energizing needle, and the actual measuring needle are set separately, it is possible to prevent the influence of contact resistance generated between the probe needle and the electrode lead terminal.

Therefore, it is possible to stably measure and detect a saturation voltage of 100 mA or more under the same conditions as for testing semiconductor devices completed through the semiconductor element assembly process, and this was achieved at the wafer test stage.

<Effects of the Invention> As described above, in the wafer testing method for semiconductor devices according to the present invention, although the contact resistance generated between the probe needle for measuring the potential difference and the electrode lead terminal enters the measurement circuit, the potential difference cannot be detected because no direct current flows. Since it is possible to measure only the saturation voltage of a pure semiconductor element without generation, highly accurate and stable results can be obtained.

Therefore, it is possible to reliably eliminate pellets with insufficient saturation voltage characteristics at the wafer test stage, thereby improving the yield of finished products.

[Brief explanation of the drawing]

FIG. 1 is a top view showing the wafer test of the present invention. FIG. 2 is a circuit diagram of the sub-chamber, FIG. 3 is a top view showing a conventional wafer test, and FIG. 4 is a circuit diagram applied to the conventional test.

Claims (1)

[Claims] A wafer testing method for a semiconductor device, characterized in that a current is applied to one pair of two electrode lead-out portions provided for each terminal to be measured of the semiconductor device, and a saturation voltage is measured using the other pair.