JPS63190977U - - Google Patents
Info
- Publication number
- JPS63190977U JPS63190977U JP8275987U JP8275987U JPS63190977U JP S63190977 U JPS63190977 U JP S63190977U JP 8275987 U JP8275987 U JP 8275987U JP 8275987 U JP8275987 U JP 8275987U JP S63190977 U JPS63190977 U JP S63190977U
- Authority
- JP
- Japan
- Prior art keywords
- substrates
- constant temperature
- temperature chamber
- connection system
- power source
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Granted
Links
- 230000032683 aging Effects 0.000 claims description 3
- 239000000758 substrate Substances 0.000 claims 4
- 238000010586 diagram Methods 0.000 description 3
Landscapes
- Testing Of Individual Semiconductor Devices (AREA)
- Testing Or Measuring Of Semiconductors Or The Like (AREA)
Description
第１図は本考案の第１の実施例の回路図、第２
図は本考案の第２の実施例の回路図、第３図は従
来のＩＣ用エージング装置の一例の回路図である
。
１……恒温槽、２−１〜２−ｎ，３−１〜３−
ｎ，４−１〜４−ｎ……基板、５……電源、６…
…信号源、７−１〜７−ｎ……主基板コネクタ、
８−１〜８−ｎ……副基板コネクタ、１１……主
電源配線、１２……主信号配線、１３……主接地
配線、１４，１７……副電源配線、１５，１８…
…副信号配線、１６，１９……副接地配線、ＣＮ
１〜ＣＮｍ……ソケツト。
Figure 1 is a circuit diagram of the first embodiment of the present invention;
The figure is a circuit diagram of a second embodiment of the present invention, and FIG. 3 is a circuit diagram of an example of a conventional IC aging device. 1... Constant temperature bath, 2-1 to 2-n, 3-1 to 3-
n, 4-1 to 4-n...board, 5...power supply, 6...
...Signal source, 7-1 to 7-n...Main board connector,
8-1 to 8-n... Sub board connector, 11... Main power wiring, 12... Main signal wiring, 13... Main ground wiring, 14, 17... Sub power wiring, 15, 18...
...Sub signal wiring, 16, 19...Sub ground wiring, CN
1 ~CN m ...Socket.
Claims (1)
ＩＣを搭載する複数の基板と、前記恒温槽外から
前記基板に供給する電源と信号源と、前記基板と
前記電源及び信号源を接続する主配線を含む主接
続系と、それぞれの前記基板の電源線及び信号線
を並列接続する副接続系とを有することを特徴と
するＩＣ用エージング装置。 a constant temperature chamber, a plurality of substrates mounted with aging ICs housed in the constant temperature chamber, a power source and a signal source supplied to the substrates from outside the constant temperature chamber, and a main circuit for connecting the substrates and the power source and signal source. 1. An aging device for IC, comprising a main connection system including wiring, and a sub-connection system connecting power supply lines and signal lines of each of the substrates in parallel.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8275987U JPH0633431Y2 (en) | 1987-05-28 | 1987-05-28 | Aging device for IC |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP8275987U JPH0633431Y2 (en) | 1987-05-28 | 1987-05-28 | Aging device for IC |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS63190977U true JPS63190977U (en) | 1988-12-08 |
| JPH0633431Y2 JPH0633431Y2 (en) | 1994-08-31 |
Family
ID=30935705
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP8275987U Expired - Lifetime JPH0633431Y2 (en) | 1987-05-28 | 1987-05-28 | Aging device for IC |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPH0633431Y2 (en) |
-
1987
- 1987-05-28 JP JP8275987U patent/JPH0633431Y2/en not_active Expired - Lifetime
Also Published As
| Publication number | Publication date |
|---|---|
| JPH0633431Y2 (en) | 1994-08-31 |