JPS63187920A - A/d converter - Google Patents
A/d converterInfo
- Publication number
- JPS63187920A JPS63187920A JP2082787A JP2082787A JPS63187920A JP S63187920 A JPS63187920 A JP S63187920A JP 2082787 A JP2082787 A JP 2082787A JP 2082787 A JP2082787 A JP 2082787A JP S63187920 A JPS63187920 A JP S63187920A
- Authority
- JP
- Japan
- Prior art keywords
- current
- circuit
- bipolar
- output
- variation
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 238000006243 chemical reaction Methods 0.000 claims description 16
- 238000010586 diagram Methods 0.000 description 3
- 230000000694 effects Effects 0.000 description 1
- 238000000034 method Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
- 238000011144 upstream manufacturing Methods 0.000 description 1
Landscapes
- Analogue/Digital Conversion (AREA)
Abstract
Description
【発明の詳細な説明】 産業上の利用分野 本発明は逐次比較型Ａ／Ｄ変換器に関するものである。[Detailed description of the invention] Industrial applications The present invention relates to a successive approximation type A/D converter.
従来の技術
第３図は従来の逐次比較型Ａ／Ｄ変換器を、バイポーラ
モードで使用する場合の基本的な構成を示すものである
。１３は入力デジタル信号に対応した電流Ｉを出力する
Ｄ／Ａ変換回路、１１はＩ）／Ａ変換回路１３の出力電
流工を一方の入力信号とし、他方の入力信号をアースと
するコンパレータ回路、１２はコンパレータ回路１１の
出力信号を入力信号として、Ｄ／Ａ変換回路の入力信号
となるデジタル量を決定し、一時記憶する逐次近似レジ
スタ５７は入力信号電圧に対応した電流を設定するため
の入力抵抗、１４はＤ／Ａ変換回路１３の基準電流設定
及び、バイポーラ電流設定のための基準電圧、１６は基
準電圧１４からバイポーラ電流を供給するだめの外部抵
抗、９はＤ／Ａ変換回路１３の電流源である。BACKGROUND OF THE INVENTION FIG. 3 shows the basic configuration of a conventional successive approximation type A/D converter used in bipolar mode. 13 is a D/A conversion circuit that outputs a current I corresponding to an input digital signal; 11 is a comparator circuit that uses the output current of the I)/A conversion circuit 13 as one input signal and the other input signal as ground; Reference numeral 12 uses the output signal of the comparator circuit 11 as an input signal to determine a digital quantity to be the input signal of the D/A conversion circuit, and a successive approximation register 57 for temporarily storing it is an input for setting a current corresponding to the input signal voltage. 14 is a reference voltage for setting the reference current of the D/A converter circuit 13 and bipolar current; 16 is an external resistor for supplying bipolar current from the reference voltage 14; 9 is a resistor for the D/A converter circuit 13; It is a current source.
以上のように構成された従来の逐次比較型Ａ／Ｄ変換器
のバイポーラモード使用では、バイポーラ電流をＤ／Ａ
変換回路１３に内蔵された基準電圧１４から、バイポー
ラ電流供給のための抵抗１５を介して、Ｄ／Ａ変換回路
１３の電流出力端６、即ちコンパレータ回路１１の入力
端子に流し込んでいた。When using the conventional successive approximation type A/D converter configured as described above in bipolar mode, bipolar current is
A reference voltage 14 built into the conversion circuit 13 is supplied to the current output terminal 6 of the D/A conversion circuit 13, that is, the input terminal of the comparator circuit 11, via a resistor 15 for supplying bipolar current.
発明が解決しようとする問題点
このような従来の回路では、基準電圧１４と外部抵抗１
６のマツチングが悪い場合に、バイポーラオフセット電
圧が変動するという問題があった。Problems to be Solved by the Invention In such a conventional circuit, the reference voltage 14 and the external resistance 1
There was a problem in that if the matching of 6 was poor, the bipolar offset voltage would fluctuate.
本発明は上記欠点に鑑み、１）／Ａ変換回路の基準電流
と連動して動作する定電流回路によりバイポーラ電流を
供給する簡易なカレントミラー回路を提供するものであ
る。In view of the above-mentioned drawbacks, the present invention provides 1) a simple current mirror circuit that supplies bipolar current by a constant current circuit that operates in conjunction with the reference current of the /A conversion circuit.
問題点を解決するための手段
゛ そのカレントミラー回路の出力
電流をバイポーラ電流としてコンパレータの入力端子に
流し込むことによって、バイポーラオフセット電圧の変
動を小さくするものである。Means for Solving the Problem: Fluctuations in the bipolar offset voltage are reduced by flowing the output current of the current mirror circuit as a bipolar current into the input terminal of the comparator.
実施例
以下、本発明の一実施例を添付図面にもとづいて説明す
る。Embodiment Hereinafter, one embodiment of the present invention will be described based on the accompanying drawings.
第１図は、本発明による逐次比較型Ａ／Ｄ変換器の構成
である。１ｏはバイポーラ電流供給のための定電流回路
８を内蔵したＤ／Ａ変換回路、８は本発明のカレントミ
ラー回路による定電流回路で、その出力電流はコンパレ
ータ回路１１の負側入力端子１に流入される。本発明の
定電流回路８の詳細を第２図に示す。３及び４はカレン
トミラー回路を構成するだめのトランジスタ、１及び２
は上記カレントミラー回路の出力電流を設定するための
抵抗、６はＤ／Ａ変換回路１０の基準電流源、１６はカ
レントミラー回路の出力端子で、コンパレータ回路１１
の負側入力端子に接続される。FIG. 1 shows the configuration of a successive approximation type A/D converter according to the present invention. 1o is a D/A conversion circuit incorporating a constant current circuit 8 for bipolar current supply, 8 is a constant current circuit using a current mirror circuit of the present invention, and its output current flows into the negative input terminal 1 of the comparator circuit 11. be done. Details of the constant current circuit 8 of the present invention are shown in FIG. 3 and 4 are transistors that constitute a current mirror circuit, 1 and 2
is a resistor for setting the output current of the current mirror circuit, 6 is a reference current source for the D/A conversion circuit 10, 16 is an output terminal of the current mirror circuit, and the comparator circuit 11
Connected to the negative input terminal of
この回路で、抵抗１と抵抗２は２：１の比に設定されて
おり、カレントミラー回路の出力端子１６からは２Ｉｏ
の電流が、バイポーラ電流となって流出する。上記バイ
ポーラ電流はＤ／Ａ変換回路１ｏの基準電流工。の変動
に対して連動して動くため、基準電流Ｉ。の変動にもと
づくバイポーラオフセット電圧の変動をなくすことが可
能である。In this circuit, resistor 1 and resistor 2 are set at a ratio of 2:1, and 2Io is output from the output terminal 16 of the current mirror circuit.
The current flows out as a bipolar current. The above bipolar current is the reference current of the D/A conversion circuit 1o. The reference current I. It is possible to eliminate variations in bipolar offset voltage due to variations in .
発明の効果
以上のように本発明は、バイポーラモード設定をカレン
トミラー回路を使った定電流方式とすることにより、諸
々の要因による基準電流の変動に対して、バイポーラオ
フセット電圧ドリフトの小さいＡ／Ｄ変換器を構成する
・ことができる。また、本発明の回路は、簡易で、かつ
半導体Ｉ（ｊに適しているため、従来のＤ／Ａ変換回路
に内蔵でき、スペースをとらず、コストアップとなるこ
となく、実現できる。Effects of the Invention As described above, the present invention uses a constant current method using a current mirror circuit for bipolar mode setting, so that an A/D with small bipolar offset voltage drift can be achieved against fluctuations in the reference current due to various factors. Able to configure the converter. Further, since the circuit of the present invention is simple and suitable for semiconductor I(j), it can be built into a conventional D/A conversion circuit, and can be implemented without taking up space or increasing costs.
第１図は本発明による逐次比較型のＡ／Ｄ変換器の構成
を示すブロック図、第２図は同ム／Ｄ変換器のカレント
ミラー回路図、第３図は従来の逐次比較型Ａ ／ Ｄ変
換器の構成を示すブロック図である。
１．２・・・・・・抵抗、３．４・・・・・・トランジ
スタ、６・・・・・・基準電流源、６・・・・・・電流
出力端、７・・・・・・入力抵抗、８・・・・・・定電
流回路、９・・・・・・電流源、１０・・・・・・Ｄ／
Ａ変換回路、１１・・・・・・コンパレータ回路、１２
・・・・・・逐次近似レジスタ。
代理人の氏名 弁理士 中 尾 敏 男 ほか１名第
１ 図
８−友電流回格
ｑ−を流上
第２図Fig. 1 is a block diagram showing the configuration of a successive approximation type A/D converter according to the present invention, Fig. 2 is a current mirror circuit diagram of the same A/D converter, and Fig. 3 is a conventional successive approximation type A/D converter. FIG. 2 is a block diagram showing the configuration of a D converter. 1.2...Resistor, 3.4...Transistor, 6...Reference current source, 6...Current output end, 7...・Input resistance, 8... Constant current circuit, 9... Current source, 10... D/
A conversion circuit, 11... Comparator circuit, 12
...Successive approximation register. Name of agent: Patent attorney Toshio Nakao and 1 other person
1 Figure 8 - Upstream current circuit q- Figure 2
Claims (1)
回路と、このＤ／Ａ変換回路の出力電流を一方の入力信
号とするコンパレータ回路と、このコンパレータ回路の
出力信号を入力信号とする逐次近似レジスタとを有し、
この逐次近似レジスタの出力信号をＤ／Ａ変換回路の入
力信号とし、かつ上記コンパレータ回路の入力端子に、
入力抵抗を介して入力信号が接続されるように構成し、
上記Ｄ／Ａ変換回路に定電流回路を設け、その定電流回
路の出力電流をＤ／Ａ変換回路の電流出力端に接続した
Ａ／Ｄ変換器。A D/A conversion circuit that outputs a current corresponding to an input digital signal, a comparator circuit that uses the output current of this D/A conversion circuit as one input signal, and successive approximation that uses the output signal of this comparator circuit as an input signal. has a register,
The output signal of this successive approximation register is used as the input signal of the D/A conversion circuit, and the input terminal of the comparator circuit is
configured so that the input signal is connected through the input resistor,
An A/D converter in which the D/A conversion circuit is provided with a constant current circuit, and the output current of the constant current circuit is connected to the current output terminal of the D/A conversion circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2082787A JPS63187920A (en) | 1987-01-30 | 1987-01-30 | A/d converter |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP2082787A JPS63187920A (en) | 1987-01-30 | 1987-01-30 | A/d converter |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63187920A true JPS63187920A (en) | 1988-08-03 |
Family
ID=12037874
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP2082787A Pending JPS63187920A (en) | 1987-01-30 | 1987-01-30 | A/d converter |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63187920A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02159125A (en) * | 1988-12-12 | 1990-06-19 | Matsushita Electric Ind Co Ltd | Converter circuit |
| JPH02309719A (en) * | 1989-05-24 | 1990-12-25 | Matsushita Electric Ind Co Ltd | Current mirror circuit |
Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5871725A (en) * | 1981-10-26 | 1983-04-28 | Yokogawa Hewlett Packard Ltd | Analog-digital converter |
| JPS60194829A (en) * | 1984-03-16 | 1985-10-03 | Matsushita Electric Ind Co Ltd | A-d-d-a converter |
| JPS61198923A (en) * | 1985-02-28 | 1986-09-03 | Canon Inc | Digital-analog converter |
-
1987
- 1987-01-30 JP JP2082787A patent/JPS63187920A/en active Pending
Patent Citations (3)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5871725A (en) * | 1981-10-26 | 1983-04-28 | Yokogawa Hewlett Packard Ltd | Analog-digital converter |
| JPS60194829A (en) * | 1984-03-16 | 1985-10-03 | Matsushita Electric Ind Co Ltd | A-d-d-a converter |
| JPS61198923A (en) * | 1985-02-28 | 1986-09-03 | Canon Inc | Digital-analog converter |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH02159125A (en) * | 1988-12-12 | 1990-06-19 | Matsushita Electric Ind Co Ltd | Converter circuit |
| JPH02309719A (en) * | 1989-05-24 | 1990-12-25 | Matsushita Electric Ind Co Ltd | Current mirror circuit |
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