JPS60194829A - A-d-d-a converter - Google Patents

Abstract

PURPOSE:To decrease a distortion due to error at a zero cross point by adjusting a current value of an MSB of a sequential comparison reference current source equally to the total sum of current values of reference current sources to elminate the need for trimming. CONSTITUTION:A current value of the comparison reference current sources 1- N of a converter 7 is sequentially to I, I/2, I/2<2>-I/2N<-1> and the current value of the MSB is changed so that a voltage difference between an output of a sample hold circuit 16 of the current value of the MSB turning on a switch 3 only and an output of a sample hold circuit 17 of a current total sum of the LSB turning on all switches 4 except the switch 3 is zero. Thus, the erroneous distortion at the zero point of the analog signal is decreased without trimming.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of the Invention The present invention relates to an A-D/D-A converter for digital audio.

Conventional Structures and Their Problems In recent years, digitalization of audio has been rapidly progressing, as seen in compact discs and digital audio tape recorders. These digital audio devices always use A-D converters and D-A converters, but because they require extremely high precision, they require a trimming process, making them extremely costly. The current situation is that

A conventional AD to D converter will be explained below.

Figure 1 shows a circuit diagram of a conventional D-A converter, in which 1 is the current value generator for MS'B, 3 is a switch that turns on/off current source 1, and 4 is a switch that turns on current source 2.・
5 is a current value zero current source; 6 is a current addition point; 7 is the main part of the D-A converter including 1 to 6; 8
is an operational amplifier, 9 is a feedback resistor, and 10 is an analog voltage output point.

The operation of the conventional D-converter configured as described above will be described below.

First, the states of the N switches 3 and 4 are set according to digital input data of N pits given. Then, the currents of the current sources 1 and 2 corresponding to each switch in the on state and the current of the current source 6 are added, and the result is supplied from the current addition point 6 to the negative phase input of the operational amplifier and converted into a voltage. ,
Appears at analog voltage output point 10.

As described above, an analog voltage is obtained according to the applied digital input data, and DA conversion is performed.

It should be noted that the current source 5 is only for obtaining positive and negative polarity outputs.

Next, FIG. 2 shows a conventional example in which a sequential comparison type AD converter is constructed using the main part 7 of the DA converter shown in FIG.

In FIG. 2, 7 is the same as 7 shown in FIG. 1, 11 is an analog input point, 12 is a resistor, 13 is a comparator,
14 is a register for sequential comparison.

The operation of the conventional A-D converter configured as described above will be described below.

First, the input current value determined by the analog voltage applied to the analog input point 11 and the value of the resistor 12, and the switch 3 that sets only the D-A converter 70M5B to 1 and corresponds to the MSB.
The output current of the D-A converter 7 when only the switch is turned on) is added, and the comparator 13 compares whether the value is positive or negative. If it is positive, 1. If it is negative, A-D conversion is performed by sequentially storing O in the MSB of the comparison register and returning the LSBJ sequentially from the MSB.

As mentioned above, A-D and D-A converters configured as shown in Figs. 1 and 2 have large errors when manufactured, especially those with a large number of bits such as those used for digital audio. , if used as is for digital audio, distortion would increase and it would not be practical.

The error is when one bit is 1 and all the bits below it are 0.
It becomes large when the bit changes from a state of 0 to a state where all the bits below it are 1, and vice versa. This error then becomes distortion.

Figure 3 shows that when current sources 1 and 2 for each bit have errors of the same percentage, A-
D, shows the distribution of the worst value of the absolute value of the D-A conversion error.

In order to reduce the conversion error as described above, a conventional method has been to trim the current sources 1 and 2 of each bit. However, the inclusion of this trimming process has caused a problem in that the cost is extremely high.

OBJECT OF THE INVENTION The present invention solves the above-mentioned conventional problems, and provides an A-D for digital audio that does not require trimming.
The aim is to realize a D-A converter.

Structure of the Invention The present invention makes the current source corresponding to MSH variable, and adjusts it so that the difference between the analog voltage for digital data 011...1 and the analog voltage for 10o...O is 1 LSB. By controlling the analog audio signal so that it approaches the zero cross, the conversion error with respect to the zero cross of the analog audio signal is reduced, the perceptual distortion is reduced, and an A-D-I)-A converter that does not require trimming is realized. It is something that can be done.

DESCRIPTION OF THE EMBODIMENTS As mentioned above, the conventional example D- shown in FIGS.
If the A-A-D converter is not trimmed, it will have a conversion error distribution as shown in Figure 3.
As can be seen from the figure, the conversion error is the largest at the analog amplitude zero point, which means that the distortion at the zero crossing point of the audio signal becomes extremely large.

Since the value of this distortion is constant with respect to the amplitude of the audio signal, the distortion rate increases as the signal level decreases, making it very harmful to the auditory sense.

Therefore, if the distortion at this zero-crossing point can be removed, the residual distortion component will be proportional to the signal amplitude, as shown by the dotted line in Figure 3, so it will not be much of a problem from an audible perspective. The distortion at this zero crossing point is 1L in analog amplitude for digital data 011...1 in an A-D or DA converter.
This is due to an error between the analog amplitude for SB and the analog amplitude for the digital data 100...○.

FIG. 4 shows a circuit diagram of the D-A converter in the first embodiment of the present invention.

In FIG. 4, 1 to 10 are the same as the same numbers in the circuit diagram shown in FIG. 1, 15 is an input point for sampling,
16 and 17 are sample and hold circuits, and 18 is a comparator.

The operation of the D-A converter of this embodiment configured as described above will be explained below.

First, the operations of the parts 1 to 10 are the same as those shown in FIG.
The correction operation of the current source 1 for B will be explained by Nakagami.

An example of a time chart of the correction test signal is shown in FIG. In the example of FIG. 5, during one sample period of the audio signal, test signals 1. L channel data, test signal 2. It operates in the order of R channel data.

First, with test signal 1, switch 3 is turned off, all switches 2 are turned on, and the analog output voltage at that time is sampled and held by sample and hold circuit 16.

Next, with test signal 2, switch 3 is turned on, all switches 2 are turned off, and the analog output voltage at that time is
The sample and hold circuit 17 samples and holds the sample.

Then, the difference between the output voltages of these sample and hold circuits 1e and 17 is taken out via the comparator 18, and the output is
The current value of the current source 1 is controlled in such a direction that the difference between the respective output voltages becomes smaller.

By repeating the above operations, the difference between the analog output voltage for test signal 1 and the analog output voltage for test signal 2 becomes smaller, and as a result, a D-A converter with a very small error at the zero cross point can be realized. It is.

Note that the current source 2 and switch 4 in the embodiment shown in FIG. 4 are provided with two current sources and two switches each corresponding to the LSH, and one of them is
It is only switched on when the switch is on, and is always off at other times.

As a result, the error at the zero crossing point approaches zero. However, in the absence of this +1 current source and switch, the sum difference at the zero-crossing point approaches 1 LSB, but this value is so small that it may be ignored in practice. Therefore, the present invention is effective even in such cases.

Next, a second embodiment of the present invention will be described with reference to the drawings.

FIG. 6 is a circuit diagram showing a second embodiment of the present invention. In FIG. 6, 1 to 15 are the same as those with the same numbers in FIG. 4, 19 is an operational amplifier, 20.21 is a capacitor and switch for analog voltage sampling, 22 is a feedback capacitor of the operational amplifier 19, 23, 24, and 25 are feedback capacitors, switches, and leak resistances.

The correction operation of this embodiment will be explained.

Switches 21 and 24 operate as shown in FIG. First, when the test signal 10 occurs, the switches 21 and 24 are turned on, and the capacitor 20 is charged with an analog voltage corresponding to the test signal 1. Here, if a capacitor 23 with a sufficiently large value is used, the feedback impedance becomes small, so that the output of the operational amplifier 19 does not change much. Next, when the test signal is 2, the switch 21 is turned on, and the voltage difference between the analog voltages of the test signals 1 and 2 is amplified by the capacitance ratio of the capacitors 2o and 22 and appears at the output of the operational amplifier 19. , the current value of the current source 1 is controlled as in the case of FIG. In addition, in FIG. 6, the leak resistance 25 is connected to the switch 24.
This is for charging the capacitor 23 so that the voltage of the capacitor 23 becomes sufficiently close to the voltage of the capacitor 22 while the capacitor 23 is off.

Next, a third embodiment of the present invention will be described with reference to the drawings.

FIG. 8 is a circuit diagram showing a third embodiment of the present invention. In FIG. 8, 1 to 21 are the same as those with the same numbers in FIG. 6, 26 is a feedback resistor of the operational amplifier 19, 27 is a resistor for converting the output voltage of the operational amplifier 19 into a current, and 28 is a switch, and 29 is a capacitor.

The correction operation of this embodiment will be explained.

Switches 21 and 28 operate as shown in FIG. First, the analog voltage for the test signal 1 is charged in the capacitor 20, and then the analog voltage for the test signal 2 is applied to the capacitors 20--. Due to this voltage difference, a voltage obtained by differentiating it appears at the output of the operational amplifier 19. The voltage is converted into a current by a resistor 27, and is supplied to a capacitor 29 through a switch 28, and the voltage of the capacitor changes the current of the current source 1 as shown in FIGS.
Control as shown in the figure.

According to this embodiment, the first . Both the second and third embodiments are examples in which the present invention is implemented in a D-to-D converter, but as explained in the section of the conventional example, they are implemented as a part of a sequential comparison type A-D converter. It goes without saying that it can be constructed as

Effects of the Invention The present invention makes the MSB current of a D-A converter variable and converts it into digital data. By controlling the analog voltage to be equal at 11...1+ and 100/old...0, the error at the zero-crossing point can be reduced without trimming, making it audibly satisfying. It is possible to realize an AD and DA converter for digital audio with high performance.

[Brief explanation of drawings]

Fig. 1 is a circuit diagram of a conventional D-to-DC converter, Fig. 2 is a circuit diagram of a conventional A-D converter, Fig. 3 is a conversion error distribution diagram, and Fig. 4 is a diagram of a first embodiment of the present invention. 5 is an explanatory diagram of the operation of the embodiment of FIG. 4, FIG. 6 is a circuit diagram of the D- to converter in the second embodiment of the present invention, and FIG. 6 is an explanatory diagram of the operation of the embodiment, FIG. 8 is a circuit diagram of a D-to-converter in the third embodiment of the present invention, and FIG. 9 is an explanatory diagram of the operation of the embodiment of FIG. 1...First current source, 2...°...Second current source, 3...First switch, 4......
Second switch, 6...Current addition means, 8 to 9
, 15-29... Control means 0 Name of agent Patent attorney Toshio Nakao and 1 other person
l Cause 7 - l/JIIIK O-111sv, hat analog J
Figure 4 Figure 5 S No. 2 1-l Reto °゛ Sun 21 Hold No. 6
Figure 7 Suo Nchi 24 λn

Claims (1)

[Scope of Claims] (1) A first current source having a current value for roofing, a roofing source, a first switch that turns on and off the first current source, and a second a second switch that turns on and off each current source; and current adding means that adds the currents that have passed through the first and second switches of the first and second current sources; An A-D, D-A converter configured to set an output current value of the current adding means by a combination of switches turned on among the first and second switches, wherein the first current source The output current value of the current adding means when all the second switches are on, and the output current value of the current adding means when the first switch is on. A-D, D-, characterized in that it includes a control means for controlling the current value of the first current source in a direction in which the
A converter. 2. The AD and DA converters according to claim 1, characterized in that two channels are provided for each channel. (3) The control means includes a current-voltage conversion means provided at the output of the current addition means, first and second sample-hold means for sampling and holding the voltage of the output of the current-voltage conversion means, and 3. The eight-D/DA converter according to claim 1, further comprising means for detecting a difference between the output voltages of the first and second sample and hold means. (4) The control means includes a current-to-voltage conversion means provided at the output of the current addition means, an operational amplifier, and a first a series connection circuit of a capacitor and a third switch; a second capacitor connected between the output of the operational amplifier and the negative phase input; and the output, negative phase input, and positive phase input of the operational amplifier; Claim 1 or 2 comprises a third capacitor, a fourth switch, and a first resistor, each having one end connected to the third capacitor, the fourth switch, and the first resistor having the other ends connected to each other. Converter to A-D/D-. (5) The control means includes a current-voltage conversion means provided at the output of the current addition means, an operational amplifier, and a first a series connection circuit of a capacitor and a third switch; a second resistor connected between the output of the operational amplifier and the negative phase input; and a fourth capacitor connected to the output of the voltage-current conversion means, as set forth in claim 1 or 2. A-D, D-A converter.