JPH02309719A - Current mirror circuit - Google Patents

Abstract

PURPOSE:To reduce an error in accuracy due to a base current by supplying a bias current to the common base of the current mirror circuit from a bias transistor(TR) and connecting an impedance decrease resistance between the common base and a power source. CONSTITUTION:The bias current to the common base CB is supplied from the emitter of the bias TR Qb. Part of a constant current Icr is supplied as a bias current to the base of this Qb. Strictly speaking, collector currents of respective TRs generate errors due to the factor of the base current of the Qb as to the reference current Icr. The errors, however, are 1/hfe as large as the current amplification factor hfe of the bias TR Qb. Namely, the errors are reduced greatly to 1/100-1/200 as large as usual and can be ignored.

Description

DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a current mirror circuit, and is particularly capable of high-speed operation with a highly accurate circuit.

2. Description of the Related Art Conventionally, this type of current mirror circuit has had a configuration as shown in FIG. In FIG. 6, IR is a reference current source, Q r , Ql, Q2 . Q: +-Qo is a transistor, Rr, R+, R2, R3...L are resistors, SW+, SW2. SW3. =SW is a switch circuit. Here, its operation will be explained. A constant current Icr from a current source IR connected to a diode-connected reference transistor Qr causes an I e r to be applied to a resistor Rr.
A voltage XRr is generated, and the same voltage is applied to each emitter of the other transistors QIIQ2゜Q3...Qo whose bases are connected in common,
An emitter current 1el is generated in the emitter of transistor Q2, and an emitter current 1e2 is generated in the emitter of transistor Q2.
These emitter currents flow from their respective collectors to switch circuits S W+ , S W2 . SW:l, -S
W, and is output to the current output terminal 1o. In the circuit shown in Figure 6, resistors R1, R2J R3...L are 1:2:+
:S..., and the switch circuit SW+,
SW2, SW3- SW.

A weighted current generation type D/A conversion circuit is constructed by using current changeover switches.

In such a conventional circuit, since the reference transistor Qr is diode-connected, the base current applied to the plurality of transistors is also supplied from the reference current (cr), and the reference current 1cr and the collector current of each transistor are 1ct+IC2, IC3...River C1 generates an error due to these base currents compared to the reference current JCr.This error becomes a value that cannot be ignored in a highly accurate circuit.Also, as shown in Fig. 6, There is a stray capacitance C between the base and collector of each transistor constituting the current mirror circuit and between the corephthal substrate.
The current mirror circuit has the two major drawbacks of lowering the response speed of the current mirror circuit.

Problems to be Solved by the Invention The present invention solves these conventional problems.
It achieves high precision characteristics and high speed characteristics at the same time.

Means for Solving the Problems In order to solve this problem, the present invention supplies a bias current from a bias transistor to a common base of a plurality of transistors constituting a current mirror circuit.

Effect: This configuration eliminates accuracy errors caused by base current, and also enables high-speed operation by connecting an impedance-lowering resistor between the common base and the power supply.

Embodiment FIG. 1 is a diagram showing the configuration of an embodiment of the current mirror circuit of the present invention, in which a plurality of transistors Qr, Q1 . Q2. (
Among h-Qo, the emitter of the reference transistor Qr is connected to the power supply Ve through the resistor Rr, the collector is connected to the reference current source IR, and a constant current 1 cr is applied thereto, and the emitters of the other transistors are connected to the resistors R11, R2, R2, R3,...
- Connected to the power supply Ve via Ro, and the collectors are connected to switch circuits SWI, SW2 . SW3. -8W to the current output terminal IO, the common base CB is connected to the emitter of the bias transistor Qb, and the base of the bias transistor Qb is connected to the collector of the reference transistor Qr. Here, its operation will be explained. The basic operation is the same as the conventional example shown in FIG. 6, but the bias current to the common base CB is not supplied from the constant current 1cr but from the emitter of the bias transistor Qb. A portion of the constant current for is supplied to the base of the bias transistor Qb as a bias current. Therefore, strictly speaking, with respect to the reference current 1cr, an error occurs in the collector current of each transistor due to the base current of the bias transistor Qb, but compared to the conventional example shown in FIG. 1 for the current amplification factor hfe of
/hfe, that is, it is greatly reduced to 1/loo to 1/200, and the error becomes a negligible value.

In the embodiment shown in FIG. 2, a diode D is connected between the emitter of the bias transistor Qb and the common base C8. This ensures more stable operating characteristics of transistor Qr, and also improves the stability of transistor Qr and other transistors Q1. Q2.
By bringing the collector-emitter voltages Vce of Q3...Qo closer together, better masociation between these transistors can be achieved.

Next, an embodiment that enables high-speed operation will be described with reference to FIG. In the illustrated embodiment, the common base CB and the power source Ve
An impedance lowering resistor Rb is connected between them. Here, its operation will be explained. As explained in the conventional example of FIG. 6, each transistor constituting the current mirror circuit has a stray capacitance C6 between the base and collector and between the corephthal substrate.

On the other hand, a switch circuit SW switches the current and outputs it to the current output terminal ■0 or flows out to the ground point.
, , SW, SW, -8Wo require considerably high speed operation. When these switch circuits operate at high speed, the collector voltages of the transistors Qll, Q21, Q31...Qn are affected by the switch operation. The pulse-like fluctuation of the collector voltage of the transistor causes the stray capacitance Cs
This induces pulse-like voltage fluctuations on the common base CB. In particular, the common base CB has a high input impedance, so it is less susceptible to the effects of pulse voltage changes due to stray capacitance.As in the embodiment shown in Fig. 3, by connecting a resistor Rb that lowers the impedance, The common base CB is less affected by stray capacitance, and the switch circuit S
Even if Wl, SW2, SW3, .

An embodiment of the present invention that takes into consideration the temperature characteristics of the current mirror circuit will be described with reference to FIG. In the embodiment shown in FIG. 3, the content of the impedance lowering resistor Rb is not particularly restricted. In cases where very highly accurate characteristics are required, such as in a measurement circuit, the embodiment shown in FIG.

Due to differences in the characteristics of R++ R2*R3...R, especially differences in temperature characteristics, sufficient precision characteristics may not be obtained. The embodiment shown in FIG. 4 achieves high-speed operation and highly accurate temperature characteristics at the same time, and the characteristics of the impedance lowering resistor Rb are connected to the emitters of each of a plurality of transistors with well-balanced characteristics. resistance R
By matching the characteristics of r, R1, R2, R1, .

In the embodiments shown in FIGS. 3 and 4, the impedance lowering resistor Rb is directly connected between the common base CB and the power source Ve, but even in this connection, there are common specifications for better temperature characteristics. It is preferable to connect a diode in the forward direction between the base and the resistor Rb. This method is often practiced in such high-precision circuits.

In such an embodiment, the values of the resistors R1, R2, R3...Ro that constitute the current mirror circuit are 1:2:4:8:
..., and the respective collector currents are divided into switch circuits S Wl, S W2 , S W3"' S
By adding them through Wn and connecting them to the current output terminal 1o, it is possible to configure a D/A conversion circuit that operates the current mirror circuit as a weighted current generation circuit. Such a /A conversion circuit can provide the same effects as those already described, has good temperature characteristic accuracy, and is capable of high-speed operation.

The embodiment shown in FIG. 5 has a built-in D/A conversion circuit 1 that operates the current mirror circuit of the present invention as a weighted current generation circuit, and a comparator 2 and a successive approximation register 3 are connected to this, and a successive approximation type This is a configuration of an A/D conversion circuit. In the case of this A/D converter circuit as well, it is possible to realize an A/D converter circuit that has very good temperature characteristics and is capable of high-speed operation.

Effects of the Invention As described above, according to the present invention, the bias current to be supplied to the common base of the current mirror circuit is supplied from the bias transistor, and the impedance reducing resistor is connected between the common base and the power source Ve. It has good temperature characteristics and can operate at high speed.

[Brief explanation of drawings]

1 to 4 are circuit diagrams of current mirror circuits according to embodiments of the present invention, and FIG. 5 is an A/D circuit diagram using the same circuit.
FIG. 6 is a circuit diagram of a conventional current mirror circuit. IR...Reference current source, Io...Output terminal, Qr. Qb, QIT Q2. Q3...Qn...Transistor, Rr * Rb r RI, R2r R3.
"Rn...'"'Resistance, sw,,SW,,,sw3
...SWo...Switch circuit, CB...
...Common base, D...Diode. Name of agent Patent attorney Shigetaka Awano and one other person IR-X Guide Figure 1 Figure 2 Figure 3 Figure 4 Ward

Claims (5)

[Claims] (1) It has a plurality of transistors whose bases are commonly connected, and among the transistors, the emitter of the reference transistor is connected to the power supply via a resistor, the collector is connected to the reference current source, and the other The emitters of each transistor are connected to the power supply through a resistor, and
A current mirror circuit in which the collectors are each connected to a current output terminal via a switch circuit, the emitter of a bias transistor is connected to a common base, and the base of the bias transistor is connected to the collector of the reference transistor. (2) The current mirror circuit according to claim 1, further comprising a diode connected between the emitter of the bias transistor and the common base. (3) The current mirror circuit according to claim 1, further comprising an impedance lowering resistor connected between the common base and the power supply. (4) The current mirror circuit according to claim 3, wherein the characteristics of the impedance lowering resistor are matched with the characteristics of the resistor connected to the emitters of each of the plurality of transistors. (5) A D/A conversion circuit that operates the current mirror circuit according to claim 3 as a weighting current generation circuit.