JPS63187740A - Digital signal transmission equipment - Google Patents

Abstract

PURPOSE:To improve the real time property of digital signal transmission by temporarily storing digital signals obtained by voice encoding circuits in memory circuits and multiplexing them after division and transposition in order circuits. CONSTITUTION:A transmission equipment consists of plural channels ch1 and ch2 of systems, which have voice encoding circuits 1a and 1b which subject voice inputs to A/D conversion at every sampling period to compress bands, memory circuits 3a and 3b where digital signals outputted from these voice encoding circuits are temporarily stored, and order circuits 4a and 4b which successively read out temporarily stored digital signals and input them to not only divide them into an optional number but also arrange them on the time base, and a multiplexing circuit 5 which multiplexes output signals from order circuits of respective channels and transmits them to a transmission line. Since digital signals which are divided into N-number of signals and are arranged on the time base at every sampling period are multiplexed and transmitted, the time from reception of the signal of the channel ch1, to reception of the signal of the channel ch2 is shortened to 1/N of the conventional time to improve the real time property.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a digital signal transmission device for high-speed digital lines.

(Prior Art) Conventionally, when multiplexing and transmitting audio digital signals of multiple channels, as shown in FIGS. After performing analog/digital conversion (A/D conversion) to compress the band, a pit stream frame is created for each sample period, and the digital signal is simply multiplexed as is, as shown in Figure 3(e). Ta.

(Problem to be Solved by the Invention) Therefore, it takes at least one frame worth of time (
In this case, the transmission time is 16 m5), and therefore there is a problem in transmitting digital signals that require real-time performance.

The present invention solves the problems of the prior art described above, and provides a digital signal transmission device that improves real-time performance in digital signal transmission.

(Means for Solving the Problems) In order to achieve the above object, the present invention provides an audio encoding circuit that A/D converts audio input at each sample period to compress the band, and a A plurality of channels of a system having a memory circuit that temporarily stores the output digital signal, a sequential circuit that sequentially extracts and inputs the temporarily stored digital signal, divides it into an arbitrary number, and arranges it in time, and each channel. and a multiplexing circuit that multiplexes the output signals from the sequential circuit and sends the multiplexed signals to a transmission line.

(Function) According to the above configuration, digital signals divided into a plurality (N) of signals per sampling period and arranged in time are sequentially switched from each channel to the multiplexing circuit, where they are multiplexed and sent out to the line. Therefore, after receiving the chl signal, ch2
The time it takes to receive a signal is reduced to 1/N compared to the conventional method, which is extremely advantageous in terms of real-time transmission.

(Example) Hereinafter, embodiments will be described in detail based on the drawings.

FIG. 1 shows an embodiment of the present invention, in which la, l
b is an audio encoding circuit that A/D converts the audio input every sample period and compresses the band.

2a and 2b are switching circuits for switching between an audio digital signal input and a non-audio digital signal input.

3a and 3b are memory circuits 4a which input digital signals and have a first-in, first-out data storage function;

4b is a sequential circuit that sequentially reads and inputs digital signals temporarily stored in a memory circuit, divides them into arbitrary numbers, and reassembles them into a required time arrangement; 5 is a sequential circuit 4a that sequentially switches each channel.

A multiplexing circuit multiplexes the divided signals supplied from 4b and sends it to a high-speed digital line, and 6 is a synchronous control circuit that supplies control signals to the memory circuit and the sequential circuit.

Next, the operation of this embodiment will be explained. First, the audio input from the telephone line etc. to the audio encoding circuits 1a, lb is A/D converted into, for example, an 8-bit PCM signal, and the band is compressed to 1/4 of the original signal, as shown in FIG. a), (b
), the required number of bits (here, 32X 8 =256 bits) is output at once for each sampling period. Note that (a) to (e) in FIG. 2 show signals at a to e in FIG. 1. The output digital signal is
Since several channels exist in the same time zone in one frame, in order to multiplex and transmit all of these digital signals without fail, the digital signals are passed through audio/digital switching circuits 2a and 2b, respectively. The data are temporarily stored in the memory circuits 3a and 3b. The accumulated signals are sequentially read out from the first bit in synchronization with the system by a control signal from the synchronization control circuit 6, and are read out sequentially from the first bit to the sequential circuits 4a and 4b.
, where it is converted to the required array. This bit arrangement can be freely changed by a control signal from the synchronization control circuit, and can be changed from 1 to the maximum number of bits in the sampling period. In this way, the digital signal for each sample period is divided into the required number of parts as shown in FIGS.
The signals are multiplexed and output to a high-speed digital line as a signal shown in FIG. 2(e).

In the case of digital signal input, when inputting the digital signal, the amount corresponding to 1/4 of each frame is
), (b) and stored in the memory circuits 3a, 3b via the audio/digital switching circuits 2a, 2b in the same manner as in the case of audio input. Then, it is similarly divided by sequential circuits 4a and 4b.

The signals are rearranged and multiplexed by the multiplexing circuit 5.

In this embodiment configured as described above, as shown in FIG. 2(e), the time from receiving the chi signal to receiving the ch2 signal is shortened to 1/4 of the conventional one. This makes it possible to quickly find out what kind of signal is input to each channel.

In addition, in the example, a 2eh one was explained, but a 3eh one was explained.
The same configuration can be applied even if the channel is channel or more.Also, in the embodiment, the digital signal is divided into four for each sampling period, but the synchronization control circuit can arbitrarily output a control signal corresponding to any number of divisions. If the configuration is configured to allow this, it is generally possible to divide into N, and the number of divisions can be arbitrarily set to accommodate multiple channels.

(Effects of the Invention) As is clear from the above embodiments, the present invention temporarily stores digital signals obtained by an audio encoding circuit or input digital signals to form a pit stream similar to the digital signal in a memory circuit. It is configured to divide, rearrange, and multiplex using a sequential circuit, reducing the time required to detect what kind of signal is transmitted to each channel to 1/N compared to conventional methods, and realizing real-time performance. This is extremely advantageous in terms of transmission.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention;
FIG. 2 is a diagram showing signals of each part of the same embodiment, and FIG. 3 is a diagram showing signals of each part of the same embodiment.
FIG. 3 is a diagram showing signals in a conventional example. la, lb...speech encoding circuit, 2a, 2b...
Audio/digital switching circuit, 3a, 3b... memory circuit, 4a, 4b... sequential circuit, 5... multiplexing circuit, 6... synchronous control circuit. Patent applicant: Matsushita Electric Industrial Co., Ltd. 9M Figure 3

Claims (1)

[Claims] An audio encoding circuit that performs analog/digital conversion of audio input at each sampling period to compress the band; a memory circuit that temporarily stores the digital signals output from this audio encoding circuit; and a memory circuit that sequentially reads out the temporarily stored digital signals. A multiplexing circuit that multiplexes the output signal from the sequential circuit of each channel and sends it to a transmission line. A digital signal transmission device characterized by: