JPS63181579A - Emphasis circuit - Google Patents

Abstract

PURPOSE:To compress a high frequency signal when it is at a high input level to prevent the generation of an overmodulation and to improve the sharpness of a reproduced picture by providing a low pass filter in the main transmission path or the sub-transmission path of an emphasis circuit. CONSTITUTION:When the level of an input signal is high, for instance, 350 mVp-p, a limiter 36 functions to lower the gain of the subtransmission path. In the total gain-frequency characteristic of both the emphasis circuits 10 and 30, a frequency having a maximum gain is lowered as shown by a solid line in the drawing and a high frequency is lower than the conventional one by being influenced by the low pass filter LPs formed in the main transmission path 31. In such a case, the deterioration in the gain in the frequency of 3MHz is 3.2 dB and accordingly, the quantity of the level compression of a signal component of 3MHz is 3.2-1.6=1.6 dB. In such a way, a high frequency component, especially, a spike is compressed to prevent the overmodulation.

Description

[Detailed description of the invention] [Industrial application field] The present invention relates to an emphasis circuit suitable for a VTR.

[Summary of the invention]

The present invention compresses high-frequency signals at high input levels and prevents overmodulation by providing a low-pass filter in the main transmission path or sub-transmission path of the emphasis circuit in a non-linear emphasis circuit. At the same time, the sharpness of the reproduced image is improved.

[Conventional technology]

As is well known, video tape recorders (hereinafter abbreviated as VTR) are based on low-carrier FM recording, and the noise spectrum after demodulation becomes so-called triangular noise. For this reason, video emphasis is employed to emphasize the high-frequency components of the video signal during recording and return it to a flat characteristic after demodulation to suppress the high-frequency noise components, thereby improving the S/N of the demodulated signal.

An example of the configuration of a conventional emphasis circuit is shown in FIG.

In FIG. 4, the OI and Q fields collectively represent the main and auxiliary emphasis circuits, respectively, and both emphasis circuits Ql and (2) are cascaded at terminals (1) and (4).

In the main emphasis circuit α, the input signal from the terminal (1) is supplied to the adder side via the main transmission line αD, and is also commonly supplied to the low-pass filter αl and the subtractor (b). The subtractor a is connected so that the output of the low-pass filter α is subtracted from the input of the subtractor a, thereby forming a high-pass filter HP and forming a sub-transmission path. The output of this high-pass filter 11P, that is, the subtracter (
The output of 2) is supplied to an adder 0 via a variable attenuator α, and an output signal adjusted to a predetermined high-frequency rise characteristic is derived from the adder 0 to a terminal (2).

Note that the low-pass filter α or the subtracter Q41 includes an amplifier (not shown) with an appropriate gain.

In the sub-emphasis circuit Q, the input signal from the terminal (3) is supplied to the adder (22) via the main transmission line (21), and is also supplied to the low-pass filter (23) and the subtracter (
24). In the subtractor (24),
The output of the low-pass filter (23) is connected to be subtracted from the input of the subtracter (24), and the high-pass filter 11P1
is configured, and a sub-transmission path is formed. The output of the subtracter (24) is supplied to the limiter (26) via the amplifier (25), and the output of the limiter (26) is supplied to the adder (22). ) is summed with the input signal. The overall gain-frequency characteristics of these emphasis circuits OI and +21 change as shown by the solid line and the dashed-dotted line in FIG. Emphasis is applied.

In addition, in FIG. 5, the amount of decrease in gain at a frequency of 3 MHz is 2.1 dB for a low-level input signal, and 2.6 dB for a high-level input signal, based on the gain at a frequency of I MHz. It is.

[Problem that the invention seeks to solve]

By the way, in a portion where a video signal rises, such as the leading edge of an image, a differential waveform (spike) of the rising edge is generated due to the above-mentioned emphasis. The steeper the rise of the video signal, that is, the higher the signal component is in the high frequency region, and the higher the input level, the larger the amplitude of this spike becomes.This causes the instantaneous frequency of the FM luminance signal to reach a predetermined value. If the value is exceeded, overmodulation is likely to occur, and if this overmodulation is severe, an inversion phenomenon of the reproduced image will occur, and the image quality will deteriorate significantly.

In order to prevent this overmodulation, conventionally, the amplitude limiting level of the limiter (26) of the sub-enhancement system circuit Q- is appropriately set to clip the spikes.

However, as mentioned above, when a spike part is clipped, the high-frequency components of the video signal in that part are lost, so the original waveform is not correctly reproduced during playback, and the slope of the rise of the video signal becomes gentle. ,゛
There was a problem in that the sharpness of the reproduced image was impaired.

In view of this, an object of the present invention is to provide an emphasis circuit that prevents overmodulation and improves the sharpness of reproduced images.

[Means for solving problems]

The present invention provides an emphasis circuit that has a main transmission line equipped with an adding means and a sub-transmission line equipped with a high-pass means and an amplitude limiting means, and supplies a signal of the sub-transmission line to the adding means. This is an emphasis circuit in which low-pass means is provided on either the main transmission line or the sub-transmission line.

[For production]

With this configuration, the high frequency signal is compressed when the input level is high, thereby preventing overmodulation and loss of high frequency components.

(Embodiment) Hereinafter, an embodiment of an emphasis circuit according to the present invention will be described with reference to FIGS. 1 and 2.

FIG. 1 shows the configuration of an embodiment of the present invention. In FIG. 1, parts corresponding to those in FIG. 4 are designated by the same reference numerals and redundant explanation will be omitted.

In FIG. 1, (30) indicates the sub-emphasis circuit as a whole, and parts corresponding to those in FIG. 4 are given the same reference numerals.

The main transmission line (31) of the sub-emphasis circuit (30) includes:
A subtracter (37) is provided on the input side of the adder (32),
The input signal from the input terminal (3) is directly supplied to this subtractor (37) and also subtractively supplied via the high-pass filter (38), and the low-pass filter LP is connected to the main transmission line ( 31). Further, the low-pass filter (33) to the limiter (36) of the sub-transmission line are constructed in the same manner as in the conventional example shown in FIG.

The operation of this embodiment is as follows.

When the level of the input signal is as low as 35 mVp-p, for example,
Since the limiter (36) does not function, the characteristics of the sub-emphasis circuit (30) are generally controlled by the sub-transmission line, and as shown by the dashed line in FIG.
Frequency characteristics can be obtained. In this case, the gain reduction at the 3M1lz frequency is 1.6 dB.

When the level of the input signal is as high as 350 vp-p, for example, the limiter (36) functions and the gain of the sub-transmission path decreases, so that the low-pass filter LP formed in the main transmission path (31) As a result, both emphasis circuits OI and (3
As shown by the solid line in FIG. 2, the overall gain-frequency characteristic of 0) is such that the frequency at which the gain is maximum is lowered, and the high range is lower than that of the conventional one. In this case, the gain reduction at a frequency of 3 MHz is 3.2 dll.

Therefore, the level compression amount of the 3MIIz signal component is 3.2
-1.6 = 1.6dB.

In this way, in this embodiment, the gain reduction in the high frequency region at high input levels is greater than that at low input levels, and the high frequency components, especially spikes, are compressed to that extent, and overmodulation is prevented. Ru.

Moreover, since the spikes are simply compressed, there is no loss of high frequency signal components, the original waveform is correctly reproduced during reproduction, and the sharpness of the reproduced image is improved.

Next, another embodiment of the emphasis circuit according to the present invention will be described with reference to FIG.

The structure of another embodiment of the present invention is shown in FIG.

In FIG. 3, (40) indicates the sub-emphasis circuit as a whole, and parts corresponding to those in FIG.

(5) and (6) are input terminals and output terminals for recording, (
7) and (8) are input terminals and output terminals for reproduction, and the switch (9) is in the connection state shown in the figure in the recording mode, and is switched to the connection state opposite to that shown in the figure in the playback mode.

A sub-transmission line limiter (46) consisting of a low-pass filter (43), etc. connected to the movable contact (9c) of the switch (9)
A subtracter (47) is provided on the output side of the subtracter (47), and the output of the movable contact (9c) of the switch (9) is supplied to the subtracter (47) via a high-pass filter (48). Low-pass filter L on the sub-transmission line of the emphasis circuit (40)
P.

is formed.

Then, in the recording mode, the output of the subtracter (47) is added (feedforward) to the input signal from the input terminal (5) in the adder (42), and as in the embodiment of FIG. Operates as a linear emphasis circuit. In the playback mode, in the adder (52), the subtracter (47)
The output of is added (feedback) to the input signal from the input terminal (7) to operate as a non-linear de-emphasis circuit.

In the embodiment of FIG. 3, each terminal +51. (61,f
71°(8) signal respectively VS+V&+V? +
If Vl is the transfer function of the sub-transmission path and H(s), then
The transmission characteristics of the sub-emphasis circuit (40) during recording and reproduction are expressed by the following equations (1) and (2), respectively.

vs+H(s) vs=v*V! /VS-1+H(s)-(1
)vt H(s) vs=vs Vl/V7-1/ (l +H(s)l
-(2) As is clear from a comparison of both equations, in the embodiment shown in FIG. can be played more correctly.

〔Effect of the invention〕

As described in detail above, according to the present invention, a low-pass filter is provided in the main transmission path or sub-transmission path of the nonlinear emphasis circuit to compress high-frequency signals when the input level is high. An emphasis circuit that can prevent overmodulation without causing dropouts and improves the sharpness of reproduced images can be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the emphasis circuit according to the present invention, FIG. 2 is a diagram showing the frequency characteristics of the embodiment of the emphasis circuit shown in FIG. 1, and FIG. 3 is a diagram showing another embodiment of the invention. FIG. 4 is a block diagram showing a configuration example of a conventional emphasis circuit, and FIG. 5 is a diagram showing frequency characteristics of the conventional example shown in FIG. (30) and (40) are emphasis circuits, (31)
, (41) is the main transmission line, (32), (42) is the adder, (36), (46) beam mink, (37)
, (47) is a subtracter, HP is a high-pass means, LP
, is a low-pass means. Other embodiment Fig. 3

Claims (1)

[Claims] 1. A main transmission line provided with an adding means and a sub-transmission line provided with a high-pass means and an amplitude control means, and the signal of the sub-transmission line is supplied to the adding means. An emphasis circuit characterized in that a low-pass means is provided on either one of the main transmission line and the sub-transmission line. 2. The emphasis circuit according to claim 1, wherein low-pass means is provided on the input side of the addition means of the main transmission line. 3. A subtraction means is provided on the output side of the amplitude control means of the sub-transmission line, and the input signal of the sub-transmission line is supplied to the subtraction means via a second high-pass means, so that the sub-transmission line 2. An emphasis circuit according to claim 1, wherein the low-pass means is formed in the emphasis circuit.