JPS63178326U

JPS63178326U -

Info

Publication number: JPS63178326U
Application number: JP7007587U
Authority: JP
Priority date: 1987-05-11
Filing date: 1987-05-11
Publication date: 1988-11-18
Also published as: JPH0432757Y2

Description

[Brief explanation of the drawing]

第１図は本考案の一実施例によるプローブカー
ドの構成図、第２図は第１図のプローブカードの
テスタヘツドへの取付け状態及びＬＳＩチツプの
特性の測定状態を示す図、第３図は一の電源配線
シートの構造を示す第１図中−線に沿う展開
断面図、第４図は別の電源配線シートの構造を示
す第１図中−線に沿う展開断面図、第５図は
一の電源配線シートとプローブカード本体とを組
み合わせてなる第１のプローブカードを使用して
の一のＬＳＩチツプの特性測定を説明する図、第
６図は別の電源配線シートとプローブカード本体
とを組み合わせてなる第２のプローブカードを使
用しての別のＬＳＩチツプの特性測定を説明する
図、第７図は電源配線シートの変形例を示す図、
第８図は第７図中−線に沿う展開断面図、第
９図は第７図の電源配線シートを組み合わせてな
るプローブカードの使用例を示す図、第１０図は
電源配線シートの変形例を示す図、第１１図は第
１０図中―線に沿う断面展開図、第１２
図は第１０図の電源配線シートを組み合わせてな
るプローブカードの使用例を示す図、第１３図は
従来のプローブカードの１例の使用例を示す図、
第１４図は特性測定状態におけるプローブカード
の平面図、第１５図は第１４図中のウエハ状態の
ＬＳＩチツプを取り出して示す図、第１６図は別
のウエハ状態のＬＳＩチツプを示す図、第１７図
は第１６図のＬＳＩチツプの特性を測定するプロ
ーブカードの平面図である。図において、１はプローブカード、２はプリン
ト基板、３〜６は探針、７，８は基準孔、９は電
源用パツド、１０〜１３はパツド、１８はテスタ
ヘツド、１９は電源供給ピン、２０〜２３は信号
入出力ピン、２４，２５はガイドピン、２６はテ
ーブル、２７，３４はウエハ、２８，３５はウエ
ハ状態のＬＳＩチツプ、２９，３７は電源用パツ
ド、３０〜３２，３６〜３９は信号用パッド、５
０はプローブカード本体、５１，５２，８０，９
０は電源配線シート、５３，８２は第１のプロー
ブカード、５４，９２は第２のプローブカード、
５５，５６，５７，５８は基準孔、６０，７０，
８１，９１は導電シート部、６１，６２，７１，
７２は絶縁シート部、６３，７３，６３ａ，７３
ａは第１の電極部、６４，７４，６４ａ，７４ａ
は第２の電極部、６５〜６７，７５〜７７は貫通
孔である。 FIG. 1 is a configuration diagram of a probe card according to an embodiment of the present invention, FIG. 2 is a diagram showing how the probe card of FIG. 1 is attached to a tester head and how the characteristics of an LSI chip are measured, and FIG. Figure 1 is a developed cross-sectional view taken along line - in Figure 1 showing the structure of a power supply wiring sheet; Figure 4 is a developed cross-sectional view taken along line - in Figure 1 showing the structure of another power supply wiring sheet; Figure 6 is a diagram illustrating the measurement of the characteristics of an LSI chip using a first probe card which is made up of a combination of a power supply wiring sheet and a probe card body. A diagram illustrating characteristic measurement of another LSI chip using a second probe card in combination, FIG. 7 is a diagram showing a modification of the power supply wiring sheet,
Figure 8 is a developed sectional view taken along the line - in Figure 7, Figure 9 is a diagram showing an example of the use of a probe card made by combining the power supply wiring sheets shown in Figure 7, and Figure 10 is a modified example of the power supply wiring sheet. Figure 11 is a cross-sectional developed view taken along the line in Figure 10, Figure 12 is a diagram showing
The figure shows an example of the use of a probe card made by combining the power supply wiring sheet of Fig. 10, and Fig. 13 shows an example of the use of an example of a conventional probe card.
FIG. 14 is a plan view of the probe card in the characteristic measurement state, FIG. 15 is a diagram showing the LSI chip in a wafer state taken out from FIG. 14, and FIG. 16 is a diagram showing the LSI chip in another wafer state. FIG. 17 is a plan view of a probe card for measuring the characteristics of the LSI chip shown in FIG. 16. In the figure, 1 is a probe card, 2 is a printed circuit board, 3 to 6 are probes, 7 and 8 are reference holes, 9 is a power supply pad, 10 to 13 are pads, 18 is a tester head, 19 is a power supply pin, and 20 -23 are signal input/output pins, 24 and 25 are guide pins, 26 is a table, 27 and 34 are wafers, 28 and 35 are LSI chips in wafer state, 29 and 37 are power supply pads, 30-32, 36-39 is a signal pad, 5
0 is the probe card body, 51, 52, 80, 9
0 is a power supply wiring sheet, 53 and 82 are first probe cards, 54 and 92 are second probe cards,
55, 56, 57, 58 are reference holes, 60, 70,
81, 91 are conductive sheet parts, 61, 62, 71,
72 is an insulating sheet portion, 63, 73, 63a, 73
a is the first electrode part, 64, 74, 64a, 74a
is a second electrode portion, and 65 to 67 and 75 to 77 are through holes.

Claims

[Claims for Utility Model Registration] It consists of a printed circuit board with a plurality of probes attached, and the power supply pins and signal input/output pins of the tester head and each of the probes are connected to each other through pads and wiring on the printed circuit board. In a probe card used to test LSI chips in multiple types of wafer states, which are connected to each other and attached to the tester head, and have the same bonding pad arrangement and different positions of power supply pads, The probes 3 to 6 are attached to the bonding pads 29 to 3 above.
2, 36 to 39, a single probe card main body 50 attached to a printed circuit board, middle conductive sheet parts 60, 70, 81, 91, and upper and lower insulating sheet parts 61, 62, 71, 72 parts, and the first part is in contact with the power supply pin 19.
The contact pads 10, 1 of the probe card are electrically connected to the probes 3, 4 which are in contact with the electrode parts 63, 73, 63a, 73a, and the power supply pads 29, 37.
1 and the second electrode portion 64, 74, 64a,
74a is exposed and each signal input/output pin 22, 23
Through holes 65, 66, 67, 75, 76 corresponding to
, 77, and a plurality of power supply wiring sheets 51, 52, 80, 90, one for each type of LSI chip 28, 35, and a predetermined wiring sheet according to the type of LSI chip to be tested. One power wiring sheet is connected to the probe card main body 50.
The power supply is replaceably attached to the power supply pin 19, the first electrode portions 63, 73, 63a, 73a, the conductive sheet portions 60, 70, 81, 91, and the second electrode portions 64, 74. , 64a, 74a, the pads 10, 11 on the printed circuit board, the power pad 29 of the LSI chips 28, 35 via the predetermined probes 3, 4.
, 37, and the signal input/output pins 22, 23 are in mechanical contact with the pads 12, 13 on the printed circuit boards 28, 35 through the through holes 65-67, 75-77, respectively. .