JPS63177605A - Piezoelectric thin film resonator - Google Patents

Piezoelectric thin film resonator

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Publication number
JPS63177605A
JPS63177605A JP825687A JP825687A JPS63177605A JP S63177605 A JPS63177605 A JP S63177605A JP 825687 A JP825687 A JP 825687A JP 825687 A JP825687 A JP 825687A JP S63177605 A JPS63177605 A JP S63177605A
Authority
JP
Japan
Prior art keywords
protective film
thin film
piezoelectric thin
substrate
void layer
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP825687A
Other languages
Japanese (ja)
Other versions
JPH07114340B2 (en
Inventor
Yoichi Masuda
増田 陽一
Choji Narahara
楢原 長次
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Toshiba Corp
Original Assignee
Toshiba Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Toshiba Corp filed Critical Toshiba Corp
Priority to JP825687A priority Critical patent/JPH07114340B2/en
Publication of JPS63177605A publication Critical patent/JPS63177605A/en
Publication of JPH07114340B2 publication Critical patent/JPH07114340B2/en
Anticipated expiration legal-status Critical
Expired - Lifetime legal-status Critical Current

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Abstract

PURPOSE:To prevent a variation of an electric characteristic, and to superminiaturize the titled resonator by providing the upper air-gap layer on the surface of the opposite side to a substrate of a piezoelectric body which is formed through the lower air-gap layer on an arbitrary substrate, and to which plural electrodes are connected, and also, providing the upper air-gap layer protective film. CONSTITUTION:A resonator is formed on a substrate 1, and constituted of the lower protective film 2, the lower electrode 6, a piezoelectric body 5, the upper electrode 7, the upper protective film 3, and the upper air-gap layer protective film 4 in order upward. Also, the lower air-gap layer 8 and the upper air-gap layer 9 are provided between the substrate 1 and the lower protective film 2, and between the upper protective film 3 and the upper air-gap layer protective film 4, respectively. The air-gap layer 8 and the air-gap layer 9 are selected to thickness by which the protective film 2 does not come into contact with the substrate when it has been vibrated downward, and to thickness by which the protective film 3 does not come into contact with the protective film when it has been vibrated upward, respectively. In such a way, even if a foreign matter adheres to the upper part, and even if it is further molded, a variation of an electric characteristic is prevented and the resonator can be superminiaturized.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) この発明は、高周波発振器等に用いられる圧電薄膜共振
子lこ関する。
DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Field of Industrial Application) The present invention relates to a piezoelectric thin film resonator used in a high frequency oscillator or the like.

(従来の技術) 従来、高周波発振器の発振源等に用いる共振子として第
4図に示すような圧電薄膜共振子が考案されている。こ
の共振子は、基板1上に形成され上へ順に下部保護膜2
.下部電極6.圧電体5゜上部電極7.上部保護膜3に
より構成されている。
(Prior Art) Conventionally, a piezoelectric thin film resonator as shown in FIG. 4 has been devised as a resonator used as an oscillation source of a high frequency oscillator. This resonator is formed on a substrate 1 and sequentially extends upward into a lower protective film 2.
.. Lower electrode 6. Piezoelectric body 5° upper electrode 7. It is composed of an upper protective film 3.

そして、圧電体5が上下に振動することにより上部電極
7と下部電極6との間にその振動周波数による電気信号
が得られる。圧電体5が上下に振動する際上部保護膜3
.下部保獲膜2.上部電極7゜下部電極6も同様に振動
するが、下方向へ振動した時に下部保護膜2が基板1に
接触しないように。
Then, as the piezoelectric body 5 vibrates up and down, an electric signal is obtained between the upper electrode 7 and the lower electrode 6 based on the vibration frequency. When the piezoelectric body 5 vibrates up and down, the upper protective film 3
.. Lower retentive membrane 2. The upper electrode 7° and the lower electrode 6 vibrate in the same way, but in such a way that the lower protective film 2 does not come into contact with the substrate 1 when vibrating downward.

下部保護膜2と基板lとの間には空隙層8が設けられて
いる。なお、圧電体5が撮動するのはこの空隙層8の上
部1こおいてであり、上記振動周波数は空隙層8上部の
圧電体5%上部保鏝膜3.下部保護膜2.上部電極7.
下部電極6の総和の厚みによりきまる。
A void layer 8 is provided between the lower protective film 2 and the substrate l. It should be noted that the piezoelectric body 5 takes an image at the upper part 1 of the void layer 8, and the above-mentioned vibration frequency is the same as that of the piezoelectric body 5% upper retaining film 3. Lower protective film 2. Upper electrode7.
It is determined by the total thickness of the lower electrodes 6.

このように構成された圧電薄膜共振子は任意の基板lの
上に形成できるため、集積回路が形成された半導体基板
上にも形成することができるという特徴をもっている。
Since the piezoelectric thin film resonator configured in this manner can be formed on any substrate l, it has the characteristic that it can also be formed on a semiconductor substrate on which an integrated circuit is formed.

このことにより、たとえば発振回路とこの圧電薄膜共振
子を同一の半導体基板上に形成して1発振器の超小形化
を図ることが可能である。
This makes it possible, for example, to form an oscillation circuit and this piezoelectric thin film resonator on the same semiconductor substrate, thereby achieving ultra-miniaturization of one oscillator.

しかし、このような圧電薄膜共振子は上記のようにその
厚みにより振動周波数がきまるため上部に異物が付着す
ると振動周波数が変化してしまう。
However, as described above, the vibration frequency of such a piezoelectric thin film resonator is determined by its thickness, so if foreign matter adheres to the top, the vibration frequency will change.

そのため、なんらかのケースに密封しなければならない
。ところが、現在集積回路に多用されているモールドは
このような圧電薄膜共振子には使用できない。なぜなら
、モールド材が圧電薄膜共振子上部に充てんされると、
共振子が振動できなくなり、所定の電気的特性が得られ
なくなるからである。
Therefore, it must be sealed in some kind of case. However, the molds currently commonly used for integrated circuits cannot be used for such piezoelectric thin film resonators. This is because when the molding material is filled on the top of the piezoelectric thin film resonator,
This is because the resonator becomes unable to vibrate and predetermined electrical characteristics cannot be obtained.

(発明が解決しようとする問題点) 上記のように従来の圧電薄膜共振子は上部に異物が付着
するとその振動周波数が変化してしまうことと、モール
ドできないという問題点があった。
(Problems to be Solved by the Invention) As described above, the conventional piezoelectric thin film resonator has the problems that the vibration frequency changes when foreign matter adheres to the upper part and that it cannot be molded.

この発明の目的は上記の問題点を解決し、上部に異物が
付着しても振動周波数が変化せず、さらにはモールドし
たとしても電気的特性が変化せず所定の性能が得られる
圧電薄膜共振子を提供しようとするものである。
The purpose of this invention is to solve the above-mentioned problems, and to create a piezoelectric thin film resonator that does not change the vibration frequency even if foreign matter adheres to the upper part, and furthermore, does not change the electrical characteristics even when molded and provides the desired performance. It is intended to provide a child.

〔発明の構成〕[Structure of the invention]

c問題点を解決するための手段) この発明は、圧電れγ膜共振子の振動部上部すなわち基
板と反対側の面に上部空隙層を設け、さらにその上に上
部空隙層保護膜を設けたものである。
c) Means for Solving Problems) This invention provides an upper void layer above the vibrating part of a piezoelectric gamma film resonator, that is, on the surface opposite to the substrate, and further provides an upper void layer protective film thereon. It is something.

(作用) この発明によれば、振動部すなわち圧電体、上部電極、
下部電極、上部保獲膜、下部保護膜は祈たに設けられた
上部空隙層と下部空隙層との間で振動し、その振動周波
数はこれら振動部の総和の厚みによってきまる。上部空
隙層保護膜には上部空隙層によって圧電体の振動はつた
わらず上記倣動周波数には影響をあたえない。よって、
最上部にある上部空隙層保護膜に異物が付着したとして
も、圧電薄膜共振子としての電気的特性は変化しない。
(Function) According to the present invention, the vibrating part, that is, the piezoelectric body, the upper electrode,
The lower electrode, the upper retention film, and the lower protective film vibrate between the upper void layer and the lower void layer provided in the prayer, and the vibration frequency is determined by the total thickness of these vibrating parts. The vibration of the piezoelectric body is not transmitted to the upper void layer protection film due to the upper void layer and does not affect the above-mentioned vibration frequency. Therefore,
Even if foreign matter adheres to the upper void layer protective film at the top, the electrical characteristics of the piezoelectric thin film resonator do not change.

(実施例) 以下1図面を参照してこの発明の実施例について説明す
る。
(Example) An example of the present invention will be described below with reference to one drawing.

第1図はこの発明の一実施例に係る圧電#膜共振子の構
成を示すものである。この共振子は、基板1上に形成さ
れ、上へ順に、下部保護膜2.下部電極6.圧電体5.
上部*@7.上部保J膜3゜上部空隙層保護膜4により
構成されている。そして、基板1と下部保護膜2との間
には下部空隙層8が、下部保護膜3と上部空隙層保護膜
4との間には上部空隙層9がそれぞれ設けられている。
FIG. 1 shows the structure of a piezoelectric membrane resonator according to an embodiment of the present invention. This resonator is formed on a substrate 1, and in order from above, a lower protective film 2. Lower electrode 6. Piezoelectric body 5.
Top *@7. It is composed of an upper J-retaining film 3° and an upper void layer protective film 4. A lower void layer 8 is provided between the substrate 1 and the lower protective film 2, and an upper void layer 9 is provided between the lower protective film 3 and the upper void layer protective film 4.

この空隙層8は下部保護膜2が下へ振動した時に基板1
に接触しない厚さに、空隙層9は下部保護膜3が上へ振
動した時に上部空隙層保護膜4に接触しない厚さにそれ
ぞれ選定されている。
When the lower protective film 2 vibrates downward, this void layer 8 causes the substrate 1 to
The thickness of the void layer 9 is selected to be such that it does not contact the upper void layer protective film 4 when the lower protective film 3 vibrates upward.

この圧電薄膜共振子は圧電体5の上部空隙層9と下部空
隙層8との間の部分が上下に振動することにより、上部
電極7と下部電極6との間にその振動周波数による電気
信号が得られるが、圧電体5が振動する際、上部電極7
.下部電極6.上部保護膜3.下部保護膜2も上部空隙
層9と下部空隙層8との間で振動する。このため上記振
動周波数はこれら振動部分すなわち上部保護M3、上部
電極7.圧電体5.下部電極6.下部保護膜2の。
In this piezoelectric thin film resonator, the part between the upper gap layer 9 and the lower gap layer 8 of the piezoelectric body 5 vibrates vertically, so that an electric signal is generated between the upper electrode 7 and the lower electrode 6 due to the vibration frequency. However, when the piezoelectric body 5 vibrates, the upper electrode 7
.. Lower electrode 6. Upper protective film 3. The lower protective film 2 also vibrates between the upper void layer 9 and the lower void layer 8. For this reason, the above-mentioned vibration frequency is determined by these vibration parts, namely the upper protection M3, the upper electrode 7. Piezoelectric body 5. Lower electrode 6. of the lower protective film 2.

上部空隙層9と下部空隙層8との間の部分の総和の厚み
によりきまる。上部空隙層保護膜4は上部空隙層9があ
るため圧電体5の振動がつたわらず振動しないため、上
記振動周波数には影響しない。
It is determined by the total thickness of the portion between the upper void layer 9 and the lower void layer 8. Since the upper void layer protection film 4 has the upper void layer 9, the vibrations of the piezoelectric body 5 are not transmitted and do not vibrate, so that it does not affect the above-mentioned vibration frequency.

次に、第1図の構成の圧電薄膜共振子を得るための工程
を第2図に示す。まず、第4図に示した従来の圧電薄膜
共振子を形成し、その上部に第2図(1)に示すように
酸化亜鉛等により上部空隙層となる埋込み層10を形成
する。さらに、その上に第2図(II)に示すように2
酸化シリコン等による上部空隙層保護膜4を形成する。
Next, FIG. 2 shows a process for obtaining a piezoelectric thin film resonator having the configuration shown in FIG. 1. First, a conventional piezoelectric thin film resonator shown in FIG. 4 is formed, and a buried layer 10, which becomes an upper gap layer, made of zinc oxide or the like is formed on top of the piezoelectric thin film resonator as shown in FIG. 2(1). Furthermore, as shown in FIG. 2 (II),
An upper void layer protective film 4 made of silicon oxide or the like is formed.

次に%第2図(iii)に示すように上部空隙層保護膜
4に埋込み層10まで1つまたは複数の穴をエツチング
等によりあける。この際基板1上の上部空隙層保護膜4
の不要部分を同時に取除く。そして第2図(1■)に示
すようにこの穴からエツチングにより埋込み層lOを取
除き、上部空隙層9を形成する。以上のような工程によ
り第1図に示した圧電薄膜共振子が得られるわけである
。このような工程によれば、全ての作業が基板1の上面
からおこなえるという特徴がある。
Next, as shown in FIG. 2(iii), one or more holes are made in the upper void layer protective film 4 up to the buried layer 10 by etching or the like. At this time, the upper void layer protective film 4 on the substrate 1
Remove unnecessary parts at the same time. Then, as shown in FIG. 2 (1), the buried layer 1O is removed from this hole by etching to form an upper void layer 9. Through the steps described above, the piezoelectric thin film resonator shown in FIG. 1 can be obtained. This process has the feature that all operations can be performed from the top surface of the substrate 1.

このようにして得られた図1に示す圧電薄膜共振子は、
上部空隙層9と下部空隙層8の間の振動部が上部空隙層
保護膜4と基板1により保護されるため、異物が付着し
ても振動周波数は変化しない。なお、上部空隙層保護膜
4には上部空隙層9を形成するための穴がおいているが
、モールド材はエツチング液に比べて十分粘性が高いた
め上部空隙層9に進入することはない。よってこの圧電
薄膜共振子をモールドしても電気的特性が変化すること
はない。
The piezoelectric thin film resonator shown in FIG. 1 obtained in this way is
Since the vibrating portion between the upper void layer 9 and the lower void layer 8 is protected by the upper void layer protective film 4 and the substrate 1, the vibration frequency does not change even if foreign matter adheres. Although the upper void layer protective film 4 has holes for forming the upper void layer 9, the molding material does not enter the upper void layer 9 because its viscosity is sufficiently higher than that of the etching solution. Therefore, even if this piezoelectric thin film resonator is molded, its electrical characteristics do not change.

この発明は上記の実施例、工程に限定されるものではな
く1種々に変形して実施できる。
This invention is not limited to the above embodiments and steps, but can be implemented with various modifications.

たとえば、第3図に示す圧電薄膜共振子は、基板1を下
部から堀ることにより下部空隙層8を形成したものであ
る。この場合も、上部空隙層9は第2図に示した工程で
形成できる。この他、下部空隙層8は基板に溝を堀った
ものを使用することも可能である。
For example, in the piezoelectric thin film resonator shown in FIG. 3, a lower void layer 8 is formed by excavating the substrate 1 from the bottom. In this case as well, the upper void layer 9 can be formed by the steps shown in FIG. In addition, it is also possible to use a substrate with grooves formed as the lower void layer 8.

また、第2図に示した工程では、従来と同様の圧電薄膜
共振子を形成した後、上部空隙層を形成したが、たとえ
ば、上部空隙層と下部空隙層とを同時に形成するこさも
可能である。その他%種々の工程により、この発明によ
る圧電薄膜共振子を得ることができる。
Furthermore, in the process shown in Figure 2, the upper void layer was formed after forming the piezoelectric thin film resonator as in the conventional method, but it is also possible, for example, to form the upper void layer and the lower void layer at the same time. be. The piezoelectric thin film resonator according to the present invention can be obtained through various other processes.

さらに、上部空隙層保護膜4.埋込み層10を形成する
材料についても、上記の2酸化シリコン。
Furthermore, upper void layer protective film 4. The material for forming the buried layer 10 is also the silicon dioxide mentioned above.

酸化亜鉛に限定されるものではなく種々の材料が使用で
きる。
It is not limited to zinc oxide, and various materials can be used.

また、必要に応じて上部保護膜3と下部保護膜2は省略
することが可能である。
Further, the upper protective film 3 and the lower protective film 2 can be omitted if necessary.

そして、この発明による圧電薄膜共振子をモールドする
場合またはケースに密封する場合、エージング特性を改
善するためlこ、上部空隙層及び下部空隙層を一度真空
状態し、その後にヘリウムやアルゴン、ガス等の不活性
ガスを充てんする不活性ガス等による置換を行うことが
可能である。ガス充てん後、モールドまたはケースに密
封するまでの間上部空隙層保護膜の穴から上部空隙層内
のガスが急激にもれることはないが、上記の穴にフタを
する等ガスをもれにくくする処置を講じてももちろんか
まわない。ガスを充てんしない場合でも上記のフタをす
ることにより低粘性のモールド材が上部空隙層に進入す
るのを防止することができる。
When molding the piezoelectric thin film resonator according to the present invention or sealing it in a case, in order to improve aging characteristics, the upper and lower void layers are once placed in a vacuum state, and then helium, argon, gas, etc. It is possible to perform replacement with an inert gas, etc. by filling the inert gas. After gas filling, until the mold or case is sealed, the gas in the upper void layer will not suddenly leak from the holes in the upper void layer protective film, but the above holes should be covered to prevent gas from leaking. Of course, you may take measures to do so. Even when gas is not filled, by putting the above-mentioned lid on, it is possible to prevent the low-viscosity molding material from entering the upper void layer.

さらにまた、このような圧電薄膜共振子は、半導体集積
回路との一体化構造が考えられて(する。
Furthermore, such a piezoelectric thin film resonator is considered to have an integrated structure with a semiconductor integrated circuit.

すなわち同一半導体基板上に、この共振子と半導体集積
回路とを一体化して形成し、例えばワンチップの発振器
等を構成すれば1回路の小形化、簡易化が図られる。こ
のように一体化構造をとる場合、半導体集積回路の接続
点とこの共振子の上下電極とをアルミニウム等の金属膜
による配線、N++ターンで接続することが必要になる
。しかしな力Sらr出倶春 通常圧電薄膜は2〜10μ
m程e(D厚さを有するためこの圧電薄膜の膜厚に相当
する段差により共振子の上部電極と半導体集積回路の接
続点とを接続する際配線用金属膜がリフトオフ法や金属
マスク法では十分に形成できず、断線などを生じやすい
という問題がある(なお、エツチング法は圧電薄膜(Z
nO)がエツチング液に対して弱いので使用できない。
In other words, if this resonator and a semiconductor integrated circuit are integrally formed on the same semiconductor substrate to form, for example, a one-chip oscillator, one circuit can be made smaller and simpler. When adopting such an integrated structure, it is necessary to connect the connection point of the semiconductor integrated circuit and the upper and lower electrodes of this resonator with wiring made of a metal film such as aluminum, or with an N++ turn. However, the force S is usually 2 to 10μ for piezoelectric thin films.
When connecting the upper electrode of the resonator and the connection point of the semiconductor integrated circuit with a step corresponding to the film thickness of this piezoelectric thin film, the wiring metal film has a thickness of approximately D. There is a problem that the etching method cannot be formed sufficiently and is prone to wire breakage.
nO) cannot be used because it is weak against etching solutions.

)。そこでこのような問題に対しては拡散用の金属によ
り接続すべき電極の対向する位置の圧電薄膜に導電性を
もたせて互いに電気的に接続するようにすることが望ま
しい。
). Therefore, in order to solve this problem, it is desirable that the piezoelectric thin films at positions facing the electrodes to be connected to each other be electrically conductive so as to be electrically connected to each other using a diffusion metal.

第5図はこのような圧電薄膜共振子の配線構造の実施例
を示す斜視図であり第6図は第5図のAAlにおける断
面図である。あらかじめ半導体集積回路が形成された基
板41上にCVD法又はスパッタ法で8i0@膜42.
43を付着させ、その後裏面の所定の部分をPED液(
パイロカテコール、エチレンジアミン、水の混合液)等
の異方性エツチング液で除去し凹部44を形成して図に
示すような5i41.Stow 42 からなる基底膜
を形成する。この基底膜上にAu又はAAを主成分とす
る金属膜により第1の電極45を形成する。次に半導体
集積回路側の電気接続用の窓54をフォトリングライ技
術を用いて形成し配線電極51を露出させる。その上に
スパッタ法又は蒸着法によってAt等の金属を付着させ
配線電極51を含むS + Ox 膜上にフォトエツチ
ング法により所定の大きさの引き出し電極46.47を
形成する。引き出し電極47は第1の電極45と配線電
極51を電気的接続し、引き出し電極46は第2の電極
49と電気的接続するためのものである。更にその上に
RFマグネトロンスパッタ法等によりZnO圧電膜を付
着させ酢酸と水からなるエツチング液を用いて所定の大
きさに形成する。次にZnO膜をはさんで引き出し電極
46の一部と対向する位置にTi等の拡散金属を金属マ
スク法又はリフトオフ法によって所定の大きさで形成し
、更にその上にAu等の金属膜により第2の電極49を
第1の電極45と直交する方向に所定の大きさで形成す
る。この場合圧電薄膜48は基板41の凹部44に対応
した位置に形成され、8g1の電極45と第2の電極4
9はZnO圧電薄膜48をはさんで少なくとも一部が互
いに対向して配置されている。さらに第2の電極の他端
は拡散金属ZnO圧電薄膜をはさんで引き出し電極46
と対向して配置されている。最後にオーブン等により2
50℃2時間30分以上の熱処理を施しZnO圧電薄膜
48中にTiを拡散させ、この拡散領域50の圧電薄膜
に導電性をもたせ第2の電極49と引き出し電極46を
電気的接続させる。
FIG. 5 is a perspective view showing an example of the wiring structure of such a piezoelectric thin film resonator, and FIG. 6 is a cross-sectional view in AAl of FIG. 5. An 8i0@ film 42. is deposited on a substrate 41 on which a semiconductor integrated circuit has been formed in advance by CVD or sputtering.
43, and then apply PED liquid (
5i41. A basement membrane consisting of Stow 42 is formed. A first electrode 45 is formed on this base film using a metal film mainly composed of Au or AA. Next, a window 54 for electrical connection on the semiconductor integrated circuit side is formed using photorin-grid technology to expose the wiring electrode 51. A metal such as At is deposited thereon by sputtering or vapor deposition, and extraction electrodes 46 and 47 of a predetermined size are formed on the S + Ox film including the wiring electrode 51 by photoetching. The extraction electrode 47 is for electrically connecting the first electrode 45 and the wiring electrode 51, and the extraction electrode 46 is for electrically connecting the second electrode 49. Furthermore, a ZnO piezoelectric film is deposited thereon by RF magnetron sputtering or the like and formed to a predetermined size using an etching solution consisting of acetic acid and water. Next, a diffused metal such as Ti is formed in a predetermined size by a metal mask method or a lift-off method at a position facing a part of the extraction electrode 46 across the ZnO film, and then a metal film such as Au is formed on top of the diffusion metal. A second electrode 49 is formed with a predetermined size in a direction perpendicular to the first electrode 45. In this case, the piezoelectric thin film 48 is formed at a position corresponding to the recess 44 of the substrate 41, and the 8g1 electrode 45 and the second electrode 4
9 are arranged so that at least a portion thereof faces each other with the ZnO piezoelectric thin film 48 in between. Furthermore, the other end of the second electrode is an extraction electrode 46 with a diffusion metal ZnO piezoelectric thin film in between.
is placed opposite. Finally, put it in the oven etc. 2
A heat treatment is performed at 50° C. for 2 hours and 30 minutes or more to diffuse Ti into the ZnO piezoelectric thin film 48, thereby imparting conductivity to the piezoelectric thin film in the diffusion region 50 and electrically connecting the second electrode 49 and the extraction electrode 46.

更にこの上に少なくとも圧電薄膜を全て含む大きさでS
in、膜を付着させてもよい。この5101膜は大気の
湿気などに弱いZnO膜の保護膜として働くだけでなく
周波数温度係数の補償用として働く。またこのような構
成の場合にはTiの拡散をSin!スバツタ工程と兼ね
ることもできる。同圧を 電薄膜はZnOに限定されるものでな(A fN 、 
TazOw +Cds等の圧電薄膜であれば何を用いて
もよく更に圧電膜の下面もしくは上下面に電極を介在し
て配置される膜の材料は5tO1に限られるものでなく
化学的に安定な訪電膜やSingにリンを数チ程度ドー
プしたPSG膜、更にボロンとリンをドープしたBPS
Gやホウケイ酸等のガラス類でもよくそれが単層でなく
異種材料の複合層であってもよい。
Furthermore, on top of this, there is formed a film S with a size that includes at least all of the piezoelectric thin film.
In, the membrane may be deposited. This 5101 film not only serves as a protective film for the ZnO film, which is susceptible to atmospheric moisture, but also serves as a compensation for the frequency temperature coefficient. In addition, in the case of such a configuration, Ti diffusion is set to Sin! It can also be used as the subattu process. Thin films with the same voltage are not limited to ZnO (A fN,
Any piezoelectric thin film such as TazOw+Cds can be used. Furthermore, the material of the film arranged with electrodes interposed on the lower surface or upper and lower surfaces of the piezoelectric film is not limited to 5tO1, but any chemically stable electrical conductor can be used. PSG film doped with several tbsp of phosphorus in the film and Sing, BPS further doped with boron and phosphorus
It may be made of glass such as G or borosilicate, and it may not be a single layer but a composite layer of different materials.

更にZnO圧電薄膜中に拡散される材料はTiに限られ
るものでなく拡散定数の大きい金属例えばCr、In、
Ni、Sn、At、Mg、Li等であれば何を用いても
よい。
Furthermore, the material diffused into the ZnO piezoelectric thin film is not limited to Ti, but may also include metals with a large diffusion constant such as Cr, In,
Any material such as Ni, Sn, At, Mg, Li, etc. may be used.

さらに他の実施例として第7図に示すように。Still another embodiment is shown in FIG.

基板凹部を設けるかわりに空隙層52を設けることによ
って共振部分を基板より離した形の圧電薄膜共振子と半
導体集積回路を組合せた構造とすることもできる。この
空隙層52はあらかじめ基板上にZnO膜等の化学的に
容易に溶解できる数百A〜数μmの薄膜を所定の大きさ
に付着させその上にSin、等の膜42をスパッタリン
グ法等で付着させ、この上に第1の電極45.配線電極
51の露出及び圧電薄膜48.第2の電極49さらに共
振子側の電極と集積回路側の配線電極との電気的接続は
第6図の実施例と同様の手順で形成し最終的にZnO圧
電薄膜、引き出し電極をレジストで保護しSin、膜の
一部をエツチングしZnO膜が8i0゜膜で被覆された
部分と被覆されない部分を形成しこれらをHCl等の溶
液1こつけZnOh、を除去することによって形成出来
る。なお最上層にSin、膜を付着させてもよい。この
8i0.膜は周波数温度係数の補償用と空隙層形成の際
のZnO圧電薄膜の保護としても働く。
By providing a gap layer 52 instead of providing a substrate recess, it is also possible to obtain a structure in which a piezoelectric thin film resonator with a resonant portion separated from the substrate and a semiconductor integrated circuit are combined. This void layer 52 is made by depositing a chemically easily soluble thin film such as a ZnO film with a thickness of several hundred amps to several μm on a substrate in advance, and then depositing a film 42 of Sin or the like on the substrate by sputtering or the like. A first electrode 45. is deposited thereon. Exposure of wiring electrode 51 and piezoelectric thin film 48. The electrical connection between the second electrode 49 and the electrode on the resonator side and the wiring electrode on the integrated circuit side is formed in the same manner as in the embodiment shown in FIG. 6, and finally the ZnO piezoelectric thin film and the extraction electrode are protected with resist. The ZnO film can be formed by etching a part of the ZnO film to form a part covered with the 8i0° film and a part not covered, and then applying a solution such as HCl to these parts and removing the ZnO film. Note that a film of Sin may be attached to the top layer. This 8i0. The membrane also serves as a compensation for the frequency temperature coefficient and as a protection for the ZnO piezoelectric thin film during the formation of the void layer.

このように共振子の第2の電極と引き出し電極をZnO
圧電薄膜をはさんで形成しこれらをZnO圧電薄膜の一
部に導電性をもたせて電気的接続した配線構造とすると
、容易、かつ確実な配線が可能となる。
In this way, the second electrode and extraction electrode of the resonator are made of ZnO.
If a wiring structure is formed in which piezoelectric thin films are sandwiched and these are electrically connected by imparting conductivity to a part of the ZnO piezoelectric thin film, easy and reliable wiring becomes possible.

〔発明の効果〕〔Effect of the invention〕

この発明によれば、異物が付着したとしても電気的特性
が変化しないきわめて信頼性の高い圧電薄膜共振子を得
ることができる。
According to the present invention, it is possible to obtain an extremely reliable piezoelectric thin film resonator whose electrical characteristics do not change even if foreign matter adheres thereto.

また、モールドしても電気的特性が変化しないため、こ
の発明による圧電薄膜共振子と集積回路とを同一の半導
体基板上に形成してモールドすることができる。これに
より発振回路等の超小形化が図れ、しかも従来の集積回
路と同じ形体の電気部品として提供することができる。
Furthermore, since the electrical characteristics do not change even when molded, the piezoelectric thin film resonator and integrated circuit according to the present invention can be formed and molded on the same semiconductor substrate. As a result, the oscillation circuit and the like can be made ultra-small and can be provided as an electrical component having the same shape as a conventional integrated circuit.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例に係る圧電薄膜共振子の断
面図、第2図は第1図の圧電薄膜共振子を得る工程を説
明するための各工程における断面図、第3図はこの発明
の他の実施例に係る圧電薄膜共振子の断面図、第4図は
従来の圧電薄膜共振子の断面図、第5図乃至第7図は配
線パターンの具体例を示す図である。 1・・・基板、2・・・下部保護膜、3・・・上部保護
膜。 4・・・上部空隙層保護膜、5・・・圧電体% 6・・
・下部電極、7・・・上部電極、8・・・下部空隙層、
9・・・上部空隙層、10・・・埋込み層。 代理人 弁理士 則 近 憲 佑 同    竹 花 喜久男 第1図 第4図 第2図 第3図
FIG. 1 is a cross-sectional view of a piezoelectric thin film resonator according to an embodiment of the present invention, FIG. 2 is a cross-sectional view of each step for explaining the process of obtaining the piezoelectric thin film resonator of FIG. 1, and FIG. FIG. 4 is a sectional view of a piezoelectric thin film resonator according to another embodiment of the present invention, FIG. 4 is a sectional view of a conventional piezoelectric thin film resonator, and FIGS. 5 to 7 are diagrams showing specific examples of wiring patterns. 1... Substrate, 2... Lower protective film, 3... Upper protective film. 4... Upper void layer protective film, 5... Piezoelectric material% 6...
- Lower electrode, 7... Upper electrode, 8... Lower void layer,
9... Upper void layer, 10... Buried layer. Agent Patent Attorney Noriyuki Ken Yudo Takehana KikuoFigure 1Figure 4Figure 2Figure 3

Claims (3)

【特許請求の範囲】[Claims] (1)任意の基板上に下部空隙層を介して形成され、複
数の電極が接続された圧電体の、基板と反対側の面に上
部空隙層を設け、この上部空隙層を保護するための上部
空隙層保護膜を設けたことを特徴とする圧電薄膜共振子
(1) An upper void layer is provided on the surface opposite to the substrate of a piezoelectric body formed on an arbitrary substrate via a lower void layer and connected to a plurality of electrodes, and an upper void layer is provided to protect the upper void layer. A piezoelectric thin film resonator characterized by being provided with an upper void layer protective film.
(2)圧電体を保護するための保護膜を、基板と圧電体
との間、または圧電体と上部空隙層保護膜との間、また
はその両方に設けたことを特徴とする特許請求の範囲第
1項記載の圧電薄膜共振子。
(2) Claims characterized in that a protective film for protecting the piezoelectric body is provided between the substrate and the piezoelectric body, between the piezoelectric body and the upper void layer protective film, or both. The piezoelectric thin film resonator according to item 1.
(3)下部空隙層は基板に堀られた穴または溝を用いた
ことを特徴とする特許請求の範囲第1項記載の圧電薄膜
共振子。
(3) The piezoelectric thin film resonator according to claim 1, wherein the lower void layer is a hole or groove drilled in the substrate.
JP825687A 1987-01-19 1987-01-19 Piezoelectric thin film resonator Expired - Lifetime JPH07114340B2 (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP825687A JPH07114340B2 (en) 1987-01-19 1987-01-19 Piezoelectric thin film resonator

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP825687A JPH07114340B2 (en) 1987-01-19 1987-01-19 Piezoelectric thin film resonator

Publications (2)

Publication Number Publication Date
JPS63177605A true JPS63177605A (en) 1988-07-21
JPH07114340B2 JPH07114340B2 (en) 1995-12-06

Family

ID=11688061

Family Applications (1)

Application Number Title Priority Date Filing Date
JP825687A Expired - Lifetime JPH07114340B2 (en) 1987-01-19 1987-01-19 Piezoelectric thin film resonator

Country Status (1)

Country Link
JP (1) JPH07114340B2 (en)

Cited By (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
WO2004105237A1 (en) * 2003-05-26 2004-12-02 Murata Manufacturing Co., Ltd. Piezoelectric electronic component, and production method therefor, communication equipment
JP2007159123A (en) * 2005-11-30 2007-06-21 Agilent Technol Inc Film bulk acoustic resonator devices with temperature compensation
JP2009022052A (en) * 2001-01-02 2009-01-29 Avago Technologies Wireless Ip (Singapore) Pte Ltd Solidly mounted multi-resonator bulk acoustic wave filter with patterned acoustic mirror
US7671427B2 (en) 2003-05-22 2010-03-02 Samsung Electronics Co., Ltd. Method of manufacturing film bulk acoustic resonator using internal stress of metallic film and resonator manufactured thereby
WO2014135379A1 (en) * 2013-03-06 2014-09-12 Epcos Ag Microacoustic component and method for the production thereof

Cited By (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2009022052A (en) * 2001-01-02 2009-01-29 Avago Technologies Wireless Ip (Singapore) Pte Ltd Solidly mounted multi-resonator bulk acoustic wave filter with patterned acoustic mirror
US7671427B2 (en) 2003-05-22 2010-03-02 Samsung Electronics Co., Ltd. Method of manufacturing film bulk acoustic resonator using internal stress of metallic film and resonator manufactured thereby
US7939356B2 (en) 2003-05-22 2011-05-10 Samsung Electronics Co., Ltd. Method of manufacturing film bulk acoustic resonator using internal stress of metallic film and resonator manufactured thereby
WO2004105237A1 (en) * 2003-05-26 2004-12-02 Murata Manufacturing Co., Ltd. Piezoelectric electronic component, and production method therefor, communication equipment
US7342351B2 (en) 2003-05-26 2008-03-11 Murata Manufacturing Co., Ltd. Piezoelectric electronic component, and production method therefor, and communication equipment
US8123966B2 (en) 2003-05-26 2012-02-28 Murata Manufacturing Co., Ltd. Piezoelectric electronic component, process for producing the same, and communication apparatus
JP2007159123A (en) * 2005-11-30 2007-06-21 Agilent Technol Inc Film bulk acoustic resonator devices with temperature compensation
WO2014135379A1 (en) * 2013-03-06 2014-09-12 Epcos Ag Microacoustic component and method for the production thereof
US9991873B2 (en) 2013-03-06 2018-06-05 Snaptrack, Inc. Microacoustic component and method for the production thereof

Also Published As

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