JPS63177485A - Semiconductor laser - Google Patents

Semiconductor laser

Info

Publication number
JPS63177485A
JPS63177485A JP758487A JP758487A JPS63177485A JP S63177485 A JPS63177485 A JP S63177485A JP 758487 A JP758487 A JP 758487A JP 758487 A JP758487 A JP 758487A JP S63177485 A JPS63177485 A JP S63177485A
Authority
JP
Japan
Prior art keywords
layer
active layer
resistance
electrode
resistance semiconductor
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP758487A
Other languages
Japanese (ja)
Inventor
Mitsuhiro Kitamura
北村 光弘
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP758487A priority Critical patent/JPS63177485A/en
Publication of JPS63177485A publication Critical patent/JPS63177485A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To reduce the capacitance of a device and to improve the high-frequency response characteristic of a laser by a method wherein high-resistance semiconductor layers are formed on the right side and on the left side of an active layer and an electrode pad to bond an electrode wire is formed only above the high-resistance semiconductor layer. CONSTITUTION:High-resistance semiconductor layers 9 are formed on the right side and on the left side of an active layer 3 for a semiconductor of buried structure; an electrode pad 13 to bond an electrode wire is formed only on the high-resistance semiconductor layers. For example, an n-InP buffer layer 2, an undoped In0.59-Ga0.41As0.90P0.10 active layer 3, a p-InP clad layer 4 and a p-In0.72Ga0.28As0.61P0.39 contact layer 5 are grown on an n-InP substrate 1. After that, a mesa stripe 6 including the active layer 3 is formed; mesas 7, 8 are formed on both sides of the stripe. Then, after an SiNx film has been formed on the mesa stripe 6 and the mesas 7, 8 and has been grown selectively, Fe-doped InP high-resistance layers 9 are grown. After that, an SiO2 insulating film 10, a P-type electrode 11 and an n-type electrode 12 are formed; an electrode pad 13 is formed only above the upper face of the high-resistance layer 9.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は半導体レーザに関する。[Detailed description of the invention] [Industrial application field] The present invention relates to semiconductor lasers.

〔従来の技術〕[Conventional technology]

埋め込み構造の半導体レーザ(BH−L D )は低閾
値電流、高出力、高温動作が可能なため、光フアイバ通
信用光源として実用化の段階に入ってきている。BH−
LDは通常埋め込み活性層の左右にp−n −p −n
 構造の電流ブロック層を形成して注入電流を活性層に
効率的に閉じ込めるように形成されている。しかし、こ
の構造では高周波特性が十分艮くならず、最近高抵抗半
導体層を活性層の左右に形成して素子のキャパシタンス
を低下させる構造が有効であることが明らかにされてき
た。例えば、田中氏らは1985年発行のApplie
d Ph−ysica Letters 誌(Vol、
47.1127頁)に報告しているようなりH−LDを
開発し之。このBH−LDは活性層を含むメサストライ
プt−2本の平行な溝がはさむ構成となっており、これ
らの溝の中に高抵抗半導体層を埋め込むことにより、高
速動作特性を得ている。高抵抗半導体層の抵抗率は10
’Ω・cmかつし=ザのキャパシタンスはIOPFであ
り、闇値の2倍にバイアスしt時の3dB変調帯域は約
4GHzを得ている。
Buried structure semiconductor lasers (BH-LD) are capable of low threshold current, high output, and high temperature operation, and have therefore entered the stage of practical use as light sources for optical fiber communications. BH-
LD usually has p-n-p-n on the left and right sides of the buried active layer.
The structure is formed to form a current blocking layer to efficiently confine the injected current to the active layer. However, this structure does not sufficiently improve high-frequency characteristics, and it has recently been revealed that a structure in which high-resistance semiconductor layers are formed on the left and right sides of the active layer to reduce the capacitance of the device is effective. For example, Tanaka et al.
d Ph-ysica Letters magazine (Vol.
47, p. 1127), we developed the H-LD. This BH-LD has a structure in which two parallel grooves of mesa stripes including the active layer are sandwiched, and high-speed operation characteristics are obtained by burying a high-resistance semiconductor layer in these grooves. The resistivity of the high resistance semiconductor layer is 10
The capacitance of 'Ω·cm is IOPF, and the bias value is twice the dark value, and the 3 dB modulation band at time t is approximately 4 GHz.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

ところで上述のようなりH−LDをさら(C高速化しよ
うとする場合、電極構造にも工夫が必要となる。基本的
には電極の面積を小さくすればよいが、従来構造のtま
面積を小さくしてもまだ電極部分のエピタキシャル層の
キャパシタンス成分が残存し、キャパシタンスの低減に
も限度がある。
By the way, when trying to further increase the speed of the H-LD as mentioned above, the electrode structure also needs to be devised.Basically, the area of the electrode can be reduced, but if the area of the conventional structure is Even if it is reduced, the capacitance component of the epitaxial layer in the electrode portion still remains, and there is a limit to the reduction in capacitance.

〔問題点を解決するための手段〕[Means for solving problems]

本発明は活性層がその周囲音一層エネルギーギャップが
大きくかつ屈折率の小さな半導体層によって覆われた埋
め込み構造の半導体レーザにおいて、前記活性層の左右
に高抵抗半導体層全段け、電極ワイヤをポンディングす
るための電極パッドを前記高抵抗半導体層の上にのみ設
けた構成である。
The present invention provides a semiconductor laser with a buried structure in which an active layer is covered with a semiconductor layer having a larger energy gap and a lower refractive index than the ambient sound. In this structure, electrode pads for bonding are provided only on the high-resistance semiconductor layer.

また、上部に前記電極パッドの設けられ九前記高抵抗半
導体層を半絶縁性半導体基板の上に設けた構成である。
Further, the structure is such that the high-resistance semiconductor layer on which the electrode pad is provided is provided on a semi-insulating semiconductor substrate.

〔実施例〕 次に、図面を参照して本発明の実施例について説明する
[Example] Next, an example of the present invention will be described with reference to the drawings.

第1図(alおよび第1図(b)は本発明の第一の実施
例を示し、第1図(alは平面図かつ第1図(blは第
1図(al中のA−B線で破断した断面図である。この
実施例のBH−LDf:得るには、まずn−InP基板
1の斗にrヒエnPバッファ層CM−さ1μm)21発
光波長1.5μm相当のノンドープIn0.59 Ga
O,41As0.90P0.10活性層(厚さ0.1μ
m) 3 、 p−InP ′17ラツド層(厚さ2a
m)+。
FIG. 1 (al) and FIG. 1(b) show the first embodiment of the present invention, and FIG. 1 (al is a plan view and FIG. BH-LDf of this example: To obtain the BH-LDf of this example, first, a non-doped In0. 59 Ga
O,41As0.90P0.10 active layer (thickness 0.1μ
m) 3, p-InP '17 rad layer (thickness 2a
m)+.

および発光波長1.3μm相当のp−I n O,72
Ga O,28A’s O,6i Po、39コンタク
ト層(厚さ0.5μm) 5 f成長する。その後、エ
ツチング全行なって発光再結合する活性層3を含むメサ
ストライプ6とこの両脇にメサ7.8とを形成する。メ
サストライプ6は高さ3μm1かつ活性層3の部分で幅
1.5μmとなるようにした。また、メサ7.8は幅1
0μmとした。メサストライプ6およびメサ7.8の上
にSiNx膜を形成し之まま選択成長全行ないFeドー
プ■nP高抵抗層(高抵抗半導体層)9金成長ずも成長
にはMOVPE法を用い、原料としてTMIn。
and p-I n O, 72 with an emission wavelength of 1.3 μm.
Ga O, 28 A's O, 6i Po, 39 contact layer (thickness 0.5 μm) 5 f is grown. Thereafter, all etching is performed to form a mesa stripe 6 including the active layer 3 for light emission recombination and mesas 7.8 on both sides of the mesa stripe 6. The mesa stripe 6 had a height of 3 μm1 and a width of 1.5 μm in the active layer 3 portion. Also, mesa 7.8 has a width of 1
It was set to 0 μm. A SiNx film is formed on mesa stripe 6 and mesa 7.8, and all selective growth is performed as it is. Fe-doped nP high resistance layer (high resistance semiconductor layer) 9 is grown with gold. TMIn.

PH3、Fe (C5H5) 2 t−採用することに
↓9、抵抗率10Ω・cm程度の高抵抗層を得な。成長
温度は650℃とした。その後、5in2絶縁膜10.
部分的に設けるP型電極11および全面的に設けるn型
電極12を形成し、個々のレーザチッグに切り出シテ所
望のBH−LDi得た。ワイヤボンディング用の電極パ
ッド13は50X50μm2程度の大きさとし、高抵抗
層9の上面にのみ形成し念。その結果、素子の千ヤパシ
タンスは6PF、 かつ3dB K調帯域は7GHzと
従来に比べて高周波特性が大幅に改善されt0レーザと
しての基本特性も閾値電流2QmA、微分量子効率50
%、最高CW出カフ0mW、最高CW動作温度120 
’O程度の素子が再現性よく得られた。
By adopting PH3, Fe (C5H5) 2 t-↓9, obtain a high resistance layer with a resistivity of about 10Ω・cm. The growth temperature was 650°C. After that, 5in2 insulating film 10.
A partially provided P-type electrode 11 and an entirely provided N-type electrode 12 were formed, and the desired BH-LDi was obtained by cutting into individual laser chips. The electrode pad 13 for wire bonding has a size of about 50×50 μm2, and is formed only on the upper surface of the high resistance layer 9. As a result, the high frequency characteristics of the device are significantly improved, with a thousand passance of 6PF, and a K-tone band of 3dB and 7GHz compared to conventional devices.The basic characteristics as a t0 laser are a threshold current of 2QmA and a differential quantum efficiency of 50.
%, maximum CW output cuff 0mW, maximum CW operating temperature 120
A device of about 'O' was obtained with good reproducibility.

次に、本発明の第二の実施例の平面図およびA−B線断
面図を示す第2図(alおよび第2図(bl t−参照
すると、この実施例においては基板として半絶縁性In
P基板15を用い、この基板15の上に第一の実施例と
同様にバッファ%、z 、活性層3゜クラッド層4.お
よびコンタクト層5を順次成長した後、メサストライプ
6の一万の側部のみ半絶縁性InP基板152ける深さ
にエツチングを行交いInP高抵抗層9を同様に成長す
る。ここで、基板15は抵抗率106Ω・cm以上のも
の全周いる。その後、第2図(blにおいてメサストラ
イプ6の左側を一部エッチングしてn  InPバッフ
ァ層2の表面を露出し、8i0z膜10.n型電極パッ
ド12.Pffl電極11等を形成して所望のBH−L
D″f:得る。この場合、電極パッド12.13はいず
れも50X50μm2の大きさとし、特にP型電極11
の電極パッド13は高抵抗層9の上にのみ形成され、基
板15との間に導電型のエピタキシャル層が存在しない
のでさらに素子のキャパシタンスを低減することが可能
である。高周波特性を評価したところキャパシタンス4
.5PF、かつ3dB変調帯域9GHzとさらに大きな
改善が認められた。
Next, referring to FIGS. 2(al) and 2(bl t-) showing a plan view and a sectional view taken along line A-B of a second embodiment of the present invention, semi-insulating In is used as a substrate in this embodiment.
A P substrate 15 is used, and on this substrate 15, buffer %, z, active layer 3°, cladding layer 4. After successively growing the contact layer 5 and the contact layer 5, etching is performed to the depth of the semi-insulating InP substrate 152 only on the 10,000 sides of the mesa stripe 6, and the InP high resistance layer 9 is similarly grown. Here, the entire circumference of the substrate 15 has a resistivity of 10 6 Ω·cm or more. Thereafter, the left side of the mesa stripe 6 in FIG. BH-L
D″f: obtained. In this case, the electrode pads 12 and 13 are all 50×50 μm2 in size, and in particular, the P-type electrode 11
Since the electrode pad 13 is formed only on the high resistance layer 9 and there is no conductive epitaxial layer between it and the substrate 15, it is possible to further reduce the capacitance of the device. When high frequency characteristics were evaluated, the capacitance was 4.
.. An even greater improvement was observed with a 5PF and 3dB modulation band of 9GHz.

上記各実施例においては、■nP、InGaA、P系の
半導体材料金用いて実施し念が、他にG aA I A
In each of the above embodiments, ■nP, InGaA, and P-based semiconductor materials such as gold were used;
.

GaA3等の半導体材料を用いても同様に実施できる。Similar implementation is possible using a semiconductor material such as GaA3.

te%DFBレーザ、DBRレーザ等にも適用できる。It can also be applied to te%DFB laser, DBR laser, etc.

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明にぶれば、ワイヤボンディン
グ用電極パッドを高抵抗半導体層の上にのみ設けること
により、素子のキャパシタンスを大幅に低減できる。こ
の結果、レーザの高周波応答特性を大幅に改善すること
ができる。
As explained above, according to the present invention, the capacitance of the device can be significantly reduced by providing the wire bonding electrode pad only on the high-resistance semiconductor layer. As a result, the high frequency response characteristics of the laser can be significantly improved.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図(alおよび第1図(b)は本発明の第一の実施
例を示す構成図、第2図(alおよび第2図(blは不
発明の第二の実施例を示す構成図である。 1・・・・・・基板、2・・・・・・バッファ層、3・
・・・・・活性層、4・・・・・・クラッド層、5・・
・・・・コンタクト層、6・・・・・・メサストライプ
、7,8・・・・・・メブ、9・・・・・・高抵抗半導
体層、13・・・・・・を他パッド、15・・・・・・
牛絶縁性工nP基板。 邪 1 図
FIG. 1 (al and FIG. 1(b) are block diagrams showing a first embodiment of the present invention, and FIG. 2 (al and FIG. 2 (bl) are block diagrams showing a second embodiment of the invention. 1...substrate, 2...buffer layer, 3...
...Active layer, 4...Clad layer, 5...
...Contact layer, 6...Mesa stripe, 7, 8...Meb, 9...High resistance semiconductor layer, 13...Others Pad, 15...
Cow insulation engineered nP board. evil 1 figure

Claims (2)

【特許請求の範囲】[Claims] (1)活性層がその周囲を一層エネルギーギャップが大
きくかつ屈折率の小さな半導体層によって覆われた埋め
込み構造の半導体レーザにおいて、前記活性層の左右に
高抵抗半導体層を設け、電極ワイヤをボンディングする
ための電極パッドを前記高抵抗半導体層の上にのみ設け
たことを特徴とする半導体レーザ。
(1) In a semiconductor laser with a buried structure in which an active layer is surrounded by a semiconductor layer with a larger energy gap and a smaller refractive index, high-resistance semiconductor layers are provided on the left and right sides of the active layer, and electrode wires are bonded. 1. A semiconductor laser characterized in that an electrode pad is provided only on the high-resistance semiconductor layer.
(2)上部に前記電極パッドの設けられた前記高抵抗半
導体層を半絶縁性半導体基板の上に設けたことを特徴と
する特許請求の範囲第1項記載の半導体レーザ。
(2) The semiconductor laser according to claim 1, wherein the high-resistance semiconductor layer on which the electrode pad is provided is provided on a semi-insulating semiconductor substrate.
JP758487A 1987-01-16 1987-01-16 Semiconductor laser Pending JPS63177485A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP758487A JPS63177485A (en) 1987-01-16 1987-01-16 Semiconductor laser

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP758487A JPS63177485A (en) 1987-01-16 1987-01-16 Semiconductor laser

Publications (1)

Publication Number Publication Date
JPS63177485A true JPS63177485A (en) 1988-07-21

Family

ID=11669858

Family Applications (1)

Application Number Title Priority Date Filing Date
JP758487A Pending JPS63177485A (en) 1987-01-16 1987-01-16 Semiconductor laser

Country Status (1)

Country Link
JP (1) JPS63177485A (en)

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008084891A (en) * 2006-09-25 2008-04-10 Fujitsu Ltd Optical semiconductor element and its fabrication process
CN100459067C (en) * 2004-05-18 2009-02-04 日本电信电话株式会社 Electrode pad on conductive semiconductor substrate
JP2017130605A (en) * 2016-01-22 2017-07-27 日本電信電話株式会社 Semiconductor optical device

Cited By (3)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN100459067C (en) * 2004-05-18 2009-02-04 日本电信电话株式会社 Electrode pad on conductive semiconductor substrate
JP2008084891A (en) * 2006-09-25 2008-04-10 Fujitsu Ltd Optical semiconductor element and its fabrication process
JP2017130605A (en) * 2016-01-22 2017-07-27 日本電信電話株式会社 Semiconductor optical device

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