JPS63175234U - - Google Patents

Info

Publication number
JPS63175234U
JPS63175234U JP6589587U JP6589587U JPS63175234U JP S63175234 U JPS63175234 U JP S63175234U JP 6589587 U JP6589587 U JP 6589587U JP 6589587 U JP6589587 U JP 6589587U JP S63175234 U JPS63175234 U JP S63175234U
Authority
JP
Japan
Prior art keywords
input
key
output
key input
wires
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP6589587U
Other languages
Japanese (ja)
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed filed Critical
Priority to JP6589587U priority Critical patent/JPS63175234U/ja
Publication of JPS63175234U publication Critical patent/JPS63175234U/ja
Pending legal-status Critical Current

Links

Landscapes

  • Input From Keyboards Or The Like (AREA)
  • Electronic Switches (AREA)

Description

【図面の簡単な説明】[Brief explanation of drawings]

第1図は本考案の一実施例を示すブロツク図で
第2図は波形を説明するための図である。 1……キーマトリツクス、2,3……接続線、
4……本体、5……スキヤン信号発生器、6,7
……遅延回路である。
FIG. 1 is a block diagram showing one embodiment of the present invention, and FIG. 2 is a diagram for explaining waveforms. 1...Key matrix, 2, 3...Connection line,
4... Main body, 5... Scan signal generator, 6, 7
...It is a delay circuit.

Claims (1)

【実用新案登録請求の範囲】[Scope of utility model registration request] 入力と出力を兼ねた接続端子を有して一定時間
毎に入力と出力の状態を交換しながらキー入力状
態を出力する装置に於て、n個のキーにスキヤ
ン信号を供給するキースキヤン信号発生器とn本
の結線で各々のキーを接続しキー入力がそれぞれ
遅延回路を通り該n本の結線に結合しスキヤン入
力と遅延出力の組合せでキー入力を読み取ること
を特徴とするキー入力装置。
In a device that has a connection terminal that serves as both an input and an output, and outputs the key input state while exchanging the input and output states at regular intervals, there is a key scan signal generation method that supplies scan signals to two keys. A key input device characterized in that each key is connected to a device by n wires, each key input passes through a delay circuit and is coupled to the n wires, and the key input is read by a combination of scan input and delay output.
JP6589587U 1987-04-30 1987-04-30 Pending JPS63175234U (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP6589587U JPS63175234U (en) 1987-04-30 1987-04-30

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP6589587U JPS63175234U (en) 1987-04-30 1987-04-30

Publications (1)

Publication Number Publication Date
JPS63175234U true JPS63175234U (en) 1988-11-14

Family

ID=30903392

Family Applications (1)

Application Number Title Priority Date Filing Date
JP6589587U Pending JPS63175234U (en) 1987-04-30 1987-04-30

Country Status (1)

Country Link
JP (1) JPS63175234U (en)

Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858641A (en) * 1981-10-05 1983-04-07 Hitachi Ltd Keyboard device

Patent Citations (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS5858641A (en) * 1981-10-05 1983-04-07 Hitachi Ltd Keyboard device

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