JPS63174156A - Multiplexer - Google Patents

Abstract

PURPOSE:To connect plural devices having a data format different from a host computer by providing a bit transforming means in a multiplexer and executing a bit operation. CONSTITUTION:It is assumed that the data of 6 bits in data bit length is outputted to the multiplexer 2 from the I/O device 41. The data is fetched to a buffer in a transmitting and receiving control part 26 through a transmitter- receiver 23, the format is checked and it is decided that it is normal, an interruption is informed to a CPU 3. The CPU 3 starts the bit transforming means 31 to add the dummy bit of 2 bits to the 6 bit data and have 8 bits. This 8 bit data is transmitted to the host computer 1 side through the transmitting and receiving control part 22, the transmitter-receiver 21. When the 8 bit data is applied from the host 1 to the I/O device 41, the dummy bit is removed from the 8 bit data in the bit transforming part 31 reversely to said processing procedure from the host 1 and the 6 bit data is transmitted to the I/O device 41 side.

Description

[Detailed Description of the Invention] <Industrial Application Field> The present invention is applicable to I10 of microcomputer systems, etc.
The present invention relates to an expansion multiplexer, and particularly relates to improving one-to-N communication functions.

<Prior art> The I10 port of a microcomputer system, for example, an R8232C serial communication line, usually has one input/output line.
Since it only has ports and does not have multi-ports, an external multiplexer such as a switch is used when expanding ports to connect multiple devices.

Using this multiplexer, a microcomputer system, that is, a host computer and multiple (N) devices (
For example, by connecting a keyboard, mouse, tablet, etc., I10 extended functions are realized and one-to-N communication is performed.

<Problem to be solved by the invention> However, the devices connected to such an expansion port are not necessarily of the same type, and multiple devices of different types with different data formats (data bit lengths) may be connected. In many cases, a multiplexer using a simple changeover switch could not handle this problem.

An object of the present invention is to solve the above problems and realize a multiplexer that can connect a host computer to a plurality of devices having different data formats.

<Means to solve the problem> The configuration of the present invention that solves the above problems is as follows.

That is, in a multiplexer that has one host computer side interface port and multiple (N) device side interface ports and performs 1-to-N communication, data of different data bit lengths are input from the plurality of devices. It is characterized by having a bit conversion means for converting data into a data bit length that can be processed by the host computer, and converting the data into a data bit length that can be processed by each device when transmitting data from the host computer to the plurality of devices. It is a multiplexer that

Function> By performing bit operations, the multiplexer of the present invention converts data from multiple devices having different data bit lengths into bit lengths that can be processed by the host computer, and converts the output data from the host computer into a bit length that can be processed by the host computer. Convert to a bit length that can be processed by the device.

<Example> The figure shows the configuration of a multiplexer implementing the present invention.

In this figure, 1 is a transceiver (transceiver driver/receiver) 10. A host computer such as a microcomputer having a transmission/reception control section 12; 2 is an I10 expansion multiplexer 4+, 42 of the present invention for exchanging 8-bit data with the host computer 1;

43 are different types of I10 devices (e.g. keyboard,
mouse, tablet, etc.). For example, it is assumed that the I10 device 41 handles 6-bit data, the I10 device 42 handles 7-bit data, and the four I10 devices handle 8-bit data.

Furthermore, the multiplexer 2 of the present invention includes a transmitter/receiver 21 .
Transmission/reception control unit 22, I10 device 4+, 42.43
Transmitter/receiver for transmitting and receiving data 23.24.2
5. It has a transmission/reception control unit 26°2y, 2s and CPIJ3, and these blocks are connected to an internal bus b. C.P.
U3 has a bit conversion section 31 as well as a storage section such as ROM and RAM.

The multiplexer 2 of the present invention configured as described above operates as follows.

For example, assume that data with a data bit length of 6 bits is output from the I10 device 4 to the multiplexer 2. This data is transmitted via the transmitter/receiver 23 to the transmitter/receiver controller 2
It is taken into the buffer in 6. The transmission/reception control unit 26 checks the format of this data, and if it determines that it is normal, notifies the CPU 3 of a reception interrupt.

When the CPU 3 accepts the reception interrupt, it activates the internal bit converter 3I using this interrupt signal, adds 2 dummy bits to the 6-bit data, and converts the data into 8 bits.
Bit. Usually, this dummy bit is added to the MSB side. Then, this 8-bit data is sent to the transmission/reception control section 22. It is sent to the host computer 1 side via the transceiver 2I, and this interrupt processing is ended.

On the other hand, when 8-bit data is given from the host computer 1 to the I10 device 4+, the bit converter 3. t: 8-bit
Dummy bits are removed from the data and 6-bit data is sent to the r10 device 41 side.

In addition, host computer 1 and I handle 7-bit data.
When exchanging data with the 10-bit device 42, the bit converter 31 processes this 7-bit data by adding or excluding 1 dummy bit.

For the I10 device 43 that handles 8-bit data, no bit conversion is performed because the data length is the same as the 8-bit data handled by the host computer.

Note that the bit conversion unit 3. in the CPU 3 performs bit operations.
converts the given data into a data length that can be handled by the host computer or I10 device using the identification signal and interrupt signal of the I10 device that sends and receives the data, and it is stored in the CPU 3 as a control program and executed by software. It is effective to realize this.

As described above, since the multiplexer of the present invention changes the data bit length depending on the device that performs processing,
One-to-N communication can be performed even when a plurality of devices having different data formats are connected.

<Effects of the Invention> By performing pit operations, the multiplexer of the present invention converts data from multiple devices having different data bit lengths into a bit length that can be processed by a host computer, and outputs data from the host computer. Since it converts the data into a bit length that can be processed by each device, there is no need to prepare one-to-one ports for lines from devices with different bit lengths, and it is possible to connect multiple devices with data formats different from that of the host computer. can be connected to

[Brief explanation of the drawing]

The figure is a diagram showing the configuration of a multiplexer implementing the present invention. 1...Host computer, 1+, 2+, 23.2a, 25...Transmitter/receiver, 1
2.22.2s, 27.2s...transmission/reception control unit, 3.
...CPU, 3+...Bit converter, 4+, 42.
43...I10 device, b...Internal bus.

Claims (1)

[Claims] It has one host computer side interface port, multiple (N) device side interface ports, and one
A multiplexer that performs pair-to-N communication inputs data with different data bit lengths from the plurality of devices, converts it into a data bit length that can be processed by the host computer, and transmits the data from the host computer to the plurality of devices. A multiplexer comprising bit conversion means for converting data into a data bit length that can be processed by each device during transmission.