JPS63147250A - Synchronizing dependent exchange control device - Google Patents

Abstract

PURPOSE:To shorten the time needed by a CPU for control of a synchronizing dependent exchange control device by using an FIFO device to transfer information between the CPU and an interface converter and therefore increasing the information transfer rate between the CPU and the interface converter. CONSTITUTION:An interface converter 2 incorporating a control circuit, etc., is provided between a CPU 1 and a synchronizing dependent exchange device 3 which is controlled by the CPU 1. The data received from the CPU 1 are supplied via an FIFO device 21. As a result, no output parallel/serial converting circuit nor input serial/parallel converting circuit are needed at the side of the CPU 1 and the side of the converter 2. Thus the information is transmitted at a high speed to the converter 2 from the CPU 1. In the same way, the information is transmitted to the CPU 1 from the converter 2. Thus it is possible to shorten the time needed by the CPU to control a synchronizing dependent control device.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a synchronous terminal station control device that controls a synchronous terminal station device.

〔overview〕

The present invention provides a synchronous terminal station control device that controls a synchronous terminal device, in which a central processing unit and an interface converter are directly connected via an input/output bus and transmitted in parallel signals, and the interface converter connects the input/output bus with the interface converter. By connecting to the control circuit using a first-in, first-out device, the transmission speed between the central processing unit and the interface converter is increased, and the execution time required for controlling the central processing unit is shortened.

[Conventional technology]

FIG. 2 is a block diagram of a conventional synchronous terminal station control device. A conventional synchronous terminal station control device is composed of a central processing unit 4 and an interface converter 5, as shown in FIG. 2, and controls a synchronous terminal station device 3.

The central processing unit 4 is a personal computer (for example, 98
01) and R32 between it and the interface converter 5.
Connected by 32C interface.

The central processing unit 4 includes a processing bag ff41 and an input/output boat 4.
2, a parallel/serial converter 43, and a serial/parallel converter 44
The interface converter 5 includes a serial/parallel converter 51, a parallel/serial converter 55, a parallel/serial converter 52, a serial/parallel converter 54, and a control circuit 53.
It consists of

The central processing unit 4 divides the 64-bit control data into 4-bit units, performs AscII conversion (AscII conversion), adds 2 bytes of leading code and 1 byte of delimiter code, and sends the data as a 19-byte frame via the input/output port 42. , and output to the parallel/serial converter 43.

In the interface converter 5, the 19-byte control data received by the serial/parallel converter 51 is converted into 64-bit control data by the control circuit 53, and a parity bit is added to the control data, and the timing is adjusted with the synchronous terminal device 3. The signal is then output to the synchronous terminal device 3 via the parallel/serial converter 52.

The synchronous terminal equipment 3 and the central processing unit 4 are input/output ports 1-4.
2, a parallel/serial converter 43, and an interface converter 5 to output control results based on control data as control result data.

The interface converter 5 receives control result data and information from the synchronous terminal device 3 through a serial/parallel converter 54 . The control circuit 53 checks the parity pits of the control result data of the serial/parallel converter 54, and only if it is normal, converts the parity bit into 4-bit units, and adds 2 bytes of the leading code and 1 byte of the delimiter code, resulting in 19 bytes of data. It is written as a frame to the parallel/serial converter 55 starting from the first byte.

If a parity error is detected, convert the error code into a 19-byte frame and send it to the parallel/serial converter 55 in the same way.
Write starting from the first byte.

A serial/parallel converter 44 in the central processing unit 4 converts the control result data output from the interface converter 5 into serial data. The processing device 41 in the central processing unit 4 is
Control result data is obtained from the serial/parallel converter 44 via the input/output port 42.

Through the above steps, the central processing unit 4 obtains control result data.

[Problem that the invention seeks to solve]

However, in such a conventional synchronous terminal station control device, since the serial interface of the central processing unit 1 is different from the serial interface of the synchronous terminal device 3, the interface converter 2 is required.

Therefore, although the transmission speed between the interface converter 5 and the synchronous terminal device 3 is high (64 kb/s), the execution time required for controlling the central processing unit 4 is 5 (typically 9.6 kb/s), the central processing unit 4
The drawback was that the execution time required for control could not be reduced.

The present invention solves the above-mentioned drawbacks, and the central processing unit
It is an object of the present invention to provide a synchronous terminal station control device in which the transmission speed between interface converters is high and the execution time required for controlling a central processing unit can be shortened.

[Means for solving problems]

The present invention provides a synchronous terminal station comprising a central processing unit that controls a synchronous terminal station control device, and an interface converter including a control circuit that controls an interface between the central processing unit and the synchronous terminal station device. In the control device, the central processing unit and the interface converter are connected by an input/output bus that transmits parallel signals, and the interface converter includes an input/output bus provided between the control circuit and the input/output bus. It is characterized by including a first-in, first-out device.

[Effect]

Control data outputted from the input/output port of the central processing unit is provided as parallel signals to the control circuit of the interface converter via the input/output bus and the large cutting edge-in/first-out device. Further, control result data output from the control circuit is given as a parallel signal to the input/output board via the cutting edge first-in first-out device and the input/output bus. By the above-described operation, the transmission speed between the central processing unit and the interface converter can be increased, and the time required for controlling the central processing unit can be shortened.

〔Example〕

Embodiments of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram of a synchronous terminal station control device according to an embodiment of the present invention. In FIG. 1, the synchronous terminal station control device includes a central processing unit 1 that controls a synchronous terminal unit 3, an interface converter 2 that is an interface between the central processing unit 1 and the synchronous terminal unit 3, and a 16-bit A bus for transmitting parallel signals, of which 8 bits are used for data and the rest are used for control signals, and an input/output bus 6 that connects the central processing unit 1 and the interface converter 2. Be prepared.

The central processing unit 1 includes a processing unit 11 that is a personal computer, and an input/output port 12 that is connected to the processing unit 11 and outputs control data as parallel signals to the input/output bus 6 and inputs control result data from the human output bus 6. including.

The interface converter 2 includes a large cutting edge in/first out device 21 that inputs control data from the input/output bus 6, a parallel/serial converter 22 that converts the control data from parallel signals to serial signals, and provides the control data to the synchronous terminal device 3. A serial controller that inputs control result data from the synchronous terminal device 3 as a serial signal and converts it into a parallel signal.
A parallel converter 24, a cutting edge first-in first-out device 25 that outputs control result data as a parallel signal to the input/output bus 6, and a large cutting edge first-in first-out device 21 input control data and provide it to the parallel/serial converter 22. It includes a control circuit 23 that inputs the control result from the parallel converter 24 and provides it to the cutting edge first-in first-out device 25 to control the interface.

The operation of the synchronous terminal station control device having such a configuration will be explained. In FIG. 1, the central processing unit 1 continuously outputs 64-bit control data into 8-bit data (8 bytes) to the input/output port 12. In the interface converter 2, the 8-byte data output from the central processing unit 1 via the input/output port 12 is received by the large cutting edge first-out device 21. When the control circuit 23 detects that 8-byte control data has been written to the large-blade tip-in first-out device 21, it writes the 8-byte control data to the parallel/serial converter 22, further adds a parity pit, and outputs the synchronous terminal device. 3, and outputs to the synchronous terminal device 3.

In the synchronous terminal device 3, the central processing unit 1 is connected to the input/output port 12.
And the result of control based on the control data obtained via the interface converter 2 is output as control result data. The interface converter 2 receives control result data from the synchronous terminal device 3 using a serial/parallel converter 24 . Control circuit 2
3 checks the parity bit of the control result data, which is the output data of the serial/parallel converter 24, and writes it to the cutting edge first-in first-out device 25 in 8-byte parallel data format only if it is normal. The processing device 11 of the central processing unit 1 transfers the 8-byte control result data written to the cutting edge first-in first-out device 25 to the cutting edge first-in first-out device 25 via the input/output port 2.
Read more directly.

Through the above steps, the central processing unit 1 obtains control result data.

〔Effect of the invention〕

As described above, the present invention has the effect of increasing the data transmission speed between the central processing unit and the interface converter, and shortening the execution time required to control the synchronous terminal device of the central processing unit.

[Brief explanation of the drawing]

FIG. 1 is a block diagram of a synchronous terminal station control device according to an embodiment of the present invention. FIG. 2 is a block diagram of a conventional synchronous terminal station control device. 1.4... Central processing unit, 2.5... Interface converter, 3... Synchronous terminal device, 6... Input/output bus, 11.41... Processing device, 12.42. ...Input/output boat, 21...Large blade tip-in first-out device, 22.43
．． 52.55...Parallel/serial converter, 23.53...
- Control circuit, 24.44.51.54...Serial/parallel converter, 25...Blade first-in first-out device. Patent applicant: NEC Corporation 1,

Claims (1)

[Claims] (1) A synchronous terminal station control comprising a central processing unit that controls a synchronous terminal station control device, and an interface converter including a control circuit that controls an interface between this central processing unit and the synchronous terminal station device. In the device, the central processing unit and the interface converter are connected by an input/output bus that transmits parallel signals, and the interface converter has an input/output bus provided between the control circuit and the input/output bus. A synchronous terminal station control device comprising a first-in first-out device.