JPH09237247A - Bus width converter and bus width conversion system device - Google Patents

Abstract

PROBLEM TO BE SOLVED: To obtain a bus width converter capable of quickly transmitting/ receiving data by the use of an inexpensive LSI by providing the converter with respectively specified data synthesis control means, data storage means, data decomposition control means, and data transmission/reception control means. SOLUTION: A 1st data storage means 3 stores data inputted from a 1st bus connection means 1 having narrow data bus width. The data synthesis control means 4 synthesizes data up to bus width regulated by a 2nd bus connection means 2 having wide data bus width and controls which area in the means 3 temporarily stores the synthesized data. A 2nd data storage means 5 stores data inputted from the means 2. The data decomposition control means 6 decomposes the data up to bus width regulated by the means 1 and controls which area of the means 5 temporarily stores the decomposed data. The data transmission/reception control means 7 controls which is the transferred destination of data, the means 1 or 2.

Description

Detailed Description of the Invention

[0001]

BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a bus width conversion device and a bus width conversion system device between a personal computer and its peripheral devices.

[0002]

2. Description of the Related Art Conventionally, when a peripheral device having a narrow bus width is connected to a data bus width which has been widened with the increase in speed and functionality of a personal computer, an LSI for controlling an interface in the peripheral device is expensive. A method of using the same bus width by using the same bus or using only the data bus width adapted to an inexpensive LSI has been adopted.

[0003]

However, there is an increasing demand for higher speed and higher functionality of peripheral devices, and inexpensive L
It is becoming difficult to design by using only the data bus width adapted to SI.

Therefore, an object of the present invention is to solve the above problems and provide a bus width conversion device and a bus width conversion system device capable of transmitting and receiving high-speed data with an inexpensive LSI.

[0005]

In order to achieve the above object, the bus width conversion device of the present invention uses the data input from the first bus connecting means for the bus width defined by the second bus connecting means. Data synthesizing control means for synthesizing up to, first data storing means for temporarily storing the synthesized data, and data defined by the first bus connecting means for the data input from the second bus connecting means. The data disassembly control means for disassembling to the width, the second data storage means for temporarily storing the disassembled data, and the data transmission / reception control means for controlling the direction of data transmission / reception are configured.

A bus width conversion module is constituted by the above-mentioned elements, and a plurality of the bus width conversion modules are provided, and a control means for controlling these bus width conversion modules is provided to provide a bus width conversion system device.

[0007]

According to the first aspect of the invention, the data width between the first bus connecting means and the second bus connecting means automatically becomes the bus width defined by the respective bus connecting means. In addition, inexpensive and high-speed data transmission / reception can be realized.

According to a second aspect of the present invention, the bus width conversion device according to the first aspect is a bus width conversion module, and a plurality of bus width conversion modules and module control means for controlling the plurality of bus width conversion modules are configured. It is possible to easily cope with an apparatus having an expanded bus width. Hereinafter, embodiments of the present invention will be described with reference to the drawings.

(First Embodiment) FIG. 1 is a configuration block diagram of a bus width converter according to a first embodiment of the present invention, and FIG. 2 is a circuit block diagram of the same. In FIG. 1, 1 is a first bus connecting means having a narrow data bus width, and 2 is a second bus connecting means having a wide data bus width. 3 is the first bus connecting means 1
The first data storage means 4 for storing the data from the first data storage means 4 synthesizes the data up to the bus width defined by the second bus connection means 2 and determines where in the first data storage means 3 the data is temporarily stored. Data synthesis control means 5 for controlling, second data storage means 5 for storing the data from the second bus connecting means 2, and 6 for decomposing the data into the bus width defined by the first bus connecting means 1, A data decomposition control means for controlling where in the second data storage means 5 the data is temporarily stored, and 7 indicates whether the data is transferred to the first bus connection means 1 or the second bus connection means 2. It is a data transmission / reception control means for controlling.

FIG. 2 is a circuit block diagram. In the first embodiment, a PCMCIA bus (bus width 16 bits) which is standard equipment for expanding functions in a notebook computer and a typical peripheral device are adopted. An explanation will be given with connection of a SCSI bus (8-bit width).

In FIG. 2, a plurality of data (8 bits each) output from the SCSI bus 8 passes through a data buffer 9 and is sent to a data register 10 (8 bit width) and a data register 11 (8 bit width). The data is sequentially stored according to the register selection signal from the register controller 12 activated by the controller 15. The stored data is output from the data register 10 and the data register 11 at the same time (16-bit width), passes through the data buffer 13, and P
It is input to the CMCIA bus 14. At this time, the transfer directions of the data buffer 9 and the data buffer 13 are fixed to the direction in which the data is transferred from the SCSI bus 8 to the PCMCIA bus 14 by the bus controller 15.

The data output from the PCMCIA bus 14 passes through the data buffer 13 and is simultaneously stored in the data register 16 (8-bit width) and the data register 17 (8-bit width) and activated by the bus controller 15. In accordance with the register selection signal from the register controller 18, the data is sequentially passed through the data buffer 9 and the SCSI.
Input to the bus 8. At this time, the transfer directions of the data buffer 13 and the data buffer 9 are set to the bus controller 15
Is fixed in the direction in which data is transferred from the PCMCIA bus 14 to the SCSI bus 8.

(Embodiment 2) FIG. 3 is a block diagram of a bus width conversion module according to Embodiment 2 of the present invention, and FIG.
FIG. 3 is a configuration block diagram of the same bus width conversion system device.
This bus width conversion module is a module of the data bus width conversion device of the first embodiment. The bus width conversion module 19 comprises a first data storage means 3, a data combination control means 4, a second data storage means 5, a data decomposition control means 6 and a data transmission / reception control means 7.

FIG. 4 is a block diagram showing the arrangement of an arbitrary bus width conversion system device which is composed of a plurality of bus width conversion modules 19 and module control means 20 for controlling each of the bus width conversion modules 19 at the same time. According to the configuration of the second embodiment, arbitrary bus width conversion such as 8-bit / 32-bit conversion, 8-bit / 48-bit conversion, 8-bit / 64-bit conversion can be performed.

[0015]

According to the bus width converter of the present invention, data can be transmitted / received inexpensively and at high speed between devices having different data bus widths. Further, according to the bus width conversion system device of the present invention, it is possible to perform arbitrary bus width conversion, and it is possible to correspond to a device having an expanded bus width.

[Brief description of drawings]

FIG. 1 is a configuration block diagram of a bus width conversion device according to a first embodiment of the present invention.

FIG. 2 is a circuit block diagram of the bus width conversion device according to the first embodiment of the present invention.

FIG. 3 is a block diagram of a bus width conversion module according to a second embodiment of the present invention.

FIG. 4 is a configuration block diagram of a bus width conversion system device according to a second embodiment of the present invention.

[Explanation of symbols]

 1 1st bus connection means 2 2nd bus connection means 3 1st data storage means 4 data synthesis control means 5 2nd data storage means 6 data decomposition control means 7 data transmission / reception control means 8 SCSI bus 9 data buffer 10 Data register 11 Data register 12 Register controller 13 Data buffer 14 PCMCIA bus 15 Bus controller 16 Data register 17 Data register 18 Register controller 19 Bus width conversion module 20 Module control means

Claims (2)

[Claims] 1. A data synthesizing control means for synthesizing data inputted from the first bus connecting means up to a bus width defined by the second bus connecting means, and a first means for temporarily storing the synthesized data. Data storage means, data decomposition control means for decomposing the data input from the second bus connection means to the bus width defined by the first bus connection means, and temporarily storing the decomposed data. 2. A bus width conversion device comprising: a second data storage means; and a data transmission / reception control means for controlling a data transmission / reception direction. 2. A data synthesizing control means for synthesizing data input from the first bus connecting means up to a bus width defined by the second bus connecting means, and a first means for temporarily storing the synthesized data. Data storage means, data decomposition control means for decomposing the data input from the second bus connection means to the bus width defined by the first bus connection means, and temporarily storing the decomposed data. A bus width conversion module is composed of the second data storage means and the data transmission / reception control means for controlling the direction of data transmission / reception, and a plurality of bus width conversion modules are provided, and control for controlling these bus width conversion modules is provided. A bus width conversion system device comprising means.