JPS63170933A - Wafer prober - Google Patents

Wafer prober

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Publication number
JPS63170933A
JPS63170933A JP273487A JP273487A JPS63170933A JP S63170933 A JPS63170933 A JP S63170933A JP 273487 A JP273487 A JP 273487A JP 273487 A JP273487 A JP 273487A JP S63170933 A JPS63170933 A JP S63170933A
Authority
JP
Japan
Prior art keywords
probe
wafer
stage
contact
signal
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP273487A
Other languages
Japanese (ja)
Inventor
Toshimi Yasuda
安田 利美
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP273487A priority Critical patent/JPS63170933A/en
Publication of JPS63170933A publication Critical patent/JPS63170933A/en
Pending legal-status Critical Current

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  • Testing Of Individual Semiconductor Devices (AREA)
  • Testing Or Measuring Of Semiconductors Or The Like (AREA)

Abstract

PURPOSE:To prevent the occurrence of an inspection error which is caused by the deterioration of the electrical contact with a pad by a method wherein, after the tip of a probe has been brought into contact with an abrasive and has been ground, the probe is brought into contact with an electric-conductive material so as to measure the contact resistance. CONSTITUTION:After all the chips on a water have been measured, a stage 1 is driven by means of a drive system 13 so that an abrasive 2 can be positioned directly under a probe 6; the abrasive 2 is raised by means of a drive system 12; the probe 5 is ground. After the probe 6 has been ground, the stage 1 is driven by means of the drive system 13; the probe 6 is brought into contact with an electricconductive material 3; the continuity of the probe 6 is tested; its contact resistance is measured; it is inspected whether the probe 6 has been ground surely. By this method, a high-quality probing operation can be executed.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は、半導体ウェーハ上に形成された集積回路素子
(以下、チップという)の検査を、ウェーハ状態で行な
うウエーハプローバに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a wafer prober that inspects integrated circuit elements (hereinafter referred to as chips) formed on a semiconductor wafer in a wafer state.

〔従来の技術〕[Conventional technology]

ウェーハチェックは、1個あるいは複数個のチップの電
極(以下、パッドという)に探針プローブを接触させて
、この探針プローブを介してICテスタからバイアスΦ
信号を供給し特性チェックを行ないチップの良・不良の
判定を行なうものである。上記のブロービング探作を繰
返して、ウエーノ1上の全チップを検査する。通常、探
針プローブの材質はタングステン鋼であり、パッドの材
質はアルミニウムが主体であるため、パッドの材質より
探針プローブの材質が硬いので、探針プローブがブロー
ビングのときにパッドにくい込む。そのためパッドは傷
つけられ、わずかながらアルミニウムが削られごみが発
生し探針プローブに付着する。ブロービングの回数が多
いと、ごみの付着量が大きく表9、パッドとの電気的接
触状態が悪くなって、検査ミスの原因になる。そこで、
探針プローブに付着したごみを取除くため、普通、探針
プローブの先端を研磨する。
A wafer check is performed by bringing a tip probe into contact with the electrodes (hereinafter referred to as pads) of one or more chips, and applying a bias Φ from the IC tester via the tip probe.
It supplies signals and checks the characteristics to determine whether the chip is good or bad. The above probing search is repeated to inspect all chips on Ueno 1. Normally, the material of the tip probe is tungsten steel, and the material of the pad is mainly aluminum, so the material of the tip probe is harder than the material of the pad, so the tip probe sinks into the pad during blowing. As a result, the pad is damaged and the aluminum is slightly scraped, creating dust that adheres to the probe. If the number of times of blowing is large, the amount of dust attached will be large and the electrical contact with the pad will deteriorate, leading to inspection errors. Therefore,
The tip of the tip probe is usually polished to remove dirt attached to the probe.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上記研磨は自動化されている。例えばウェーハf:載せ
たステージの周辺に研磨用のセラミック部材を搭載し、
設定さnた条件、例えばウエ−バ一枚ごと、あるいは1
000チツプごとなどのブロービング後に、セラミック
部材を探針プローブの直下へ移動し、上下運動すること
によって、探針プローブに繰返し押し当てて行なう。
The above polishing is automated. For example, wafer f: A ceramic member for polishing is mounted around the stage on which it is placed,
Set conditions, for example, for each waver, or for each
After blowing every 000 chips, the ceramic member is moved directly below the probe and moved up and down to repeatedly press it against the probe.

従来のプローバでは、上記自動研磨だけが行なわれ、探
針プローブの先端のごみの除去が、完全になされパッド
との接触抵抗がチップの測定上影響がないか否かを検査
する手段はなかった。
With conventional probers, only the above-mentioned automatic polishing is performed, and the dust on the tip of the probe is completely removed, and there is no way to check whether the contact resistance with the pad does not affect the measurement of the chip. .

〔問題点を解決するための手段〕[Means for solving problems]

本発明のプローバは、上記問題点を解決するためになさ
れたもので、探針プローブの先端を研磨部材に接触させ
研磨する手段と、前記の研磨された探針プローブを導電
部材に接触させ接触抵抗を測定する手段とを有するもの
である。
The prober of the present invention has been made to solve the above problems, and includes a means for polishing the tip of the tip probe by bringing it into contact with a polishing member, and a means for bringing the polished tip probe into contact with a conductive member. and means for measuring resistance.

〔実施例〕〔Example〕

以下、本発明の実施例につき、図面を参照して説明する
。第1図は第1実施例の平面図、第2図・第3図はその
断面図でプロービング状態のときと、研磨◆接触抵抗測
定(接触導通試験)の状態のときにそれぞれ対応する。
Embodiments of the present invention will be described below with reference to the drawings. FIG. 1 is a plan view of the first embodiment, and FIGS. 2 and 3 are cross-sectional views thereof, which correspond to the probing state and the polishing◆contact resistance measurement (contact continuity test) state, respectively.

ウエーノ・4はステージlに真空吸引によシ吸着てれて
おシ、ステージlは縦横方向およびこれに対する垂直方
向とステージ10円周接線方向に回転する運動を自在に
行うことができる。それぞれの運動は駆動系13にて駆
動され、制御部11によって制御される。
The Ueno 4 is attracted to the stage 1 by vacuum suction, and the stage 1 can freely rotate in the vertical and horizontal directions, in the perpendicular direction thereto, and in the tangential direction of the circumference of the stage 10. Each movement is driven by a drive system 13 and controlled by a control section 11.

研磨部材2と2N−型部材3はスンージ1に固定されて
いるものの、ステージlの縦横運動平面に対して垂直方
向に独立に運動できるように々っている。この運動は駆
動系12にて駆動され、制御部11によって制御式れる
。′lifiM部材2および導電部材3はウェーハ4を
プロービングしている最中は、第2図のように、それぞ
れの上面はステージlのウェーハチャック面よりも下に
位置している。研磨部材2にはセラミック系の材料を用
い、導電部材3には表面にアルミニウム蒸着を施した基
板を用いる。導電部材3はそれを取シ付けている部材か
らは電気的に絶縁されている。また研磨部材2.導電部
材3す駆動した場合は第3図のように元の位置より上昇
し、その上面はウェーハ4の表面の位置と同じになる。
Although the polishing member 2 and the 2N-type member 3 are fixed to the slider 1, they are movable independently in a direction perpendicular to the longitudinal and lateral movement plane of the stage l. This movement is driven by a drive system 12 and controlled by a control section 11. While the 'lifiM member 2 and the conductive member 3 are probing the wafer 4, their upper surfaces are located below the wafer chuck surface of the stage l, as shown in FIG. A ceramic material is used for the polishing member 2, and a substrate whose surface is coated with aluminum vapor deposition is used for the conductive member 3. The conductive member 3 is electrically insulated from the member to which it is attached. Also, the polishing member 2. When the conductive member 3 is driven, it rises from its original position as shown in FIG. 3, and its upper surface becomes the same as the surface of the wafer 4.

一連の動作のため、先ず制御部11にあらかじめ制御指
示を与える。すなわちウェーハを1枚測定終了した時点
で、探針プローブ6の研磨を行い、研磨終了後その接触
導通試験を行い、接触導通試験の結果が良好ならば次の
ウェーハの測定に移り、接触導通試験の結果が不良なら
ば停止するといつ指示である。またプローバとともに稼
動させるテスタ14には、第4図の信号伝達経路図に示
すように、ブローパより接触導通試験開始を表す信号を
受信したら、導通試験用の試験プログラムを準備し、実
行するようにあらかじめ指示を与えておく。
For a series of operations, first, a control instruction is given to the control unit 11 in advance. In other words, when one wafer has been measured, the tip probe 6 is polished, and after the polishing is finished, a contact continuity test is performed, and if the result of the contact continuity test is good, the next wafer is measured, and the contact continuity test is performed. It is an indication when to stop if the result is bad. In addition, as shown in the signal transmission path diagram in Figure 4, the tester 14 that operates together with the prober is configured to prepare and execute a test program for the continuity test when it receives a signal indicating the start of the contact continuity test from the prober. Give instructions in advance.

プローバにウェーハキャリアなどによりウェーハが装着
されると、プローバは1枚目のウェーハをウェーハキャ
リアから取り出し、ステージl上に供給し、真空吸着す
る。ウェーハの直径、厚さなどのデータを採集したあと
、ウェーハアライメントを行い、チップに探針プローブ
6t−接触させ測定を開始する。実際の測定手順として
は、第4図に示すように制御部11からテスタプローバ
制御信号路nを介してテスタ14ヘチツプの測定開始を
要求する信号(テストスタート信号)を送り、テスタ1
4は測定系信号路21を介して探針プローブ6に試験信
号を送シチツプを測定する。測定結果に応じて良品信号
(バス信号)、不良品信号(フェイル信号)を制御部1
1に送り、続いて測定が終了したことを表す信号(テス
トエンド信号)を送る。これで1つのチップの測定の終
了である。制御部11はテストエンド信号を受けるとス
テージ1を駆動し、次のチップへ探針プローブ6を接触
させ、テストスタート信号をデスタ14へ送る。以下こ
の繰シ返しである。
When a wafer is mounted on the prober using a wafer carrier or the like, the prober takes out the first wafer from the wafer carrier, supplies it onto stage l, and vacuum-chucks it. After collecting data such as the diameter and thickness of the wafer, wafer alignment is performed, and the tip probe 6t is brought into contact with the chip to start measurement. In the actual measurement procedure, as shown in FIG.
Reference numeral 4 sends a test signal to the tip probe 6 via the measurement system signal path 21 to measure the tip. Control unit 1 outputs a good product signal (bus signal) and a defective product signal (fail signal) according to the measurement results.
1, and then sends a signal (test end signal) indicating that the measurement has ended. This completes the measurement of one chip. Upon receiving the test end signal, the control section 11 drives the stage 1, brings the tip probe 6 into contact with the next chip, and sends a test start signal to the tester 14. This is repeated below.

ウェーハ上の全チップの測定が終了すると、第3図に示
すように探針プローブ6の直下に研磨部材2が位置する
↓うにステージ1を駆動系13により駆動し、さらに駆
動系12により研磨部材2を上昇させる。そして駆動系
13によりステージ1を上昇させると探針プローブ6と
研磨部材2が接触し探針プローブ6が研磨される。
When all the chips on the wafer have been measured, the polishing member 2 is positioned directly below the tip probe 6 as shown in FIG. Raise 2. Then, when the stage 1 is raised by the drive system 13, the tip probe 6 and the polishing member 2 come into contact and the tip probe 6 is polished.

探針プローブ6の研磨が終了すると、探針プローブ6の
直下に導4部材3が位置するようにステージlを駆動系
13により駆動し、さらに駆動系12によシ導電部材3
を上昇させる。そして駆動系13によりステージ1を上
昇させると探針プローブ6と導電部材2が接触する。
When the polishing of the tip probe 6 is completed, the stage 1 is driven by the drive system 13 so that the conductive member 3 is positioned directly below the tip probe 6, and the drive system 12 further drives the conductive member 3 by the drive system 12.
to rise. Then, when the stage 1 is raised by the drive system 13, the probe 6 and the conductive member 2 come into contact with each other.

この状態で第4図に示すように制御部11はテスタ14
へ導通試験制御信号路るを介して導通試験開始を要求す
る信号(プローブテストスタート信号)を送る。テスタ
14はプローブテストスタート信号を受けて測定系信号
路21に導通試験信号を送夛探針プローブ6の導通状態
を測定する。測定結果に応じて良品信号(プローブテス
トパス信号)、不良品信号(プローブテストフェイル信
号)を制御部11に送り、続いて導通試験が終了したこ
とを表す信号(プローブテストエンド信号)を送る。接
触抵抗は、との導通試験による導通状態の測定でわかる
In this state, as shown in FIG.
A signal (probe test start signal) requesting the start of a continuity test is sent to the probe via the continuity test control signal path. The tester 14 receives the probe test start signal, sends a continuity test signal to the measurement system signal path 21, and measures the continuity state of the probe 6. According to the measurement results, a good product signal (probe test pass signal) and a defective product signal (probe test fail signal) are sent to the control unit 11, and then a signal indicating that the continuity test has been completed (probe test end signal) is sent. Contact resistance can be determined by measuring the continuity state by conducting a continuity test with.

ここで制御部1工は、プローブテストパス信号を受けて
いたならば、ステージ1のウェーハはウェーハキャリア
へ収納嘔れ、2枚目のウェーハがステージlに装着され
、以下、前記の動作を繰シ返す。制御部11がプローブ
テストフェイル信号を受けていたならば、ブローμは動
作を停止する。
Here, if the control unit 1 receives the probe test pass signal, the wafer on stage 1 is stored in the wafer carrier, the second wafer is mounted on stage 1, and the above operation is repeated. I'll return it. If the control unit 11 receives the probe test fail signal, the blow μ stops operating.

次に第2笑施例につき、第5図を参照して説明する。第
5図は、動作の概略を説明するための模式的なブローμ
平面図である。
Next, a second embodiment will be explained with reference to FIG. FIG. 5 shows a schematic blow μ for explaining the outline of the operation.
FIG.

ステージ101はブローμのブロービング平面内を自在
に運動する。121はステージ101のウェーハ供給位
置、122はステージ101のウェーハ収納位置ヲ表わ
している。
The stage 101 freely moves within the blowing plane of the blow μ. 121 represents the wafer supply position of the stage 101, and 122 represents the wafer storage position of the stage 101.

111.112 ハウエーハ104の移動流れを示して
おシ、ウェーハキャリア131からステージ101ある
いはステージ101からウェーハキャリア132へはベ
ルトによるウェーハの搬送が行なわれる。
111.112 shows the flow of movement of the wafer 104. The wafer is conveyed by a belt from the wafer carrier 131 to the stage 101 or from the stage 101 to the wafer carrier 132.

研磨部材102と導電部材103はそれぞれ独立してお
り、その形状はほぼウェーハと同じである。研磨部材1
02は搬送路113で、導電部材103は搬送路114
でステージ101へそれぞれ供給され、作業終了後はそ
れぞれ元の位置へもどるようになっている。
The polishing member 102 and the conductive member 103 are independent from each other, and have substantially the same shape as a wafer. Polishing member 1
02 is a conveyance path 113, and the conductive member 103 is a conveyance path 114.
They are each supplied to the stage 101 and returned to their original positions after the work is completed.

以下第5図における動作を説明する。ブローμへの指示
条件は第1実施例の場合と同じである。ブローμにウェ
ーハキャリアによりウェーハが装Nてれると、ブローμ
は1枚目のウェーハをウェーハキャリア131から取シ
出し、搬送路111を通ってステージ101へ供給する
。り工−ハの直径、厚さなどのデータを採集した後、ウ
ェーハアライメントを行い、チップに探針プローブ6(
図示していない)を接触させ測定をH始する。テスタ1
4とブローμとの信号通信、チップを測定時のステージ
101の動作も第1実施例の場合と同じである。全チッ
プの測定が終了すると、ウェーハは搬送路112 ’i
通って、ウェーハキャリア132に収納される。
The operation in FIG. 5 will be explained below. The conditions for instructing the blow μ are the same as in the first embodiment. When a wafer is loaded onto the blow μ by a wafer carrier, the blow μ
takes out the first wafer from the wafer carrier 131 and supplies it to the stage 101 through the transport path 111. After collecting data such as the diameter and thickness of the wafer, the wafer is aligned, and the tip probe 6 (
(not shown) to start the measurement. Tester 1
The signal communication between the stage 101 and the blow μ and the operation of the stage 101 when measuring the chip are also the same as in the first embodiment. When all chips have been measured, the wafer is transferred to the transport path 112'i
The wafer is then stored in the wafer carrier 132.

次に、研磨部材102は搬送路113ヲ通ってステージ
101へ供給石れ真空吸着される。ステージ101は探
針プローブ6の直下に移動し、ステージ101を上昇さ
せ研磨部材102を探針プローブに接触させ研磨を行う
。研磨が終了すると、研磨部材102は搬送路113を
通って元の位置へもどされる。続いて導電部材103は
搬送路114を通ってステージ101へ供給され真空吸
着される。ステージ101は探針プローブ6の直下に移
動し、ステージ101を上昇させ導電部材103を探針
プローブ6に接触させ、導通試験を行う。
Next, the polishing member 102 passes through the conveyance path 113 and is vacuum-adsorbed onto the stage 101. The stage 101 moves directly below the tip probe 6, raises the stage 101, brings the polishing member 102 into contact with the tip probe 6, and performs polishing. When polishing is completed, the polishing member 102 is returned to its original position through the conveyance path 113. Subsequently, the conductive member 103 is supplied to the stage 101 through the conveyance path 114 and vacuum-adsorbed thereon. The stage 101 moves directly below the probe 6, raises the stage 101, brings the conductive member 103 into contact with the probe 6, and performs a continuity test.

導通試験の実行要領は第1実施例の場合と同じである。The procedure for conducting the continuity test is the same as in the first embodiment.

導通試験が終了すると導電部材103は搬送路114を
通って元の位置へもどされる。
When the continuity test is completed, the conductive member 103 is returned to its original position through the conveyance path 114.

導通試験の結果が良好ならば2枚目のウェーハがステー
ジ101へ搬送路111を通って供給される。以下前記
と同様に繰り返えされる。また、導通試験が不良の場合
は測定が中断される。
If the result of the continuity test is good, the second wafer is supplied to the stage 101 through the transport path 111. Thereafter, the same procedure as above is repeated. Furthermore, if the continuity test is unsuccessful, the measurement is interrupted.

以上説明したように本発明は、探針プローブの研Mを行
った直後に探針プローブの導通試験を行ない接触抵抗を
測定し、探針プローブの研磨が確実に実施逼れているこ
とを検査することにより良質のブロービングを実現でき
るという効果がある。
As explained above, in the present invention, immediately after polishing the tip probe, a continuity test is performed on the tip probe to measure the contact resistance, and it is verified that the tip probe has been reliably polished. This has the effect of realizing high quality blobbing.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の第1実施例のウェーハステージの平面
図、第2図はチップのプロービングを行おうとする状態
を示した断面図、第3図は探針プローブを研磨あるいは
導通試験を行おうとする状態を示した断面図、第4図は
テスタとプローバの信号路を表わす図、および第5図は
本発明の第2実施例の平面図である。 1・・・ステージ、    2・・・研磨部材、3・・
・導電部材、    4・・・ウェーハ、5・・・プロ
ーブガード、6・・・探針プローブ、11・・・制御部
、12 、13・・・駆動系、14・・・テスタ、21
・・・測定系信号路、n・・・テスタ・プローバ制御信
号路、お・・・導通試験制御信号路、 101・・・ステージ、102・・・研磨部材、103
・・・導電部材、104・・・ウェーハ、111・・・
ウェーハ供給時の搬送路、112・・・ウェーハ収納時
の搬送路、113・・・研磨部材の搬送路、 114・・・導電部材の搬送路、 121・・・ウェーハの供給位置、 122・・・ウェーハの収納位置、 131・・・ウェーハ供給キャリア、 132・・・ウェーハ収納キャリア。
FIG. 1 is a plan view of the wafer stage according to the first embodiment of the present invention, FIG. 2 is a cross-sectional view showing the state in which chip probing is to be performed, and FIG. FIG. 4 is a diagram showing the signal path between the tester and the prober, and FIG. 5 is a plan view of the second embodiment of the present invention. 1... Stage, 2... Polishing member, 3...
- Conductive member, 4... Wafer, 5... Probe guard, 6... Tip probe, 11... Control unit, 12, 13... Drive system, 14... Tester, 21
...Measurement system signal path, n...Tester/prober control signal path,...Continuity test control signal path, 101...Stage, 102...Polishing member, 103
... Conductive member, 104... Wafer, 111...
Conveyance path during wafer supply, 112... Conveyance path during wafer storage, 113... Conveyance path for polishing member, 114... Conveyance path for conductive member, 121... Wafer supply position, 122... - Wafer storage position, 131... Wafer supply carrier, 132... Wafer storage carrier.

Claims (1)

【特許請求の範囲】[Claims] 半導体ウェーハ上に形成した各チップの電気的特性のチ
ェックを行なうプローバにおいて、探針プローブの先端
を研磨部材に接触させ研磨する手段と、前記の研磨され
た探針プローブを導電部材に接触させ接触抵抗を測定す
る手段とを有することを特徴とするウエーハプローバ。
A prober for checking the electrical characteristics of each chip formed on a semiconductor wafer includes a means for polishing the tip of a probe by bringing it into contact with a polishing member, and a means for bringing the polished tip of the probe into contact with a conductive member. A wafer prober comprising: means for measuring resistance.
JP273487A 1987-01-08 1987-01-08 Wafer prober Pending JPS63170933A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP273487A JPS63170933A (en) 1987-01-08 1987-01-08 Wafer prober

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP273487A JPS63170933A (en) 1987-01-08 1987-01-08 Wafer prober

Publications (1)

Publication Number Publication Date
JPS63170933A true JPS63170933A (en) 1988-07-14

Family

ID=11537555

Family Applications (1)

Application Number Title Priority Date Filing Date
JP273487A Pending JPS63170933A (en) 1987-01-08 1987-01-08 Wafer prober

Country Status (1)

Country Link
JP (1) JPS63170933A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0310176A (en) * 1989-06-07 1991-01-17 Nec Yamagata Ltd Probing apparatus
US5365180A (en) * 1993-04-16 1994-11-15 National Semiconductor Corporation Method for measuring contact resistance
US6306187B1 (en) 1997-04-22 2001-10-23 3M Innovative Properties Company Abrasive material for the needle point of a probe card
WO2021149668A1 (en) * 2020-01-24 2021-07-29 ミネベアミツミ株式会社 Probe, measuring device, and measuring method

Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55163854A (en) * 1979-06-06 1980-12-20 Nippon Denshi Zairyo Kk Manufacture of semiconductor wafer testing probe
JPS5721831A (en) * 1980-07-14 1982-02-04 Nec Kyushu Ltd Inspecting device for semiconductor wafer
JPS612295A (en) * 1984-06-14 1986-01-08 松下電器産業株式会社 Thin film el element
JPS62219937A (en) * 1986-03-20 1987-09-28 Nec Kansai Ltd Semiconductor wafer

Patent Citations (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS55163854A (en) * 1979-06-06 1980-12-20 Nippon Denshi Zairyo Kk Manufacture of semiconductor wafer testing probe
JPS5721831A (en) * 1980-07-14 1982-02-04 Nec Kyushu Ltd Inspecting device for semiconductor wafer
JPS612295A (en) * 1984-06-14 1986-01-08 松下電器産業株式会社 Thin film el element
JPS62219937A (en) * 1986-03-20 1987-09-28 Nec Kansai Ltd Semiconductor wafer

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0310176A (en) * 1989-06-07 1991-01-17 Nec Yamagata Ltd Probing apparatus
US5365180A (en) * 1993-04-16 1994-11-15 National Semiconductor Corporation Method for measuring contact resistance
US6306187B1 (en) 1997-04-22 2001-10-23 3M Innovative Properties Company Abrasive material for the needle point of a probe card
WO2021149668A1 (en) * 2020-01-24 2021-07-29 ミネベアミツミ株式会社 Probe, measuring device, and measuring method

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