JPS6316918B2 - - Google Patents
Info
- Publication number
- JPS6316918B2 JPS6316918B2 JP53013843A JP1384378A JPS6316918B2 JP S6316918 B2 JPS6316918 B2 JP S6316918B2 JP 53013843 A JP53013843 A JP 53013843A JP 1384378 A JP1384378 A JP 1384378A JP S6316918 B2 JPS6316918 B2 JP S6316918B2
- Authority
- JP
- Japan
- Prior art keywords
- printed wiring
- board
- wiring board
- press
- punching
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Expired
Links
- 238000000034 method Methods 0.000 claims description 16
- 238000004519 manufacturing process Methods 0.000 claims description 5
- 238000004080 punching Methods 0.000 description 15
- 239000000758 substrate Substances 0.000 description 9
- 238000003825 pressing Methods 0.000 description 3
- 238000010008 shearing Methods 0.000 description 3
- 238000005553 drilling Methods 0.000 description 2
- 239000000463 material Substances 0.000 description 2
- 238000010586 diagram Methods 0.000 description 1
- 239000006196 drop Substances 0.000 description 1
- 239000003221 ear drop Substances 0.000 description 1
- 239000002699 waste material Substances 0.000 description 1
Landscapes
- Perforating, Stamping-Out Or Severing By Means Other Than Cutting (AREA)
Description
【発明の詳細な説明】
本発明は印刷配線板の製造方法に関し、とくに
連接した基板を有する印刷配線板の分割方法に関
する。DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a method of manufacturing a printed wiring board, and more particularly to a method of dividing a printed wiring board having connected substrates.
従来連接した基板を有する印刷線板の分割方法
は、第１図の如く充分な余白部を単数基板２の外
形枠部をもつて連接した印刷配線板をプレス金型
で分割するか、第２図の如くミシン目と称する貫
通孔４を板の外形枠部に一定の間隔をおいてクラ
ツク分割し易いように連続した孔を設け、この孔
（ミシン目）にそつて剪断力を加えて折り曲げて
分割させていた。前者のプレス金型で分割する方
法では、外形枠部のスクラツプ分が多くなり材料
費の無駄が多かつた。また後者のミシン目による
分割方法では剪断面のおうとつが連なり仕上り面
が悪く取扱い上不便であつた。 Conventionally, as shown in FIG. 1, the method for dividing printed wiring boards having connected substrates is to divide the connected printed wiring boards using a press mold or by dividing the connected printed wiring boards with the outer frame of a single substrate 2 by using a sufficient margin as shown in FIG. As shown in the figure, continuous holes 4 called perforations are provided at regular intervals in the outer frame of the plate to facilitate crack division, and shearing force is applied along these holes (perforations) to bend the plate. It was split up. In the former method of dividing using a press die, a large amount of the outer frame was scrapped, resulting in a large waste of material costs. In addition, in the latter method of dividing by perforations, the sheared surfaces had a series of grooves, resulting in a poor finished surface and inconvenience in handling.
本発明の目的はかゝる従来の製造方法の欠点を
解決した印刷配線板の製造方法を提供することに
ある。 An object of the present invention is to provide a method for manufacturing printed wiring boards that overcomes the drawbacks of the conventional manufacturing methods.
本発明は、互に連接した複数個の配線基板を各
配線基板ごとに分割する方法において、前記各配
線基板の枠コーナー部に貫通孔を穿設したのち、
前記貫通孔同志を結んだ線上でプレス抜きする際
に、前記線をはさんで隣接しない独立の配線基板
を同時にプレス抜きする第１の工程と、該第１の
工程で残された連接する複数個の配線基板を前記
線上でプレス抜きして互いに分離する第２の工程
とを有することを特徴とする。 The present invention provides a method for dividing a plurality of interconnected wiring boards into individual wiring boards, in which a through hole is formed in a frame corner of each wiring board, and then,
A first step of simultaneously pressing out independent wiring boards that are not adjacent across the line when pressing out on a line connecting the through holes, and a plurality of interconnected wiring boards left in the first step. and a second step of separating the individual wiring boards from each other by pressing them on the line.
次に本発明による印刷配線板の分割方法の一実
施例を、第３図〜第７図を参照して説明する。第
５図に示す印刷配線板１は多数個にそれぞれ分割
される単数基板（以下基板２と略称）が連接して
編集されている。次に各基板２の外形枠コーナー
部３に貫通孔４を穿設したのち印刷配線板１の板
端左側（部）１ａおよび板端右側部１ｂの切欠き
除去を行なう。 Next, an embodiment of the printed wiring board dividing method according to the present invention will be described with reference to FIGS. 3 to 7. The printed wiring board 1 shown in FIG. 5 is edited by connecting a single board (hereinafter abbreviated as board 2) which is divided into a large number of parts. Next, after a through hole 4 is bored in the outer frame corner portion 3 of each board 2, the notches on the left side (portion) 1a of the printed wiring board 1 and the right side (portion) 1b of the board end are removed.
次に第４図に示す如く金型の打抜き基準のパイ
ロツトピン５ａを配列させた平面図のうち配列パ
ターンl2の打抜き部を用いて印刷配線板１を第５
図に示す５ｂのパイロツト孔に合せ第６図の×印
部分の基板（９箇所）とその上下斜線で示す耳落
し部分６ａ（２箇所）の第１のプレス抜きをする。
このとき第４図のl2部より左側の配列パターン部
l3およびl1の金型部分は空打ちとなり打抜きを行
つていない。 Next, as shown in FIG. 4, in the plan view in which the pilot pins 5a are arranged as the punching standard of the mold, the printed wiring board 1 is cut out using the punched portion of the array pattern l2 .
In alignment with the pilot hole 5b shown in the figure, first press punching is performed on the board (nine places) marked with an x in FIG.
At this time, the array pattern part on the left side of part l 2 in Figure 4
The mold parts of l 3 and l 1 were blank punched and no punching was performed.
次に印刷配線板１の基板編集パターンを１ピツ
チ右から左へ金型に送り、第７図のパターン図の
如く○印部の基板と第２図の耳落し部６ｂ（２箇
所）に一致させ金型の配列パターン部l2＋l3によ
り第２回のプレス打抜きを行う。このとき第１回
打抜きで残つたＡ部分の33箇所の基板中の12箇所
とその右側のＢ部分中の○印部分の基板９箇所と
が打抜かれるが、この時点でＡ部の基板は全て分
割される。 Next, the board editing pattern of the printed wiring board 1 is sent one pitch from right to left to the mold, and as shown in the pattern diagram in Fig. 7, the board marked with a circle corresponds to the edge drop part 6b (2 places) in Fig. 2. A second press punching is performed using the array pattern portions l 2 +l 3 of the die. At this time, 12 of the 33 parts of the board in part A remaining from the first punching and 9 parts of the board marked with ○ in part B on the right side are punched out, but at this point, the board in part A is Everything will be divided.
次に印刷配線板１の基板編集パターンを１ピツ
チ分右から左へ金型に送り、第７図のパターンの
Ｃ部分中の△印の基板９箇所およびＢ部分中の基
板12箇所を金型のl2＋l3部分を用いて第２回のプ
レス抜きと同様の手順により第３回の打抜きを行
う。 Next, the board editing pattern of the printed wiring board 1 is sent to the mold by one pitch from right to left, and the 9 parts of the board marked with △ in the C part of the pattern in FIG. 7 and the 12 parts of the board in the B part of the pattern in FIG. A third punching process is performed using the l 2 +l 3 portion of the sample in the same manner as the second press punching process.
次にＤ部分およびＣ部分の残りを同様に第４回
のプレス打抜きを行う。さらにＥ部分およびＤ部
分の残りを第５回のプレス抜きで行う。従つて合
計５回で第５図に示す基板全てを分割することが
できる。なおこのとき最後のプレス抜きすなわち
第５回目の打抜きでは金型のl3部の右側に位置す
るl2（第４図参照）は空打ちとなるので打抜きは
行なわれていない。 Next, the rest of the D portion and the C portion are subjected to a fourth press punching in the same manner. Furthermore, the remaining portions of E and D are removed by a fifth press. Therefore, all the substrates shown in FIG. 5 can be divided in a total of five times. At this time, in the final press punching, that is, the fifth punching, the l2 (see FIG. 4) located on the right side of the l3 portion of the mold is blanked, so no punching is performed.
本発明の実施例では長方形状の分割基板で説明
したが、第８図〜第１０図に示す多角形を有する
基板での連接した分割基板も同様な手段でプレス
抜きできることは勿論である。 Although the embodiments of the present invention have been described using rectangular divided substrates, it goes without saying that connected divided substrates having polygonal shapes shown in FIGS. 8 to 10 can also be pressed out by the same means.
以上本発明によれば外形枠部分のスクラツプを
減少することができ、材料の有効活用が出来る。
かつプレス金型の加工誤差及び印刷配線板のパイ
ロツト送りピツチ誤差のプレス抜き時に外形コー
ナー部に抜き滓がヒゲ状になつて残ることも防止
出来る。 As described above, according to the present invention, it is possible to reduce the amount of scrap in the outer frame portion, and it is possible to effectively utilize materials.
Furthermore, it is possible to prevent scraps from remaining in the form of whiskers at the outer corner portions during press punching due to processing errors in the press mold and pilot feed pitch errors in the printed wiring board.
又、外形枠のコーナーに貫通孔を設けることに
より、プレス加工に要する剪断荷重が貫通孔を設
けた分だけ減少できるので、プレス装置の剪断力
が低くなり、その分だけランク下げした打抜き装
置が使用できる利点がある。 In addition, by providing through holes in the corners of the outer frame, the shearing load required for press processing can be reduced by the amount of the through holes, so the shearing force of the press device is lowered, and the punching device is lowered in rank by that amount. There are advantages to using it.
なお基板の製造工程には孔明工程があるので新
らたに貫通孔を設ける工程を特別に追加すること
なく、孔明工程を付加できる利点もある。 Note that since the manufacturing process of the substrate includes a drilling process, there is an advantage that the drilling process can be added without adding a special process of newly providing through holes.
第１図は従来の印刷配線板のパターン編集平面
図。第２図は従来のミシン目を設けたパターン編
集平面図。第３図は本発明に用いる印刷配線板の
パターン編集平面図。第４図は第３図の印刷配線
板を分割打抜き工程を示す金型の平面図。第５
図，第６図および第７図は本発明により順次分割
されていく状態を示す印刷配線板の打抜き工程平
面図。第８図，第９図および第１０図は本発明の
他の実施例で多角形を有する分割基板の連接した
印刷配線板の平面図。
図中の符号、１……印刷配線板、１ａ……板端
左側部、１ｂ……板端右側部、２……基板、３…
…外形枠コーナー部、４……貫通孔、５ａ……金
型パイロツトピン、５ｂ……印刷配線板パイロツ
ト孔、６ａ，６ｂ……耳落し部分。
FIG. 1 is a plan view of a conventional printed wiring board for pattern editing. Figure 2 is a plan view of conventional pattern editing with perforations. FIG. 3 is a pattern editing plan view of the printed wiring board used in the present invention. FIG. 4 is a plan view of a mold showing the process of dividing and punching out the printed wiring board of FIG. 3; Fifth
6 and 7 are plan views of the punching process of the printed wiring board showing the state in which it is successively divided according to the present invention. FIGS. 8, 9, and 10 are plan views of printed wiring boards in which polygonal divided substrates are connected in accordance with other embodiments of the present invention. Symbols in the figure: 1...Printed wiring board, 1a...Left side of board end, 1b...Right side of board end, 2...Substrate, 3...
...Outer frame corner portion, 4...Through hole, 5a...Mold pilot pin, 5b...Printed wiring board pilot hole, 6a, 6b...Ear drop portion.
Claims (1)
配線板を各配線基板ごとに分割する方法におい
て、前記各配線板の枠コーナー部に貫通孔を穿設
したのち、前記貫通孔同志を結んだ線上でプレス
抜きする際に、前記線をはさんで隣接しない独立
の配線基板を同時にプレス抜きする第１の工程
と、該第１の工程で残された連接する複数個の配
線基板を前記線上でプレス抜きして互いに分離す
る第２の工程とを有することを特徴とする印刷配
線板の製造方法。1. In a method of dividing a printed wiring board having a plurality of interconnected wiring boards into individual wiring boards, a through-hole is bored in the frame corner of each wiring board, and then the through-holes are connected. When press-cutting on a line, there is a first step of simultaneously press-cutting independent wiring boards that are not adjacent to each other across the line, and a plurality of interconnected wiring boards left in the first step are pressed on the line. A method for manufacturing a printed wiring board, comprising: a second step of press-cutting and separating from each other.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1384378A JPS54106875A (en) | 1978-02-08 | 1978-02-08 | Method of producing printed circuit board |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1384378A JPS54106875A (en) | 1978-02-08 | 1978-02-08 | Method of producing printed circuit board |
Publications (2)
| Publication Number | Publication Date |
|---|---|
| JPS54106875A JPS54106875A (en) | 1979-08-22 |
| JPS6316918B2 true JPS6316918B2 (en) | 1988-04-11 |
Family
ID=11844548
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1384378A Granted JPS54106875A (en) | 1978-02-08 | 1978-02-08 | Method of producing printed circuit board |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS54106875A (en) |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0457417U (en) * | 1990-09-26 | 1992-05-18 |
Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5040779A (en) * | 1973-08-03 | 1975-04-14 | ||
| JPS5064770A (en) * | 1973-10-11 | 1975-06-02 |
-
1978
- 1978-02-08 JP JP1384378A patent/JPS54106875A/en active Granted
Patent Citations (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPS5040779A (en) * | 1973-08-03 | 1975-04-14 | ||
| JPS5064770A (en) * | 1973-10-11 | 1975-06-02 |
Cited By (1)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| JPH0457417U (en) * | 1990-09-26 | 1992-05-18 |
Also Published As
| Publication number | Publication date |
|---|---|
| JPS54106875A (en) | 1979-08-22 |
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