JPS63168953U - - Google Patents
Info
- Publication number
- JPS63168953U JPS63168953U JP1987063202U JP6320287U JPS63168953U JP S63168953 U JPS63168953 U JP S63168953U JP 1987063202 U JP1987063202 U JP 1987063202U JP 6320287 U JP6320287 U JP 6320287U JP S63168953 U JPS63168953 U JP S63168953U
- Authority
- JP
- Japan
- Prior art keywords
- electrodes
- dielectric layer
- electrode
- dielectric
- layer covering
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 claims description 6
- 238000005192 partition Methods 0.000 claims description 3
- 239000011521 glass Substances 0.000 claims 2
- 230000004888 barrier function Effects 0.000 claims 1
- 238000007599 discharging Methods 0.000 claims 1
- 238000007789 sealing Methods 0.000 claims 1
- 239000003566 sealing material Substances 0.000 description 1
Landscapes
- Gas-Filled Discharge Tubes (AREA)
Description
第１図は本考案の一実施例を示す断面図、第２
図は従来のプラズマ表示板の一例を示す断面図で
ある。
１……前面基板、２……後面基板、３……Ｘ電
極、４……Ｙ電極、５……第１の誘電体層、６…
…第２の誘電体層、７……前面絶縁隔壁、８……
後面絶縁隔壁、９……封着材、１０……第４の誘
電体層。
Fig. 1 is a sectional view showing one embodiment of the present invention;
The figure is a sectional view showing an example of a conventional plasma display panel. DESCRIPTION OF SYMBOLS 1... Front substrate, 2... Rear substrate, 3... X electrode, 4... Y electrode, 5... First dielectric layer, 6...
...Second dielectric layer, 7...Front insulating partition, 8...
Rear insulating partition wall, 9... Sealing material, 10... Fourth dielectric layer.
Claims (1)
複数本のＸ電極と該Ｘ電極を被覆する第１の誘電
体層と、前記Ｘ電極に直角に前記Ｘ電極及び前記
第１の誘電体層の上に設けられた複数本の全面絶
縁隔壁とを有する全面基板と、ガラス基板上に互
いに平行に形成された複数本のＹ電極と該Ｙ電極
を被覆する第２の誘電体層と前記Ｙ電極に直角に
前記Ｙ電極及び前記第２の誘電体層の上に設けら
れた複数本の後面絶縁隔壁を有する後面基板とを
前記Ｘ電極と前記Ｙ電極が互いに直交するように
対向させ所定の放電ギヤツプを得るように封着し
内部に放電可能なガスを充填して成るプラズマ表
示板において、前記Ｘ電極と前記Ｙ電極のそれぞ
れの電極間の溝を埋るように、かつそれぞれ前記
第１の誘電体層及び前記第２の誘電体層の下に位
置するように設けられかつ前記第１及び第２の誘
電体層の誘電率よりも低い誘電率を有する第３及
び第４の誘電体層を設けたことを特徴とするプラ
ズマ表示板。 A plurality of X electrodes formed parallel to each other on a transparent glass substrate, a first dielectric layer covering the X electrodes, and a plurality of X electrodes and the first dielectric layer covering the X electrodes at right angles to the X electrodes. A full-face substrate having a plurality of full-surface insulating partition walls provided thereon, a plurality of Y electrodes formed in parallel to each other on a glass substrate, a second dielectric layer covering the Y electrodes, and the Y electrodes. The Y electrode and a rear substrate having a plurality of rear insulating barrier ribs provided on the second dielectric layer are opposed to each other so that the X electrode and the Y electrode are perpendicular to each other to generate a predetermined discharge. In a plasma display panel formed by sealing to obtain a gap and filling the inside with a gas capable of discharging, the first third and fourth dielectric layers located below the dielectric layer and the second dielectric layer and having a dielectric constant lower than that of the first and second dielectric layers; A plasma display board characterized by being provided with.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987063202U JPS63168953U (en) | 1987-04-24 | 1987-04-24 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP1987063202U JPS63168953U (en) | 1987-04-24 | 1987-04-24 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63168953U true JPS63168953U (en) | 1988-11-02 |
Family
ID=30898211
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP1987063202U Pending JPS63168953U (en) | 1987-04-24 | 1987-04-24 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63168953U (en) |
-
1987
- 1987-04-24 JP JP1987063202U patent/JPS63168953U/ja active Pending
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