JPS63168733A - Microprogram controller - Google Patents

Abstract

PURPOSE:To prevent the occurrence of memory destruction or system status destruction of the like due to runaway caused by access to an area not use by writing a pattern causing incorrect microinstruction into the area not in use in a control storage device storing the microprogram. CONSTITUTION:A pattern causing an incorrect microinstruction is written in the area not use as the microinstruction, and when it is read, the incorrectness of the microinstruction is detected by a microinstruction decode section 12 immediately, an interrupt signal is inputted through a signal line 25 by a sequential control section 14 and interrupt is given to the microprogram. Thus, the occurrence of destruction or rewrite of memory data is prevented and it is also possible to display the interrupt externally as a machine trouble or to execute a retrial routine.

Description

DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention relates to a microprogram control device, and more particularly to a microprogram control device having means for preventing a microprogram from running out of control due to illegal microinstructions or the like.

[Conventional technology]

In conventional microprogram control devices, even if an incorrect microroutine runs out of control due to a hardware failure or an invalid microinstruction in the microprogram, and executes an unused address in the control storage device, this will not occur. No means were in place to detect it early.

[Problem that the invention seeks to solve]

In the conventional microprogram control device described above, when a microroutine goes out of control due to a hardware failure or an incorrect microinstruction in the microprogram and executes an unused area of the control storage, the unused area is If the code is undefined, it may destroy memory data or rewrite important system tables, control words, etc. Furthermore, if a self-branch code is written to an unused address, there is a problem in that the system stalls, making recovery impossible and causing the system to go down.

[Means for solving problems]

The microprogram control device of the present invention includes a control storage device that stores microinstructions of a microprogram, and a microinstruction decoding section that decodes the microinstructions read from the control storage device and detects whether the microinstructions are invalid. , a data processing unit that processes data according to instructions from the microinstruction decoding unit; and a data processing unit that controls the execution of microinstructions according to instructions from the microinstruction decoding unit, and detects an invalidity of the microinstruction in the microinstruction decoding unit. and a sequential control section that receives an interrupt signal from the microinstruction decoding section and interrupts the microprogram when the microinstruction decoding section occurs.

[Example] Next, an example of the present invention will be described with reference to the drawings.

FIG. 1 is a block diagram showing one embodiment of the present invention.

In FIG. 1, one embodiment of the present invention stores a microinstruction of a microprogram, reads the microinstruction from an address designated by a signal line 21, and transfers it to a signal line 22.
A control storage device 11 that outputs a microinstruction to a signal line 22 inputs a microinstruction, decodes it, and outputs the decoding result to a signal line 23 and a signal line 24, and checks whether the inputted microinstruction is invalid. a micro-instruction decoding section 12 which has a function of detecting a micro-instruction and outputs it to a signal line 25 if it is invalid, and a data processing section which inputs the decoding result of the micro-instruction from a signal line 23 and processes the data according to this instruction. 13 and a signal line 24 to control the execution of the microinstruction.If the microinstruction decoder unit 12 detects that the microinstruction is invalid, the decoding result of the microinstruction is input to the signal line 25. It is comprised of a sequential control section 14 that receives an interrupt signal from the microprogram and interrupts the microprogram. The sequential control unit 14 specifies the address of the next microinstruction to be read out to the control storage device 11 via the signal line 21 .

FIG. 2 is a flowchart of a microprogram according to an embodiment of the present invention, and FIG. 3 is a memory map of a microprogram according to an embodiment of the present invention.

As shown in the flowchart in Figure 2, if the microprogram operates normally, it executes addition of operands 1 and 2, and if a carry occurs, a condition code (CC
) is set to "2'" and jumps to processing after address "0400", and if no carry is issued, condition code (c
c) is set to "1" and jumps to processing from address "0300" onward.

The microinstructions of this microprogram are stored in the control storage device 11 as shown in the memory map of FIG. These microinstructions are sequentially read out and decoded by the microinstruction decoding section 12, and the results are sent to the data processing section 13 and the sequential control section 14 for processing.

The control storage device 11 has an unused area other than the area for storing the microprogram as shown in a of FIG.

They exist like b, c,... If the microprogram sequence is moved to these unused areas due to a hardware failure or incorrect microinstruction (programming error, etc.), these unused areas will be interpreted as normal microinstructions and executed. ,If these microinstructions are undefined, memory data corruption,
Rewriting, etc. may occur.

In the present invention, a pattern that becomes an invalid microinstruction is written as a microinstruction in these unused areas, and when this is read out, the microinstruction decoding section 12 immediately detects that the microinstruction is invalid, and the signal line 25 sequentially detects the invalidity of the microinstruction. An interrupt signal is input to the control unit 14, and the microprogram is interrupted.

This prevents the destruction or rewriting of memory data as described above, and also makes it possible to externally display a machine trouble or to execute a retry routine.

〔Effect of the invention〕

As explained above, the present invention prevents the unused area from being accessed by the machine 1 or the like by writing a pattern that causes an incorrect microinstruction into an unused area in a control storage device that stores a microprogram. This has the effect of preventing memory corruption, system status corruption, etc. due to micro-instructions and illegal interrupts caused by runaway programs, and also making it possible to display a mine trouble to the outside or perform instruction transfer try processing.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of the present invention, FIG. 2 is a flowchart of a microprogram according to an embodiment of the present invention, and FIG. 3 is an explanatory diagram showing a memory map of a microprogram according to an embodiment of the present invention. It is. DESCRIPTION OF SYMBOLS 11... Control storage device, 12... Microinstruction decoding section, 13... Data processing section, 14... Sequential control section, 21-25... Signal line.

Claims (1)

[Claims] A control storage device that stores microinstructions of a microprogram, a microinstruction decoding unit that decodes the microinstructions read from the control storage device and detects whether the microinstructions are invalid, and instructions from the microinstruction decoding unit. a data processing unit that processes data, and a data processing unit that controls the execution of microinstructions based on instructions from the microinstruction decoding unit; A microprogram control device comprising a sequential control unit that receives an interrupt signal and interrupts the microprogram, and is characterized in that a pattern that causes an incorrect microinstruction is written in an unused area of a control storage device. .