JPS63159979A - ベクトル演算における共通演算削除処理方式 - Google Patents

ベクトル演算における共通演算削除処理方式

Info

Publication number
JPS63159979A
JPS63159979A JP30949086A JP30949086A JPS63159979A JP S63159979 A JPS63159979 A JP S63159979A JP 30949086 A JP30949086 A JP 30949086A JP 30949086 A JP30949086 A JP 30949086A JP S63159979 A JPS63159979 A JP S63159979A
Authority
JP
Japan
Prior art keywords
common
intermediate code
common operation
vector
processing
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Granted
Application number
JP30949086A
Other languages
English (en)
Japanese (ja)
Other versions
JPH0440744B2 (enExample
Inventor
Koichiro Hotta
耕一郎 堀田
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Fujitsu Ltd
Original Assignee
Fujitsu Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Fujitsu Ltd filed Critical Fujitsu Ltd
Priority to JP30949086A priority Critical patent/JPS63159979A/ja
Publication of JPS63159979A publication Critical patent/JPS63159979A/ja
Publication of JPH0440744B2 publication Critical patent/JPH0440744B2/ja
Granted legal-status Critical Current

Links

Classifications

    • G—PHYSICS
    • G06—COMPUTING OR CALCULATING; COUNTING
    • G06F—ELECTRIC DIGITAL DATA PROCESSING
    • G06F15/00—Digital computers in general; Data processing equipment in general
    • G06F15/76—Architectures of general purpose stored program computers
    • G06F15/80—Architectures of general purpose stored program computers comprising an array of processing units with common control, e.g. single instruction multiple data processors
    • G06F15/8053—Vector processors

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Theoretical Computer Science (AREA)
  • Computing Systems (AREA)
  • Physics & Mathematics (AREA)
  • General Engineering & Computer Science (AREA)
  • General Physics & Mathematics (AREA)
  • Complex Calculations (AREA)
  • Devices For Executing Special Programs (AREA)
JP30949086A 1986-12-24 1986-12-24 ベクトル演算における共通演算削除処理方式 Granted JPS63159979A (ja)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30949086A JPS63159979A (ja) 1986-12-24 1986-12-24 ベクトル演算における共通演算削除処理方式

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30949086A JPS63159979A (ja) 1986-12-24 1986-12-24 ベクトル演算における共通演算削除処理方式

Publications (2)

Publication Number Publication Date
JPS63159979A true JPS63159979A (ja) 1988-07-02
JPH0440744B2 JPH0440744B2 (enExample) 1992-07-06

Family

ID=17993616

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30949086A Granted JPS63159979A (ja) 1986-12-24 1986-12-24 ベクトル演算における共通演算削除処理方式

Country Status (1)

Country Link
JP (1) JPS63159979A (enExample)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0448382A (ja) * 1990-06-18 1992-02-18 Nec Corp コンパイラのベクトル化処理方式

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0448382A (ja) * 1990-06-18 1992-02-18 Nec Corp コンパイラのベクトル化処理方式

Also Published As

Publication number Publication date
JPH0440744B2 (enExample) 1992-07-06

Similar Documents

Publication Publication Date Title
US6113650A (en) Compiler for optimization in generating instruction sequence and compiling method
US6654952B1 (en) Region based optimizations using data dependence graphs
US5598561A (en) Optimizing compiler which generates multiple instruction streams to be executed in parallel
KR100638501B1 (ko) 다중 명령 컴퓨터 프로그램을 구성하는 방법
JPH05143332A (ja) 命令スケジユーラを備えたコンピユータ・システム及び入力命令シーケンスを再スケジユールする方法
JPS6312029A (ja) 情報処理装置
US5404555A (en) Macro instruction set computer architecture
US5390306A (en) Pipeline processing system and microprocessor using the system
JPS63159979A (ja) ベクトル演算における共通演算削除処理方式
JPH01199233A (ja) パイプライン処理における条件分岐制御方式
JPS59165147A (ja) コンパイラにおける条件文のベクトル命令化方式
JPH0379741B2 (enExample)
JP3817073B2 (ja) メモリアクセス処理装置、メモリアクセス処理システム、および記録媒体
JPS63155264A (ja) ベクトル計算機用言語チユ−ニング処理方式
JPH0235349B2 (ja) Ruupunaihairetsushoribekutorukashorihoshiki
JPH06103462B2 (ja) ベクトル・レングス制御範囲分割処理方式
JPH04268928A (ja) エミュレーション装置及び半導体装置
JPH03110670A (ja) ベクトル計算機
JPH0644270B2 (ja) ベクトルプロセッサの制御処理方式
Komuro et al. Development of a bit-level compiler for massively parallel vision chips
JPH0241562A (ja) ベクトル演算列分割処理方式
JP2018049461A (ja) コンパイル装置、コンパイル方法、および、コンパイルプログラム
JPH01180045A (ja) 中央処理装置
JPH03257579A (ja) コンパイラの並列化方式
JPH0440743B2 (enExample)

Legal Events

Date Code Title Description
LAPS Cancellation because of no payment of annual fees