JPS63158832A - Semiconductor substrate - Google Patents
Semiconductor substrateInfo
- Publication number
- JPS63158832A JPS63158832A JP30696586A JP30696586A JPS63158832A JP S63158832 A JPS63158832 A JP S63158832A JP 30696586 A JP30696586 A JP 30696586A JP 30696586 A JP30696586 A JP 30696586A JP S63158832 A JPS63158832 A JP S63158832A
- Authority
- JP
- Japan
- Prior art keywords
- substrate
- layer
- gaas
- temperature
- layers
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000758 substrate Substances 0.000 title claims abstract description 39
- 239000004065 semiconductor Substances 0.000 title claims description 15
- 229910001218 Gallium arsenide Inorganic materials 0.000 claims abstract description 24
- 238000000034 method Methods 0.000 description 15
- 238000001451 molecular beam epitaxy Methods 0.000 description 3
- 239000013078 crystal Substances 0.000 description 2
- 238000005516 engineering process Methods 0.000 description 2
- 238000004519 manufacturing process Methods 0.000 description 2
- 238000002488 metal-organic chemical vapour deposition Methods 0.000 description 2
- 241000948258 Gila Species 0.000 description 1
- 239000002131 composite material Substances 0.000 description 1
- 238000007796 conventional method Methods 0.000 description 1
- 238000000151 deposition Methods 0.000 description 1
- 238000010586 diagram Methods 0.000 description 1
- 239000012535 impurity Substances 0.000 description 1
- 230000010354 integration Effects 0.000 description 1
- 239000000126 substance Substances 0.000 description 1
Abstract
Description
【発明の詳細な説明】
産業上の利用分野
本発明はSi基板上にGa人S系半導体層を形成した半
導体基体に関するものである。DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor substrate in which a Ga-S semiconductor layer is formed on a Si substrate.
従来の技術
81半導体とGILAi9系の半導体を一体化すること
は、GaAs系半導体が高電子移動度、発光機能を有し
、一方81半導体は大口径高品質結晶が得られ、かつデ
バイス製作技術が確立しているので、Si基板上に高集
積デバイスを、GaAs系半導体に高速デバイス、発光
デバイス等を集積する複合デバイスとして有望である。The integration of conventional technology 81 semiconductor and GILAi9 semiconductor allows GaAs-based semiconductor to have high electron mobility and light emitting function, while 81 semiconductor can obtain large-diameter, high-quality crystal, and device manufacturing technology is improved. Since it has been established, it is promising as a composite device that integrates highly integrated devices on a Si substrate and high-speed devices, light-emitting devices, etc. on a GaAs-based semiconductor.
Si基板上へのGILASの成長法としては、Si基板
上にM B E (Mo1ecular Beam K
pitaxy )法或はM OCV D (’Meta
l Organic ChemicalVapor D
eposition )法を用いてGaAsを堆積し
ている。81基板上にGaAg層を形成する方法として
は、Si基板を860′Cで熱処理して表面を清浄化し
た後、基板温度を150’C位に下げ1oo人のG!L
ASバッファ層を形成し、しかる後基板温度を8 Q
O’Qに上昇してGaAs層を成長する方法が用いられ
ている(S−ニジ他、モレキュラービームエピタキシー
により5i(100)上への単−GaAa領域の成長(
S、N15hi at al。As a method for growing GILAS on a Si substrate, MBE (Molecular Beam K
pitaxy) method or M OCV D ('Meta
l Organic Chemical Vapor D
GaAs is deposited using a deposition method. The method for forming a GaAg layer on an 81 substrate is to heat-treat the Si substrate at 860'C to clean the surface, then lower the substrate temperature to about 150'C, and then apply a GaAg layer on the 1000G layer. L
Form the AS buffer layer and then increase the substrate temperature to 8Q.
A method of growing a GaAs layer by increasing the O'Q has been used (S-Niji et al., growth of mono-GaAa region on 5i (100) by molecular beam epitaxy).
S, N15hi at al.
Growth of Single Domai
n GaAs on 5i(1oo)b7 Mo
1ecular Beam ICpitaxy) 第
17口面体及び材料会議(17th Conferen
ce 5olid 5tateand Materia
l ) p 、 p 213 )。この方法は低温で形
成したG2LA!をバッフ1層としてGaAl9とSi
の格子常数の差による歪を緩和して良質のG1LムSを
成長している。又他の方法としては81基板上にG6を
堆積し、Ga上にGaAsを成長する方法を用いられて
いる。いずれの方法も3i基板上に直接GaAs層を形
成する方法に比して良好なGaAs層を成長せしめるこ
とが出来るが、GaAs基板上に形成したGaAsエピ
タキシャル層に比して、20〜30%結晶性が劣ってい
る。Growth of Single Domai
n GaAs on 5i(1oo)b7 Mo
1ecular Beam ICpitaxy) 17th Conference
ce 5olid 5tateand Materia
l) p, p 213). This method uses G2LA formed at low temperature! GaAl9 and Si as a buffer layer
By alleviating the distortion caused by the difference in lattice constants, high-quality G1L MUs are grown. Another method used is to deposit G6 on an 81 substrate and grow GaAs on Ga. Both methods can grow a better GaAs layer than the method of directly forming a GaAs layer on a 3i substrate, but the crystallinity is 20 to 30% higher than that of a GaAs epitaxial layer formed on a GaAs substrate. inferior in gender.
発明が解決しようとする問題点
従来例ではSi基板上に形成したGaAs層の結晶性が
GaAs基板上に形成したGaAsエピタキシャル層に
比して劣るという問題がある。Problems to be Solved by the Invention In the conventional example, there is a problem in that the crystallinity of a GaAs layer formed on a Si substrate is inferior to that of a GaAs epitaxial layer formed on a GaAs substrate.
本発明はS1基板上に良質のGILA!!半導体層を形
成する半導体基体を提供することにある。The present invention provides high-quality GILA on the S1 substrate! ! An object of the present invention is to provide a semiconductor substrate on which a semiconductor layer is formed.
問題点を解決するための手段
本発明は5i基板上にGexSi 、−8−x−Siの
歪超格子構造層を設け、その上にGaAs層をエピタキ
シャル成長して、結晶性の良好なGILAjI層を得る
ものである。Means for Solving the Problems The present invention provides a strained superlattice structure layer of GexSi, -8-x-Si on a 5i substrate, and epitaxially grows a GaAs layer thereon to form a GILAjI layer with good crystallinity. It's something you get.
作用
Si基板上にGexS工、−8−x−Siの歪超格子構
造層を設けることにより、Si基板とG&人S層の格子
常数の差を緩和することにより良質のエピタキシャル層
が形成出来る。又大口径のSi基板を用いてGaAs層
を形成しても、従来に比して歪超格子構造層を設けるこ
とで熱膨張係数の差によるそりを減少することが出来る
。By providing a strained superlattice structure layer of GexS and -8-x-Si on a working Si substrate, a high quality epitaxial layer can be formed by alleviating the difference in lattice constant between the Si substrate and the G&S layer. Furthermore, even if a GaAs layer is formed using a large-diameter Si substrate, warping due to the difference in thermal expansion coefficients can be reduced by providing a strained superlattice structure layer compared to the conventional method.
実施例
以下本発明の一実施例を詳細に説明する。第1図は本発
明の一実施例の半導体基体の製造工程を示すものである
。Si基板1をMBX装置に装填し、基板温度を870
°Cに保って基板表面を清浄化する(第1図)。Si基
板温度をe o o ’Cに保って、300人のSi層
2.60への”0.6”0.4層3を20周期成長させ
る。これが歪超格子層4となる(第2図)。次GaAs
層6を基板温度600°Cで062μm成長する。なお
不純物としてSiを用い、キャリア濃度は1o cM
とした(第3図)。EXAMPLE An example of the present invention will be described in detail below. FIG. 1 shows the manufacturing process of a semiconductor substrate according to an embodiment of the present invention. Load the Si substrate 1 into the MBX device and set the substrate temperature to 870°C.
The substrate surface is cleaned by keeping it at °C (Fig. 1). While keeping the Si substrate temperature at e o o 'C, 300 layers of "0.6" and "0.4" layers 3 to 2.60 are grown for 20 cycles. This becomes the strained superlattice layer 4 (FIG. 2). NextGaAs
Layer 6 is grown to a thickness of 062 μm at a substrate temperature of 600°C. Note that Si is used as an impurity, and the carrier concentration is 1ocM.
(Figure 3).
本発明を従来の低温成長でSiバッファ層を用いる方法
(従来例ム)、Ge層をSi基板と(、aAs層間に介
在させる方法、(従来例B)と比較したものが次表であ
る。The following table compares the present invention with a conventional low-temperature growth method using a Si buffer layer (Conventional Example M), a method in which a Ge layer is interposed between a Si substrate (and an aAs layer), and (Conventional Example B).
半値巾はX線2結晶法で求めたもので、半値巾が小さい
ほど結晶性が良いことを示している。そりは2インチの
Si基板を用いたときのそりの量を示している。上記の
表から明らかな様に本発明の方法によ!1lSi基板に
結晶性の良好なGaAsを成長させることが出来る。The half-width was determined by the X-ray two-crystal method, and the smaller the half-width, the better the crystallinity. Warpage indicates the amount of warpage when a 2-inch Si substrate is used. As is clear from the table above, the method of the present invention! GaAs with good crystallinity can be grown on a 1lSi substrate.
実施例ではGaAs半導体層5を形成したが、kl、−
xGaxAs、In、 −xGaxAs 等或はこれら
の多層構造を形成しても良い。In the example, the GaAs semiconductor layer 5 was formed, but kl, -
xGaxAs, In, -xGaxAs, etc. or a multilayer structure of these may be formed.
GoxSi、 、としてx=o、eを用いたが! =
0.3〜0.8なら良好な結晶性のGaAs層が得られ
た。We used x=o, e as GoxSi, ! =
If it was 0.3 to 0.8, a GaAs layer with good crystallinity was obtained.
GoxSi、 、−Si、GaAs層の成長法にMBE
法を用いたがMOCVD法を用いても良いことは勿論で
ある。MBE is used to grow GoxSi, -Si, and GaAs layers.
Although the MOCVD method was used, it goes without saying that the MOCVD method may also be used.
発明の詳細
な説明した様に本発明はSi基板上に
GexSi4.−x−Siの歪超格子構造を形成し、そ
の上にGaAg層を形成することで、結晶性の良好G&
人S層が得られ、その工業的価値は大きい。DETAILED DESCRIPTION OF THE INVENTION As described above, the present invention provides GexSi4. -By forming a strained superlattice structure of -x-Si and forming a GaAg layer on top of it, good crystallinity of G&
The S class of people can be obtained, and its industrial value is great.
第1図〜第3図は本発明の一実施例の半導体基体を説明
するための工程図である。
1・・・・・・81基板、2・・・・・・Si層、3・
・・・・・Goo、6”0.4層、4 ・−・Geo6
Sio、−si歪超格子層、6・・・・・・G2LAS
層。1 to 3 are process diagrams for explaining a semiconductor substrate according to an embodiment of the present invention. 1...81 substrate, 2...Si layer, 3...
...Goo, 6" 0.4 layer, 4 ...Geo6
Sio, -si strained superlattice layer, 6...G2LAS
layer.
Claims (1)
構造層を設け、上記Ge_xSi_1_−_x−Si歪
超格子構造層上にGaAs系の半導体層を形成してなる
半導体基体。A semiconductor substrate formed by providing a Ge_xSi_1_-_x-Si strained superlattice structure layer on a Si substrate, and forming a GaAs-based semiconductor layer on the Ge_xSi_1_-_x-Si strained superlattice structure layer.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30696586A JPS63158832A (en) | 1986-12-23 | 1986-12-23 | Semiconductor substrate |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP30696586A JPS63158832A (en) | 1986-12-23 | 1986-12-23 | Semiconductor substrate |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS63158832A true JPS63158832A (en) | 1988-07-01 |
Family
ID=17963398
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP30696586A Pending JPS63158832A (en) | 1986-12-23 | 1986-12-23 | Semiconductor substrate |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS63158832A (en) |
Cited By (7)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05335238A (en) * | 1992-06-03 | 1993-12-17 | Daido Hoxan Inc | Manufacture of semiconductor device |
JPH05335237A (en) * | 1992-06-03 | 1993-12-17 | Daido Hoxan Inc | Manufacture of semiconductor device |
JPH05335236A (en) * | 1992-06-03 | 1993-12-17 | Daido Hoxan Inc | Manufacture of semiconductor device |
WO2010061619A1 (en) * | 2008-11-28 | 2010-06-03 | 住友化学株式会社 | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
WO2010061615A1 (en) * | 2008-11-28 | 2010-06-03 | 住友化学株式会社 | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
JP2010239130A (en) * | 2009-03-11 | 2010-10-21 | Sumitomo Chemical Co Ltd | Semiconductor substrate, method for manufacturing semiconductor substrate, electronic device, and method for manufacturing electronic device |
JP2019009248A (en) * | 2017-06-23 | 2019-01-17 | 日本電信電話株式会社 | Semiconductor laminate structure |
Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61105831A (en) * | 1984-10-30 | 1986-05-23 | Matsushita Electric Ind Co Ltd | Si substrate with iii-v compound monocrystalline thin film and fabrication thereof |
JPS61106495A (en) * | 1984-10-29 | 1986-05-24 | Matsushita Electric Ind Co Ltd | Si substrate grovided with single crystalline thin film of group iii-v compound and production thereof |
-
1986
- 1986-12-23 JP JP30696586A patent/JPS63158832A/en active Pending
Patent Citations (2)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS61106495A (en) * | 1984-10-29 | 1986-05-24 | Matsushita Electric Ind Co Ltd | Si substrate grovided with single crystalline thin film of group iii-v compound and production thereof |
JPS61105831A (en) * | 1984-10-30 | 1986-05-23 | Matsushita Electric Ind Co Ltd | Si substrate with iii-v compound monocrystalline thin film and fabrication thereof |
Cited By (14)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPH05335238A (en) * | 1992-06-03 | 1993-12-17 | Daido Hoxan Inc | Manufacture of semiconductor device |
JPH05335237A (en) * | 1992-06-03 | 1993-12-17 | Daido Hoxan Inc | Manufacture of semiconductor device |
JPH05335236A (en) * | 1992-06-03 | 1993-12-17 | Daido Hoxan Inc | Manufacture of semiconductor device |
JP2010153847A (en) * | 2008-11-28 | 2010-07-08 | Sumitomo Chemical Co Ltd | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
WO2010061615A1 (en) * | 2008-11-28 | 2010-06-03 | 住友化学株式会社 | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
JP2010153845A (en) * | 2008-11-28 | 2010-07-08 | Sumitomo Chemical Co Ltd | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
WO2010061619A1 (en) * | 2008-11-28 | 2010-06-03 | 住友化学株式会社 | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
US20110227042A1 (en) * | 2008-11-28 | 2011-09-22 | Sumitomo Chemical Company, Limited | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
CN102210010A (en) * | 2008-11-28 | 2011-10-05 | 住友化学株式会社 | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
CN102227802A (en) * | 2008-11-28 | 2011-10-26 | 住友化学株式会社 | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
US8709904B2 (en) | 2008-11-28 | 2014-04-29 | Sumitomo Chemical Company, Limited | Method for producing semiconductor substrate, semiconductor substrate, method for manufacturing electronic device, and reaction apparatus |
JP2010239130A (en) * | 2009-03-11 | 2010-10-21 | Sumitomo Chemical Co Ltd | Semiconductor substrate, method for manufacturing semiconductor substrate, electronic device, and method for manufacturing electronic device |
US8823141B2 (en) | 2009-03-11 | 2014-09-02 | Sumitomo Chemical Company, Limited | Semiconductor wafer, method of producing semiconductor wafer, electronic device, and method of producing electronic device |
JP2019009248A (en) * | 2017-06-23 | 2019-01-17 | 日本電信電話株式会社 | Semiconductor laminate structure |
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