JPH05335238A - Manufacture of semiconductor device - Google Patents

Manufacture of semiconductor device

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Publication number
JPH05335238A
JPH05335238A JP14231392A JP14231392A JPH05335238A JP H05335238 A JPH05335238 A JP H05335238A JP 14231392 A JP14231392 A JP 14231392A JP 14231392 A JP14231392 A JP 14231392A JP H05335238 A JPH05335238 A JP H05335238A
Authority
JP
Japan
Prior art keywords
substrate
thin film
film
sige
molecular beam
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP14231392A
Other languages
Japanese (ja)
Inventor
Yasuhiro Shiraki
靖寛 白木
Susumu Fukatsu
晋 深津
Kenji Okumura
健治 奥村
Toshiji Onishi
利治 大西
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Daido Hoxan Inc
Original Assignee
Daido Hoxan Inc
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Daido Hoxan Inc filed Critical Daido Hoxan Inc
Priority to JP14231392A priority Critical patent/JPH05335238A/en
Publication of JPH05335238A publication Critical patent/JPH05335238A/en
Pending legal-status Critical Current

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  • Crystals, And After-Treatments Of Crystals (AREA)
  • Physical Deposition Of Substances That Are Components Of Semiconductor Devices (AREA)
  • Led Devices (AREA)

Abstract

PURPOSE:To manufacture a semiconductor crystalline thin film having excellent light emission characteristics and high quality by setting a temperature of a substrate to a range of a special value when the film having an Si-SiGe heterojunction structure is grown on the substrate and introducing hydrogen into a growing atmosphere. CONSTITUTION:In order to grow a semiconductor crystalline thin film having an Si-SiGe heterojunction structure on an Si substrate A, a pressure of a vacuum chamber X is set to an extra-high vacuum of 10<-11>Torr. Then, the substrate A is heated to 600-900 deg.C by a heater contained in a substrate holder 2. In this state, an Si molecular beam is projected from molecular beam cells 4, 6 toward the substrate A for 60 sec while hydrogen decomposed in atomic state is being projected from an end 7a of a cell 7 toward the substrate A. Then, after it is stopped for 5 sec, it is further projected for 10 sec. In this case, a molecular beam of Ge is projected from molecular beam cells 5-7 for 10sec simultaneously upon projection of the Si molecular beam for 10sec.

Description

【発明の詳細な説明】Detailed Description of the Invention

【0001】[0001]

【産業上の利用分野】この発明は、個体ソース分子線エ
ピタキシャル成長法(以下「個体ソースMBE法」とい
う)の改善を図り、基板表面に、強い発光能力を有する
Si−SiGeヘテロ接合構造の結晶薄膜(シリコン単
結晶薄膜とシリコンゲルマニム混晶薄膜とを積層した構
造、以下同じ)を成長させ、光電子デバイス等ともなし
うる半導体デバイス(半導体装置)を製造する方法に関
するものである。
BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention aims to improve the solid-source molecular beam epitaxial growth method (hereinafter referred to as "solid-source MBE method"), and has a crystalline thin film of Si-SiGe heterojunction structure having a strong light emitting ability on the substrate surface. The present invention relates to a method for manufacturing a semiconductor device (semiconductor device) that can be used as an optoelectronic device or the like by growing (a structure in which a silicon single crystal thin film and a silicon germanium mixed crystal thin film are laminated, the same applies hereinafter).

【0002】[0002]

【従来の技術】近年、素子の高性能化の要求により、信
頼性、高集積化の容易さ等、半導体材料として優れた特
性を有し、これまで長期に渡って蓄積してきた技術を活
かせるSi系半導体において、新たな構造のデバイスを
作製するという試みがなされている。そのひとつが、S
i−SiGe系ヘテロデバイスであり、SiGeヘテロ
バイポーラトランジスタ等の高速電子デバイスやSi−
SiGeの歪超格子を利用した新機能デバイスがあげら
れる。さらには、シリコン系半導体の発光特性を利用し
たOEIC(光電子IC)への利用も考えられている。
そのためには、半導体結晶薄膜について、より高度な性
能が求められ、それらの要求を満足できるような結晶成
長技術の確立が望まれている。
2. Description of the Related Art In recent years, due to the demand for higher performance of elements, it has excellent characteristics as a semiconductor material such as reliability and ease of high integration, and can utilize the technology accumulated over a long period of time. Attempts have been made to manufacture a device having a new structure in a Si-based semiconductor. One of them is S
i-SiGe-based hetero devices, such as high-speed electronic devices such as SiGe hetero bipolar transistors and Si-
There is a new functional device that uses a strained superlattice of SiGe. Furthermore, use in OEICs (photoelectronic ICs) utilizing the light emission characteristics of silicon-based semiconductors is also considered.
For that purpose, a semiconductor crystal thin film is required to have higher performance, and it is desired to establish a crystal growth technique capable of satisfying those requirements.

【0003】その候補としては、個体ソースMBE法、
ガスソースMBE法、CVD法等がある。このうち、最
も高品質なSi−SiGeヘテロ接合構造を形成するも
のは個体ソースMBE法であると考えられてきた。
[0003] As a candidate, an individual source MBE method,
There are a gas source MBE method, a CVD method and the like. Of these, the one that forms the highest quality Si-SiGe heterojunction structure has been considered to be the solid source MBE method.

【0004】[0004]

【発明が解決しようとする課題】しかしながら、上記従
来の個体ソースMBE法で作製した最良の結晶薄膜にお
いても、光関連デバイスに利用できるような強い発光は
観測されていない。通常、固体ソースMBE法でこのよ
うなSi−SiGeヘテロ接合構造の結晶薄膜を作製す
る場合、基板を装置の真空室に入れ、その中で、Siと
Geとを分子線状態(ビーム)で基板に投射し、結晶薄
膜を成長させることが行われる。この場合、結晶薄膜の
成長は、300〜500℃と低い温度域で行なわれてい
る。これはつぎのような理由による。すなわち、Siと
Geの結晶の格子定数は相互に4%も異なっているた
め、Si膜の上にGeないしはSiGe(または逆の場
合でも)膜を成長させようとした場合には転位と呼ばれ
る結晶欠陥が発生し、得られるヘテロ接合構造の結晶薄
膜の特性が著しく低下してしまう。このような不都合な
現象は、高温になればなるほど大きくなる。したがっ
て、結晶薄膜の成長は上記のように低温度域で行われて
いる。また高温で行うと、表面モホロジー(表面の平坦
性)も悪くなる傾向があるうえ、Geの表面偏析(Ge
膜の上にSi膜を成長させる際、Si膜と/Ge膜との
界面においてGeがSi膜に入り込み、界面の急峻性
《急峻性とは、膜の積層時に新規生成膜に前回使用時の
ガスの混入が少なく、新旧両膜がその接合界面において
成分が厳密に異なるようになることをいう》を低下させ
る等)の問題が生じ、これらを回避することも、結晶薄
膜の成長を上記のような低温域で行う大きな理由となっ
ている。
However, even in the best crystalline thin film prepared by the above-mentioned conventional solid source MBE method, strong light emission that can be used for optical devices is not observed. Usually, when a crystalline thin film having such a Si-SiGe heterojunction structure is produced by the solid source MBE method, the substrate is placed in a vacuum chamber of an apparatus, and Si and Ge are placed in a molecular beam state (beam) in the substrate. And crystal thin film is grown. In this case, the crystal thin film is grown in a low temperature range of 300 to 500 ° C. This is for the following reasons. That is, since the crystal lattice constants of Si and Ge are different from each other by 4%, when a Ge or SiGe (or vice versa) film is grown on the Si film, a crystal called dislocation is formed. Defects occur, and the properties of the obtained crystal thin film having a heterojunction structure are significantly deteriorated. Such an inconvenient phenomenon increases as the temperature becomes higher. Therefore, the crystal thin film is grown in the low temperature range as described above. Further, when performed at a high temperature, the surface morphology (surface flatness) tends to deteriorate, and the surface segregation of Ge (Ge
When the Si film is grown on the film, Ge enters the Si film at the interface between the Si film and the / Ge film, and the steepness << steepness of the interface means that when a film is laminated, the newly formed film is The problem is that the mixture of gas is small and the components of the old and new films become strictly different at the bonding interface.), And these can be avoided to prevent the growth of the crystal thin film from the above. This is a major reason for doing it in such a low temperature range.

【0005】このように、従来から、Si−SiGe系
のヘテロ接合構造の結晶薄膜を形成する場合には、低温
成長が必須条件であると考えられ、これが技術常識とな
っていた。このような考えに基づいて作製された、高品
質と思われたSiGe/Si量子井戸構造《Si基板の
上にSiの薄膜を形成し、その上に薄いSiGeの膜を
形成、さらにその上にSi薄膜を形成し、上下のSi薄
膜でSiGe膜をサンドイッチにした構造のもの》の膜
(ヘテロ接合構造の結晶薄膜)でさえも、光電子デバイ
スとしての利用が考えられるような強い発光現象は認め
られなかった。
As described above, conventionally, it has been considered that low-temperature growth is an essential condition for forming a crystal thin film having a heterojunction structure of Si-SiGe system, and this has been common technical knowledge. A high quality SiGe / Si quantum well structure produced based on this idea << Si thin film is formed on Si substrate, thin SiGe film is formed on it, and further Even in the case of a film having a structure in which a Si thin film is formed and a SiGe film is sandwiched between upper and lower Si thin films (heterojunction structure crystalline thin film), a strong light emission phenomenon that can be considered to be used as an optoelectronic device is recognized. I couldn't do it.

【0006】またガスソースMBE法やその他のCVD
法においても、同様に、強い発光現象を示すような結晶
薄膜は作製されていない。しかしながら、強い発光を生
じるSi−SiGeヘテロ接合構造の半導体結晶薄膜を
作製することができれば、それを備えた半導体デバイス
は、半導体デバイスとしての基本的な性能の他、光素子
等としての性能も備えるようになり、光通信等の領域に
おいて、重要な役割を果たすようになる。
Further, gas source MBE method and other CVD
Also in the method, similarly, a crystal thin film that exhibits a strong light emission phenomenon has not been produced. However, if a semiconductor crystal thin film having a Si—SiGe heterojunction structure that produces strong light emission can be manufactured, a semiconductor device including the semiconductor thin film has not only basic performance as a semiconductor device but also performance as an optical element or the like. As a result, it will play an important role in areas such as optical communication.

【0007】この発明は、このような事情に鑑みなされ
たもので、従来にない強い発光を示す高品質なSi−S
iGeヘテロ接合構造の半導体結晶薄膜を成長させ、光
電子デバイス等に用いられる性能も併有する半導体デバ
イスを製造する方法の提供をその目的とする。
The present invention has been made in view of such circumstances, and is a high-quality Si-S showing strong light emission which has never been obtained.
It is an object of the present invention to provide a method for growing a semiconductor crystal thin film having an iGe heterojunction structure and manufacturing a semiconductor device having the performance used for an optoelectronic device or the like.

【0008】[0008]

【課題を解決するための手段】上記の目的を達成するた
め、この発明の半導体デバイスの製法は、個体ソースM
BE法を利用して、基板上にSi−SiGeヘテロ接合
構造の半導体結晶薄膜を成長させ、半導体デバイスを製
造する方法であって、上記半導体結晶薄膜の成長の際
に、上記基板の温度を600〜900℃に設定するとと
もに、成長雰囲気中に水素を導入するという構成をと
る。
In order to achieve the above object, the method of manufacturing a semiconductor device of the present invention is a solid source M
A method of manufacturing a semiconductor device by growing a semiconductor crystal thin film having a Si-SiGe heterojunction structure on a substrate by using the BE method, wherein the temperature of the substrate is 600 when the semiconductor crystal thin film is grown. The temperature is set to ˜900 ° C. and hydrogen is introduced into the growth atmosphere.

【0009】[0009]

【作用】この発明者らは、上記Si−SiGeヘテロ接
合構造の半導体結晶薄膜が光関連デバイスに利用できる
ような強い発光を生じないのは、上記半導体結晶薄膜の
結晶性が不十分ではないかと着想し一連の研究を重ね
た。この研究の過程で、この発明者らの上記着想が正し
いことが裏付けられ、さらに上記着想を実現するために
研究を重ねた結果、個体ソースMBE法を用い、600
℃〜900℃という従来では考えられない高温領域にお
いてSi−SiGeヘテロ接合構造の半導体結晶薄膜
(Si−SiGe/Si量子井戸構造の膜)を作製する
と、今までにない強い発光(化合物半導体の発光に匹敵
するような強い発光)が得られることを見いだし、この
発明に到達した。
The inventors believe that the crystallinity of the semiconductor crystal thin film is insufficient in that the semiconductor crystal thin film having the Si-SiGe heterojunction structure does not generate strong light emission that can be used for optical devices. Inspired and repeated a series of studies. In the course of this research, the above-mentioned idea of the inventors was proved to be correct, and as a result of repeated research to realize the above-mentioned idea, the individual source MBE method was used.
When a semiconductor crystal thin film (Si—SiGe / Si quantum well structure film) having a Si—SiGe heterojunction structure is formed in a high temperature range of 1800 to 900 ° C., which has not been heretofore known, strong light emission (light emission of a compound semiconductor) that has never been achieved. The inventors have reached the present invention by discovering that a strong light emission comparable to that of (1) can be obtained.

【0010】これについて、より詳しく説明すると、ガ
スソースMBE法は、生成する膜の均一性の点におい
て、個体ソースMBE法に一歩を譲る。したがって、従
来、個体ソースMBE法が賞用されている。しかし、上
記個体ソースMBE法における半導体結晶薄膜の成長
は、300〜500℃の低温で行なわれることが技術常
識となっている。
To explain this in more detail, the gas source MBE method gives a step to the solid source MBE method in terms of the uniformity of the film formed. Therefore, conventionally, the individual source MBE method has been favored. However, it is common general knowledge that the growth of the semiconductor crystal thin film in the solid source MBE method is performed at a low temperature of 300 to 500 ° C.

【0011】この発明者らは、先に述べたように、この
ような技術常識に疑いを抱き、低温における膜成長自体
が発光現象を阻害しているのではないかと考えた。すな
わち、低温では、結晶を形成する原子(SiGe)の活
発な運動が抑制され、上記原子が、本来の結晶格子位置
に収まることができず、結晶性の低下が起こることが予
期される。この発明者らは、強い発光には、結晶性等が
良いことが必須条件であると予想している。従来は、個
体ソースMBE法は、低温成長を行なっていたのであ
り、成長したSiGe自身の結晶性を低下させる結果と
なっていた。なお、結晶性の良否の判断は、通常、発光
現象を利用した、PL(フォトルミネッセンス)測定で
行なわれている。この方法では、GaAs等の化合物半
導体のように発光しやすいものであれば容易に判定でき
るが、Si系の結晶は元来発光しにくいため、結晶性の
良否の判定は容易でない。さらに、従来の個体ソースM
BE法において得られるSi−SiGeヘテロ接合構造
の半導体結晶薄膜は、電子デバイスへの応用が殆どであ
るためどうしても数千Å以上の厚い膜を形成することが
多かった。しかし、Si膜上にSiGe膜を成長させる
場合、SiとSiGeとが相互に格子定数が4%も違う
ことから、このような厚膜では先に述べたように、転位
が発生し結晶性が悪くなる。すなわち、転位を発生させ
ず結晶性のよいヘテロ界面を形成するためには、SiG
e膜をその内部に歪みを含ませた状態でSiGe膜の格
子定数よりも小さなSi膜の格子定数に整合させること
になるのであるが、膜厚が厚くなる程、上記SiGe膜
の内部の歪みエネルギーが増加し、ある膜厚以上になる
と転位が発生する。このような膜厚を臨界膜厚と呼び、
通常1000Å以下である。従来の個体ソースMBE法
では、上記のように、得られる半導体結晶薄膜がこの臨
界膜厚を必然的に超えることから、自動的に結晶性の低
下が生じている。このように、従来の個体ソースMBE
法によって形成される上記半導体結晶薄膜は、自動的に
転位が発生していて結晶性が悪くなっており、このこと
と、PL測定による結晶性の良否の判定が容易でないこ
とと、個体ソースMBE法が優れた成膜性能を持ち、欠
点が少ないと言われていることとが相俟って、発光現象
と結晶性とが相関関係を有するということに気付かなか
ったものと考えられる。
As described above, the present inventors doubted such common technical knowledge and thought that the film growth itself at a low temperature might inhibit the light emission phenomenon. That is, at a low temperature, active movement of atoms (SiGe) forming a crystal is suppressed, the above atom cannot be contained in the original crystal lattice position, and the crystallinity is expected to decrease. The present inventors anticipate that good crystallinity and the like are essential conditions for strong light emission. Conventionally, the solid-source MBE method has performed low-temperature growth, resulting in a decrease in crystallinity of the grown SiGe itself. It should be noted that the quality of crystallinity is usually determined by PL (photoluminescence) measurement using a light emission phenomenon. According to this method, it is possible to easily determine if it is a compound semiconductor such as GaAs that easily emits light, but it is not easy to determine whether the crystallinity is good or bad because the Si-based crystal originally does not emit light easily. Furthermore, the conventional individual source M
Semiconductor crystal thin film of the resulting Si-SiGe heterojunction structure in BE method was often form a absolutely several thousand Å or more thick film for application to the electronic device is a little. However, when a SiGe film is grown on a Si film, since Si and SiGe have lattice constants different by 4% from each other, such a thick film causes dislocation and crystallinity as described above. become worse. That is, in order to form a hetero interface with good crystallinity without generating dislocations, SiG
Although the e film is made to match the lattice constant of the Si film smaller than the lattice constant of the SiGe film in the state where the strain is contained therein, the thicker the film thickness, the more the internal strain of the SiGe film. When the energy increases and the film thickness exceeds a certain value, dislocations occur. Such a film thickness is called a critical film thickness,
Usually less than 1000Å. In the conventional solid source MBE method, as described above, the obtained semiconductor crystal thin film inevitably exceeds this critical film thickness, so that the crystallinity is automatically lowered. Thus, the conventional individual source MBE
In the semiconductor crystal thin film formed by the method, dislocations are automatically generated and the crystallinity is deteriorated. This means that it is not easy to determine whether the crystallinity is good or bad by PL measurement. It is considered that he did not notice that the luminescence phenomenon and the crystallinity have a correlation in combination with the fact that the method has excellent film forming performance and is said to have few defects.

【0012】この発明者らは、先に述べたように結晶性
の優れたSiGe/Si量子井戸構造を作製すれば、強
い発光現象が得られるものと考えた。そこで結晶性の向
上を図るために、高温で成長でき、なおかつ高温成長の
弊害が出ないような成長方法について研究を重ねた。そ
の結果、個体ソースMBE法を改善し、600〜900
℃という従来では考えられない高温域において真空室内
等の成長雰囲気中に水素を導入しながらSiGe/Si
量子井戸構造を作製し、しかも、その膜厚を、転位によ
る結晶性の劣化が起こらない臨界膜厚以下に抑えると、
化合物半導体に匹敵するような強い発光が得られること
を見いだし、この発明に到達した。したがって、この発
明において、Si−SiGeヘテロ接合構造の半導体結
晶薄膜における薄膜とは臨界膜厚以下であり、通常10
00Å以下の膜厚のことをいう。
The inventors of the present invention thought that a strong light emission phenomenon could be obtained by producing a SiGe / Si quantum well structure having excellent crystallinity as described above. Therefore, in order to improve the crystallinity, research has been repeated on a growth method that allows growth at high temperature and does not cause adverse effects of high temperature growth. As a result, the individual source MBE method was improved, and 600-900
SiGe / Si while introducing hydrogen into the growth atmosphere such as in a vacuum chamber in a high temperature range of ℃, which is unprecedented.
If a quantum well structure is manufactured and the film thickness is suppressed to a critical film thickness or less at which crystallinity deterioration due to dislocation does not occur,
The inventors have found that strong light emission comparable to that of a compound semiconductor can be obtained, and have reached the present invention. Therefore, in the present invention, the thin film in the semiconductor crystal thin film of the Si-SiGe heterojunction structure is a critical film thickness or less, and usually 10
It means a film thickness of 00Å or less.

【0013】この発明の半導体デバイスは、個体ソース
MBE法で用いる従来公知の半導体製造装置をそのまま
用いて得ることができる。この場合、半導体結晶薄膜の
成長の際に、上記半導体製造装置の真空室内に水素を導
入し、かつ基板温度と、生成する半導体結晶薄膜の膜厚
とを上記のように制御することが行なわれる。
The semiconductor device of the present invention can be obtained by directly using a conventionally known semiconductor manufacturing apparatus used in the solid source MBE method. In this case, during the growth of the semiconductor crystal thin film, hydrogen is introduced into the vacuum chamber of the semiconductor manufacturing apparatus, and the substrate temperature and the thickness of the semiconductor crystal thin film to be produced are controlled as described above. ..

【0014】つぎに、この発明を実施例にもとづいて詳
細に説明する。
Next, the present invention will be described in detail based on embodiments.

【0015】[0015]

【実施例】図1はこの発明に用いる半導体製造装置を示
している。すなわち、この半導体製造装置は、個体ソー
スMBE法に用いる従来公知の半導体製造装置である。
この半導体製造装置は、円筒形のステンレス製真空室X
を備え、その真空室X内にマグネットカップリング装置
1が設けられている。このマグネットカップリング装置
1の端面に基板ホルダー2が取り付けられ、この基板ホ
ルダー2に円板状のSi基板が着脱自在に取り付けられ
ている。上記円板状のSi基板Aは、マグネットカップ
リング装置1により円周方向に100prm以上の回転
速で回転するようになっている。3はマニピュレーター
である。このマニピュレーター3は、上記マグネットカ
ップリング装置1と連結し、Si基板Aの位置を適正に
調整等するようになっている。上記円板状のSi基板A
に対向する真空室Xの部分には、個体ソースを内蔵した
3個の分子線源セル4〜6と、水素を投射する1個のセ
ル7とが所定間隔で設けられている。これら分子線源セ
ル4〜6のうち、セル4,6にはSi源が内蔵され、セ
ル5にはGe源が内蔵されている。これらの分子線源セ
ル4〜6には、ヒートガン(図示せず)が内蔵されてお
り、上記Si源またはGe源を加熱して気化させ分子線
の状態(ビーム状態)で、各セル4〜6の先端4a,5
a,6aからSi基板Aに向かって投射するようになっ
ている。また、水素投射用のセル7には、タンタルフィ
ラメントからなるヒータ(図示せず)が内蔵され、20
00℃に加熱されるようになっている。そして、水素は
水素導入パイプ7bを介してセル内に導入され、上記ヒ
ータの熱により原子状に分解されセル7の先端7aから
Si基板Aに向かって投射される。それらのセル4〜7
の前方には、各セル4〜7ごとにそれぞれセルシャッタ
ー8が設けられ、さらにその前方に、メインシャッター
9が設けられている。そして真空室Xの内壁面には、液
体窒素シュラウド10が設けられている。11は分子線
モニターイオンゲージ、12は四重極型質量分析装置
(QMS)、13は反射型電子線回析装置(RHEE
D)である。14は真空室X内を超高真空(10-11
orr)に吸引する真空ポンプ(ゲッターホンプ)に連
通する連通管であり、15はそのゲートバルブである。
1 shows a semiconductor manufacturing apparatus used in the present invention. That is, this semiconductor manufacturing apparatus is a conventionally known semiconductor manufacturing apparatus used for the solid source MBE method.
This semiconductor manufacturing device is a cylindrical stainless steel vacuum chamber X.
The magnet coupling device 1 is provided in the vacuum chamber X. A substrate holder 2 is attached to an end surface of the magnet coupling device 1, and a disc-shaped Si substrate is detachably attached to the substrate holder 2. The disk-shaped Si substrate A is rotated in the circumferential direction at a rotational speed of 100 prm or more by the magnet coupling device 1. 3 is a manipulator. The manipulator 3 is connected to the magnet coupling device 1 to properly adjust the position of the Si substrate A. Disc-shaped Si substrate A
In the portion of the vacuum chamber X opposite to, three molecular beam source cells 4 to 6 containing a solid source and one cell 7 for projecting hydrogen are provided at predetermined intervals. Of these molecular beam source cells 4 to 6, cells 4 and 6 have Si sources built in, and cells 5 have Ge sources built-in. A heat gun (not shown) is built in each of the molecular beam source cells 4 to 6, and the cells 4 to 6 are heated in a state of a molecular beam (beam state) by heating and vaporizing the Si source or Ge source. 6 tips 4a, 5
Projection is performed from a, 6a toward the Si substrate A. Further, a heater (not shown) made of a tantalum filament is built in the cell 7 for hydrogen projection.
It is designed to be heated to 00 ° C. Then, hydrogen is introduced into the cell through the hydrogen introducing pipe 7b, is decomposed into atoms by the heat of the heater, and is projected from the tip 7a of the cell 7 toward the Si substrate A. Those cells 4-7
A cell shutter 8 is provided in front of each of the cells 4 to 7, and a main shutter 9 is provided in front of the cell shutter 8. A liquid nitrogen shroud 10 is provided on the inner wall surface of the vacuum chamber X. 11 is a molecular beam monitor ion gauge, 12 is a quadrupole mass spectrometer (QMS), 13 is a reflection electron beam diffractometer (RHEE).
D). 14 is an ultrahigh vacuum (10 -11 T
orr) is a communication pipe that communicates with a vacuum pump (getter hoop) for suction, and 15 is a gate valve thereof.

【0016】上記の装置を用いSi基板A上に目的とす
る半導体結晶薄膜を成長させるには、真空室X内の圧力
を10-11 Torrの超高真空に設定する。そして、基
板ホルダー2に内蔵されたヒーターによってSi基板A
を600〜900℃、好適には620〜800℃の温度
に加熱する。そして、その状態で、上記セル7の先端7
aから原子状に分解された水素をSi基板Aに向かって
投射しながら、分子線源セル4,6からSiの分子線を
Si基板Aに向けて60秒投射し、ついで5秒間停止し
たのち、さらに10秒間投射する(必要に応じて、この
投射は60秒→5秒(停止)→10秒→5秒(停止)→
60秒→5秒(停止)→10秒→5秒(停止)→と繰り
返される)。このとき分子線源セル5〜7からGeの分
子線が、上記Siの分子線の10秒間の流れに重ねて1
0秒間流される。すなわち、Si基板Aに向かって、S
iの分子線が60秒間流されることによって、Si基板
A上に、まずSiの薄膜が形成され、つぎに5秒停止し
たのち10秒間流される(この10秒間にはGeの分子
線が重ねて投射される)ことにより、上記生成したSi
薄膜の上に、SiGe薄膜が重ねて形成される。このよ
うにして、Siの薄膜とSiGeの薄膜が交互に形成さ
れる。この場合、原子状に分解された水素の存在によ
り、Si薄膜とSiGeの薄膜との接合界面の急峻性が
向上し、上記接合界面近傍の上記両薄膜の純度が高くな
る(例えば接合界面近傍のSi薄膜にGeが混じり込ま
なくなる)。
In order to grow a desired semiconductor crystal thin film on the Si substrate A using the above apparatus, the pressure in the vacuum chamber X is set to an ultrahigh vacuum of 10 -11 Torr. Then, the Si substrate A is heated by the heater built in the substrate holder 2.
Is heated to a temperature of 600 to 900 ° C, preferably 620 to 800 ° C. Then, in this state, the tip 7 of the cell 7 is
While projecting atomically decomposed hydrogen from a toward the Si substrate A, a molecular beam of Si from the molecular beam source cells 4 and 6 is projected toward the Si substrate A for 60 seconds, and then stopped for 5 seconds. , Project for another 10 seconds (if necessary, this projection is 60 seconds → 5 seconds (stop) → 10 seconds → 5 seconds (stop) →
It is repeated 60 seconds → 5 seconds (stop) → 10 seconds → 5 seconds (stop) →). At this time, the molecular beam of Ge from the molecular beam source cells 5 to 7 is overlapped with the flow of the above-mentioned Si molecular beam for 10 seconds, and
Shed for 0 seconds. That is, S toward the Si substrate A
By flowing the molecular beam of i for 60 seconds, a thin film of Si is first formed on the Si substrate A, then stopped for 5 seconds and then flowed for 10 seconds (the molecular beam of Ge overlaps in this 10 seconds). By being projected)
A SiGe thin film is overlaid on the thin film. In this way, Si thin films and SiGe thin films are alternately formed. In this case, the presence of atomically decomposed hydrogen improves the steepness of the bonding interface between the Si thin film and the SiGe thin film, and improves the purity of both thin films near the bonding interface (for example, near the bonding interface). Ge does not mix into the Si thin film).

【0017】上記装置を用い、水素を導入しながら、6
20℃で作製したSiGe/Siのヘテロ構造を有する
半導体結晶薄膜の1つであるSi0.84Ge0.16(36
Å)/Si(54Å)量子井戸構造(Si基板の上に5
4ÅのSi結晶薄膜を形成、その上にSiとGeの比率
が0.84対0.16のSiGe結晶薄膜を36Åの厚
みで形成、さらにその上にSi結晶薄膜を54Å形成し
たもの)のPL(フォトルミネッセンス)スペクトルを
図2の曲線Aに示す。また同じ装置を用い、水素を導入
しないで、かつ温度500℃で作製した同じ構造の薄膜
のPLスペクトルを曲線Bに示す。曲線Aにおいて、X
TOとXNPと表示した強いピークがSiGe膜からの発光
であり、従来得られなかったものである。その右側の大
きなピークはSi基板からの発光である。500℃で作
製した同じ構造のものでは、発光を示すピークが全く消
失しているうえに、さらに低エネルギー側に結晶欠陥の
存在を示すブロードなピークが検出されている。
Using the above apparatus, while introducing hydrogen,
Si 0.84 Ge 0.16 (36 which is one of the semiconductor crystal thin films having a SiGe / Si heterostructure manufactured at 20 ° C.)
Å) / Si (54Å) quantum well structure (5 on Si substrate
A 4 Å Si crystal thin film is formed, a SiGe crystal thin film with a ratio of Si to Ge of 0.84 to 0.16 is formed on the Å thickness of 36 Å, and a Si crystal thin film is further formed on it is 54 Å) PL. The (photoluminescence) spectrum is shown by the curve A in FIG. A curve B shows a PL spectrum of a thin film having the same structure, which was manufactured using the same device at a temperature of 500 ° C. without introducing hydrogen. In curve A, X
The strong peaks designated as TO and X NP are the light emission from the SiGe film, which has not been obtained conventionally. The large peak on the right side is the light emission from the Si substrate. In the case of the same structure manufactured at 500 ° C., the emission peak is completely disappeared, and a broad peak indicating the presence of crystal defects is detected on the lower energy side.

【0018】また、図3の曲線Aは、上記装置を用い、
水素を導入しながら620℃で作製したSiGe/Si
量子井戸構造のSiGe膜とSi膜との接合界面の急峻
性を測定したSIMS分析データ曲線であり、同じく図
3の曲線Bは上記装置を用い、水素を導入しないで50
0℃で作製したSiGe/Si量子井戸構造のSiGe
膜とSi膜の接合界面の急峻性を測定したSIMS分析
曲線である。図3の曲線AとBとの対比から、本発明の
上記実施例のものでは、極めて短い距離でGeが減衰お
り、接合界面の急峻性が優れていることがわかる。それ
に比べ水素を導入しないで500℃で作製したものは長
い距離に渡りGeが分布しており、急峻性が悪いことを
示している。
A curve A in FIG. 3 is obtained by using the above apparatus,
SiGe / Si produced at 620 ° C. while introducing hydrogen
3 is a SIMS analysis data curve obtained by measuring the steepness of the junction interface between the SiGe film and the Si film having the quantum well structure. Similarly, the curve B in FIG.
SiGe of SiGe / Si quantum well structure manufactured at 0 ° C.
It is a SIMS analysis curve which measured the steepness of the junction interface of a film and a Si film. From the comparison between the curves A and B in FIG. 3, it can be seen that in the above-mentioned embodiment of the present invention, Ge is attenuated at an extremely short distance and the steepness of the bonding interface is excellent. On the other hand, Ge produced at 500 ° C. without introducing hydrogen has Ge distributed over a long distance, indicating that the steepness is poor.

【0019】〔急峻性の測定〕二次イオン質量分析装置
(酸素イオンO2 + を加速エネルギー6kVで試料表面
に対して60°の角度で入射し、物理スパッタ効果によ
り、GeのSi中における深さ方向分析を行う。《SI
MS装置》)を用いて、Si/SiGe界面付近におけ
るGeの分布を測定した。 〈SIMS:ATOMIKA製6500、超高真空対応
(10-11 Torr)、軽元素分析用ヘリウムクライオ
パネル装備、四重極型質量分析器型〉
[Measurement of Steepness] Secondary ion mass spectrometer (oxygen ion O 2 + is injected with an acceleration energy of 6 kV at an angle of 60 ° with respect to the sample surface, and due to the physical sputtering effect, the depth of Ge in Si is increased. Direction analysis.
The distribution of Ge in the vicinity of the Si / SiGe interface was measured using an MS apparatus >>). <SIMS: Atomika 6500, ultra-high vacuum compatible (10 -11 Torr), helium cryopanel for light element analysis, quadrupole mass spectrometer type>

【0020】〔PLの測定〕JOBIN YVON製、
1m分光器(JHR−1000)を用いて測定した。
[Measurement of PL] manufactured by JOBIN YVON,
It measured using the 1-m spectroscope (JHR-1000).

【0021】このように、上記実施例によれば、結晶性
がよく、しかもSi薄膜とSiGe薄膜のヘテロ接合界
面の急峻性が良好で、発光特性の優れた高品質な半導体
結晶薄膜を形成することができる。すなわち、この発明
は、半導体結晶薄膜の成長に際して、基板温度を高める
だけでなく、水素を添加するため、高温成長による弊害
を防止することができる。高温成長の弊害は、ヘテロ接
合界面の急峻性が劣るようになることである。ヘテロ接
合界面の急峻性が悪くなると、本来異種金属の境界面と
なるべきところにゆらぎが存在することになり、それ
は、量子井戸の発光波長を設計した値からずらす(ゆら
ぎがなければ、発光波長は井戸幅で規定された値とな
る)原因になるなど、デバイス作製上さまざまな障害を
もたらす。この表面偏析は、界面において、供給された
原子が下地の結晶中の原子と入れ替わる現象である。そ
れを抑制するためには、表面原子の動きを抑える必要が
ある。その一つの方法は、成長温度を下げることであ
り、従来からの低温成長法である。しかしながら、これ
では同時に結晶性も落としてしまうことになる。結晶性
を落とすことなく、表面偏析を抑える必要がある。この
発明者らは、そのためには表面エネルギーを抑制してや
ればよいと着想した。すなわちGeのダングリングボン
ド(原子の結合できる手の内、結合に使われないで開い
ているもの)の数を減らしてやればよい。その方法とし
て水素を供給し、ダングリングボンドを水素で終端させ
ることによりヘテロ接合界面の急峻性の悪化を防止して
いる。水素の存在は、結晶性には悪影響を与えない。な
お、上記の実施例では、水素ガスを約2000℃に加熱
したヒータを通過させ、原子状水素に分解して成長面に
導入しているが、これに限るものではない。例えば水素
ガスをプラズマにより原子状水素に分解して成長面に導
入してもよいし、ドーピングガス等の、成長する結晶を
構成しない原子(Si、Ge以外の原子)の水素化物を
ヒータもしくはプラズマにより分解して導入してもよ
い。
As described above, according to the above-described embodiment, a high-quality semiconductor crystal thin film having good crystallinity, good steepness at the heterojunction interface between the Si thin film and the SiGe thin film, and excellent emission characteristics is formed. be able to. That is, according to the present invention, when the semiconductor crystal thin film is grown, not only the substrate temperature is raised, but also hydrogen is added, so that the adverse effect of the high temperature growth can be prevented. The adverse effect of high temperature growth is that the steepness of the heterojunction interface becomes poor. When the steepness of the heterojunction interface deteriorates, there will be fluctuations at what should originally be the interface between dissimilar metals, which is caused by shifting the emission wavelength of the quantum well from the designed value (if there is no fluctuation, the emission wavelength Causes a variety of obstacles in device fabrication, such as causing the well width. This surface segregation is a phenomenon in which supplied atoms replace atoms in the underlying crystal at the interface. In order to suppress it, it is necessary to suppress the movement of surface atoms. One of the methods is to lower the growth temperature, which is a conventional low temperature growth method. However, this also reduces the crystallinity. It is necessary to suppress the surface segregation without reducing the crystallinity. The present inventors have conceived that the surface energy should be suppressed for that purpose. That is, it is sufficient to reduce the number of Ge dangling bonds (the hands that can bond atoms, but are open without being used for bonding). As the method, hydrogen is supplied and the dangling bond is terminated with hydrogen to prevent the steepness of the heterojunction interface from being deteriorated. The presence of hydrogen does not adversely affect the crystallinity. In the above embodiment, hydrogen gas is passed through a heater heated to about 2000 ° C., decomposed into atomic hydrogen and introduced into the growth surface, but the invention is not limited to this. For example, hydrogen gas may be decomposed into atomic hydrogen by plasma and introduced into the growth surface, or a hydride of atoms (atoms other than Si and Ge) that do not form a growing crystal, such as a doping gas, may be used as a heater or plasma. May be decomposed and introduced.

【0022】[0022]

【発明の効果】以上のように、この発明は、個体ソース
MBE法を改良したもので、基板上にSi−SiGeヘ
テロ接合構造の半導体結晶薄膜を成長させる際に、基板
の温度を600〜900℃に設定するとともに、成長雰
囲気中に水素を導入し、しかも上記半導体結晶薄膜を、
転位により結晶欠陥が生じない臨界膜厚以下の薄膜に設
定しているため、従来にない、発光特性の極めて優れた
高品質な半導体結晶薄膜を製造することができ、それに
よって、半導体としての基本的な性能の他、発光素子等
の性能併用している半導体デバイスを製造することがで
きる。したがって、この半導体デバイスを利用し、超高
性能Si電子デバイスや、発光,受光,光処理といった
光化学機能を組み込んだ、全く新しい光電子デバイスの
作製が可能となる。
As described above, the present invention is an improvement of the solid source MBE method. When the semiconductor crystal thin film having the Si--SiGe heterojunction structure is grown on the substrate, the substrate temperature is 600 to 900. The temperature is set to ℃, hydrogen is introduced into the growth atmosphere, and the semiconductor crystal thin film is
Since the film thickness is set to a critical film thickness or less at which crystal defects do not occur due to dislocations, it is possible to manufacture high-quality semiconductor crystal thin films with unprecedentedly excellent light-emitting characteristics. It is possible to manufacture a semiconductor device having a combination of performances such as a light-emitting element in addition to the desired performance. Therefore, using this semiconductor device, it becomes possible to fabricate an ultra-high-performance Si electronic device and a completely new optoelectronic device incorporating photochemical functions such as light emission, light reception, and light treatment.

【図面の簡単な説明】[Brief description of drawings]

【図1】この発明に用いられる半導体製造装置の成長室
の水平断面図である。
FIG. 1 is a horizontal sectional view of a growth chamber of a semiconductor manufacturing apparatus used in the present invention.

【図2】この発明の製法と従来の製法により得られた半
導体結晶薄膜の発光特性を比較説明する図である。
FIG. 2 is a diagram for comparatively explaining the light emission characteristics of the semiconductor crystal thin film obtained by the manufacturing method of the present invention and the conventional manufacturing method.

【図3】この発明の製法と従来の製法により得られた半
導体結晶薄膜の急峻性を比較説明する図である。
FIG. 3 is a diagram for comparing and explaining the steepness of the semiconductor crystal thin film obtained by the manufacturing method of the present invention and the conventional manufacturing method.

【符号の説明】[Explanation of symbols]

X 真空室 A Si基板 4,5,6,7 分子線源セル 10 液体窒素シュラウド X vacuum chamber A Si substrate 4,5,6,7 Molecular beam source cell 10 Liquid nitrogen shroud

─────────────────────────────────────────────────────
─────────────────────────────────────────────────── ───

【手続補正書】[Procedure amendment]

【提出日】平成4年6月24日[Submission date] June 24, 1992

【手続補正1】[Procedure Amendment 1]

【補正対象書類名】図面[Document name to be corrected] Drawing

【補正対象項目名】図1[Name of item to be corrected] Figure 1

【補正方法】変更[Correction method] Change

【補正内容】[Correction content]

【図1】 [Figure 1]

Claims (1)

【特許請求の範囲】[Claims] 【請求項1】 個体ソース分子線エピタキシャル成長法
を利用して、基板上にSi−SiGeヘテロ接合構造の
半導体結晶薄膜を成長させ、半導体デバイスを製造する
方法であって、上記半導体結晶薄膜の成長の際に、上記
基板の温度を600〜900℃に設定するとともに、成
長雰囲気中に水素を導入することを特徴とする半導体デ
バイスの製法。
1. A method for producing a semiconductor device by growing a semiconductor crystal thin film having a Si—SiGe heterojunction structure on a substrate by using a solid source molecular beam epitaxial growth method, the method comprising the steps of: At this time, the temperature of the substrate is set to 600 to 900 ° C., and hydrogen is introduced into the growth atmosphere.
JP14231392A 1992-06-03 1992-06-03 Manufacture of semiconductor device Pending JPH05335238A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP14231392A JPH05335238A (en) 1992-06-03 1992-06-03 Manufacture of semiconductor device

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP14231392A JPH05335238A (en) 1992-06-03 1992-06-03 Manufacture of semiconductor device

Publications (1)

Publication Number Publication Date
JPH05335238A true JPH05335238A (en) 1993-12-17

Family

ID=15312456

Family Applications (1)

Application Number Title Priority Date Filing Date
JP14231392A Pending JPH05335238A (en) 1992-06-03 1992-06-03 Manufacture of semiconductor device

Country Status (1)

Country Link
JP (1) JPH05335238A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745520A (en) * 1993-07-26 1995-02-14 Nec Corp Forming method of semiconductor crystal
EP0707097A1 (en) 1994-10-14 1996-04-17 Mitsubishi Denki Kabushiki Kaisha MBE apparatus and MBE method

Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278132A (en) * 1985-06-03 1986-12-09 Sumitomo Electric Ind Ltd Forming method for amorphous hydride sige film
JPS62159415A (en) * 1986-01-08 1987-07-15 Nec Corp Manufacture of monocrystalline semiconductor thin film
JPS62231202A (en) * 1986-03-31 1987-10-09 Nec Corp Crystal for spectroscope, quantum fine line structure, and preparation thereof
JPS63158832A (en) * 1986-12-23 1988-07-01 Matsushita Electric Ind Co Ltd Semiconductor substrate
JPH0382018A (en) * 1989-08-24 1991-04-08 Mitsubishi Electric Corp Manufacture of semiconductor

Patent Citations (5)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPS61278132A (en) * 1985-06-03 1986-12-09 Sumitomo Electric Ind Ltd Forming method for amorphous hydride sige film
JPS62159415A (en) * 1986-01-08 1987-07-15 Nec Corp Manufacture of monocrystalline semiconductor thin film
JPS62231202A (en) * 1986-03-31 1987-10-09 Nec Corp Crystal for spectroscope, quantum fine line structure, and preparation thereof
JPS63158832A (en) * 1986-12-23 1988-07-01 Matsushita Electric Ind Co Ltd Semiconductor substrate
JPH0382018A (en) * 1989-08-24 1991-04-08 Mitsubishi Electric Corp Manufacture of semiconductor

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JPH0745520A (en) * 1993-07-26 1995-02-14 Nec Corp Forming method of semiconductor crystal
EP0707097A1 (en) 1994-10-14 1996-04-17 Mitsubishi Denki Kabushiki Kaisha MBE apparatus and MBE method

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