JPS63157421A - Method of forming resist pattern - Google Patents

Method of forming resist pattern

Info

Publication number
JPS63157421A
JPS63157421A JP30396886A JP30396886A JPS63157421A JP S63157421 A JPS63157421 A JP S63157421A JP 30396886 A JP30396886 A JP 30396886A JP 30396886 A JP30396886 A JP 30396886A JP S63157421 A JPS63157421 A JP S63157421A
Authority
JP
Japan
Prior art keywords
film
pattern
exposed
resist pattern
light
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP30396886A
Other languages
Japanese (ja)
Inventor
Takashi Taguchi
田口 隆
Hiroshi Otsuka
博 大塚
Takahiro Yamauchi
孝裕 山内
Yoshio Ito
由夫 伊東
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Oki Electric Industry Co Ltd
Original Assignee
Oki Electric Industry Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Oki Electric Industry Co Ltd filed Critical Oki Electric Industry Co Ltd
Priority to JP30396886A priority Critical patent/JPS63157421A/en
Publication of JPS63157421A publication Critical patent/JPS63157421A/en
Pending legal-status Critical Current

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  • Photosensitive Polymer And Photoresist Processing (AREA)
  • Exposure Of Semiconductors, Excluding Electron Or Ion Beam Exposure (AREA)

Abstract

PURPOSE:To obtain a pattern exceeding the resolution of an exposing equipment, by a method wherein a negative type resist pattern is subjected to exposure and development by applying a fine positive type resist pattern to a light- shielding mask, and a part which is not yet exposed under the fine light- shielding mask is eliminated CONSTITUTION:A base film 11 composed of SiO2 and the like is arranged on a substrate 10, and a resist film 11 sensitized to ultraviolet rays is formed. A positive type resist film 13 sensitized to ultraviolet rays is formed on the film 12. Exposure 11 is performed toward the film 15 by an exposing equipment, and then the film is developed to form an aperture 15 in which the surface of the film 12 is exposed and a positive type resist pattern 10 of a part which is not yet exposed. The whole part of the pattern 16 is irradiated by far ultraviolet rays applying a pattern 18 to a light-shielding mask./ Thereby, the aperture part 15 is exposed to light in the film 12. By developing, a lower part of the pattern 16 as a part of the film 11 which is not yet exposed is eliminated, and a negative type resist pattern 18 of the exposed part of the film 12 is formed, By making intervals of the pattern 18 very small, a pattern is obtained which exceeds the resolution of the exposing equipment.

Description

【発明の詳細な説明】 (産業上の利用分野) この発明は半導体装!Cμ下、LSIという)の製造プ
ロセスにおけるホトリソグラフィ工程でのレジストパタ
ーン形成方法に関するものである。
[Detailed Description of the Invention] (Industrial Application Field) This invention is a semiconductor device! The present invention relates to a resist pattern forming method in a photolithography step in the manufacturing process of Cμ (also referred to as LSI).

(従来の技術) 従来の紫外光(G線、1線〕を用いて行なうホトリソグ
ラフィ工程では反射型プロジェクションや縮小型プロジ
ェクション等の露光装置で被エツチング膜のエツチング
マスクとなる有機物材料から成るホトレジスト膜の露光
を行う。このホトレソス)l[Iには露光部分が現像時
に除去されるポジ型と逆に未lI元部分が現像時に除去
されるネガ型とが有シ、このホトレジスト@は第2図に
示すように露光エネルギーのドーズ量に対してそのツク
ターン寸法が変化する。第2図においてPはポジ型、N
はネガ型のレジスト膜、Mはマスク寸法でらり、ドーズ
1が多くなるに従ってドーズ量又化に対するパターン寸
法の変化分が小さくなシ安定す領域となる。従って、所
望のパターン寸法全パター。
(Prior art) In the conventional photolithography process using ultraviolet light (G line, 1 line), a photoresist film made of an organic material is used as an etching mask for a film to be etched using an exposure device such as a reflection projection or a reduction projection. This photoresist has two types: a positive type in which the exposed portion is removed during development, and a negative type in which the unused portion is removed during development. As shown in Figure 2, the dimension of the tectonic pattern changes with the dose of exposure energy. In Figure 2, P is positive type, N
is a negative resist film, M is a mask dimension, and as the dose 1 increases, the change in pattern dimension with respect to the dose becomes smaller and becomes stable. Therefore, the desired pattern dimensions of the entire putter.

形成上安定な領域で形成するためには、ドーriを大に
してマスクの寸法に対する半導体ウニ2、−のレソスト
寸法の変動分を見込でおくことが必要である。
In order to form in a stable region, it is necessary to increase the dori and take into account the variation in the resist size of the semiconductor urchin 2,- with respect to the mask size.

第3図は示ソ型レジスト膜を使用した場合の従来のレソ
スト・ぐターンの形成方法を示す図である。
FIG. 3 is a diagram illustrating a conventional method for forming a resist pattern using a photoresist film.

同図において、Sl  基板1上に5i02  の酸化
@2が形成され、さらにその上にスピンコード法等によ
り均一な厚さのポジ型のホトレソストFA3iE形成さ
れている。この(Qの状態で露光装置によ)紫外光を用
いて第2図に示した安定領域でホトレジスト@3にパタ
ーン露光を行い、(b)のように現像によってホトレジ
スト膜3の露光部分を除去する。
In the figure, 5i02 oxide@2 is formed on a Sl substrate 1, and a positive type photoresist FA3iE having a uniform thickness is formed thereon by a spin code method or the like. Using this ultraviolet light (using the exposure device in state Q), the photoresist @3 is exposed in a pattern in the stable region shown in Figure 2, and the exposed portion of the photoresist film 3 is removed by development as shown in (b). do.

この場合、バターニングによシ除去するホトレジスト嗅
3の幅が露光装置の解@度例えば0.8μmを越える鳴
であれば(b)のように問題ない。しかし、0.8μm
[下であると紫外光の回折現像によりホトレジスト膜3
の本来露光すべき部分が未感光の状態として残り、これ
を現像すると(C)のようにホトレジスト膜3がたれた
状態となる。この状態では(b)から(d)のようにエ
クテンダ液等を用いて酸化11112を所定寸法幅に除
去して例えばコンタクトホール等を安定的に形成するこ
とができなくなる。
In this case, if the width of the photoresist strip 3 to be removed by buttering exceeds the resolution of the exposure apparatus, for example, 0.8 μm, there is no problem as shown in (b). However, 0.8 μm
[If it is below, the photoresist film 3 is formed by diffraction development of ultraviolet light.
The portion that should originally be exposed remains unexposed, and when this is developed, the photoresist film 3 becomes sagging as shown in (C). In this state, as shown in (b) to (d), it is no longer possible to stably form, for example, a contact hole by removing the oxide 11112 to a predetermined width using an extender liquid or the like.

第4図はホトリソグラフィに用いるホトマスクを示した
ものである。同図において、ガラス(ブランクス)4の
下にクロムパターン5t−形成する。
FIG. 4 shows a photomask used in photolithography. In the figure, a chrome pattern 5t is formed under a glass (blank) 4.

(a)に示し友ようにクロムパターン5間の間隔がLl
のように大きい内は光強度曲線が01  のようにな力
士分なコントラストを得られるが、しかし、LSIの微
細化に伴なって(b)のホトマスクのようにクロムパタ
ーン5間の間隔がL2  のように小さくなると光強度
曲線がC2のようになり十分なコントラストを得ること
ができなくなる。又、上記と逆、即ち、クロムパターン
の線幅をL2  のように小さくした場合にも同じよう
に十分なコントラストを得ることができなくなる。
As shown in (a), the distance between the chrome patterns 5 is Ll.
As long as the light intensity curve is as large as 01, it is possible to obtain the contrast of a sumo wrestler. If it becomes small, the light intensity curve becomes like C2, and it becomes impossible to obtain sufficient contrast. Furthermore, even if the line width of the chrome pattern is reduced to L2, it is also impossible to obtain sufficient contrast.

(発明が解決しようとする問題点) しかしながら、以上述べたいずれの方法でろつてもLS
Iの高集積度化による・セターンの微細化に伴ない被エ
ツチング膜上のレジスト膜の除去幅も微小なものとしな
ければならないが、j1元装置トシて例えばグロソエク
ション装置を用いる場合、IX元暢が狭くなると紫外光
の回折現象が起り、又、ホ゛トマスクによるレヅスト膜
上のコントラストの低下カ生じ、シソストパターン間の
間隔t−1!元装置の解像度以下に狭くすることが不可
能であって、技術的に満足できるものが得られなかった
(Problem to be solved by the invention) However, regardless of the method described above, the LS
Due to the high integration of I and the miniaturization of setanes, the removal width of the resist film on the film to be etched must also be made minute. When the width becomes narrower, a diffraction phenomenon of ultraviolet light occurs, and the contrast on the resist film due to the photomask also decreases, and the distance between the resist patterns is t-1! It was impossible to narrow the resolution below that of the original device, and it was not possible to obtain a technically satisfactory resolution.

この発明は、以上述べたシソストパターン間の間隔全微
細にできない問題点全除去し、解像度が優れたレソスト
・(ターン形成方法を提供することを目的とする。
It is an object of the present invention to provide a method for forming a pattern with excellent resolution, which eliminates the above-mentioned problems in that the spacing between patterns cannot be made completely fine.

(問題点を解決するための手段) この発明に係るレソストパターン形成方法は、被エッチ
/グ膜上にネガ型、ポジ型レジスト楔を2層構造にして
形成し、ポジ型レジスト膜k ’ターニングして現浄し
、次に、このポジ型レジストパターン全マスクとして露
光々金ネガ型レジスト膜に路光して現像するようにした
ものである。
(Means for Solving the Problems) In the resist pattern forming method according to the present invention, a negative resist wedge and a positive resist wedge are formed in a two-layer structure on a film to be etched/etched, and a positive resist film k' This positive resist pattern is turned, developed, and then developed by passing light through the exposed gold negative resist film as a mask for the entire positive resist pattern.

(作 用) この発明におけるレソス) ノ4ターン形成方法は、高
解像度のポジ型しジスト膜tl−露光・現像して微細な
ポジ型レジストノイターンを得、このポジ型し9 x 
) パターンを遮光マスクとしてネガ型レジストパター
ンを露光・現像し、微細な遮光マスク下の未露光部f+
を取除くことによってネガ型レジストー9ターン間の間
隔を微φにし、31元装置の解像度以上のものを得る。
(Function) The 4-turn forming method in this invention involves exposing and developing a high-resolution positive resist film TL to obtain fine positive resist neutral turns,
) Using the pattern as a light-shielding mask, expose and develop the negative resist pattern to expose the unexposed area f+ under the fine light-shielding mask.
By removing the negative resist, the interval between the nine turns of the negative resist is reduced to a fine φ, and a resolution higher than that of the 31-element device is obtained.

(実施例) μ下、この発明の一実施例を図に基づき説明する。第1
図はこの発明の一実施例による工程順を示している。同
図において、(a)では半導体基板である81  基板
10上に下地@11′t−形成するが、この下地@11
としては5in2fly、ポリシリコン換又はアルミニ
ワム膜等が挙けられる。この下地Th1l上に例えはク
ロロメチルポリスチレン等のように波長2000A〜3
000Aの遠紫外線に感光するネガ型レジストをスピン
塗布法によシ厚み5000A〜12000Aの均一の厚
さに塗布した後に、ホットプレート上にて空気中で約1
20’CT約100秒間グリベークしてネ781′型レ
ソスト膜工を形成する。
(Example) Below, an example of the present invention will be described based on the drawings. 1st
The figure shows a process sequence according to an embodiment of the present invention. In the same figure, in (a), a base @11't- is formed on a semiconductor substrate 81 substrate 10;
Examples include 5in2fly, polysilicon film, and aluminum film. For example, on this base Th1l, a wavelength of 2000 A to 3 is used, such as chloromethyl polystyrene.
After applying a negative resist sensitive to deep ultraviolet rays of 0.000A to a uniform thickness of 5000A to 12000A using a spin coating method, it was coated on a hot plate in air for about 100A.
Gribake is performed for about 100 seconds at 20'CT to form a 781' type Resost film.

次に、(b)に示すようにネガ型レジスト膜12上に例
えばフェノールノボラック等を主成分トスル波長400
0A〜4500Aの紫外線に感光するポジ型レジストを
スピン塗布法によシ厚み8000A〜1200OAの均
一の厚さに塗布した後に、ホットプレート上にて空気中
で約100℃で約100秒間プリベークして高解像度の
ポジ型レジストil。
Next, as shown in (b), on the negative resist film 12, for example, a phenol novolac or the like is applied as a main component with a torsion wavelength of 400.
A positive resist sensitive to ultraviolet rays of 0A to 4500A is applied by spin coating to a uniform thickness of 8000A to 1200OA, and then prebaked on a hot plate in air at about 100°C for about 100 seconds. High resolution positive resist il.

全形成する。Fully formed.

次に、(e)に示すように上方からポジ型レジストa!
113に向けて所定の/Jパターン不図示の露光装置に
よシ紫外線(波長4000A〜4500A)露光14し
次後、(d)に示すように現像してポジ型レジスト膜1
3の露光部分t−除去して、ネガ型レジスト@120表
面が露出した開口部15と未露光部分のポジ型レジスト
パターン16と全形成スる。
Next, as shown in (e), a positive resist a! is applied from above.
The positive resist film 1 is exposed to ultraviolet light (wavelength 4000A to 4500A) in a predetermined /J pattern 113 using an exposure device (not shown), and then developed as shown in (d) to form a positive resist film 1.
The exposed portion t of No. 3 is removed to completely form the opening 15 in which the surface of the negative resist 120 is exposed and the positive resist pattern 16 in the unexposed portion.

この工程では、開口部15の幅が上記g光装置の解障度
を超えておシ、紫外線14が回折現@を起さないので開
口部15とポジ型レジストパターン216との境界が明
確でおり、ポジ型レジスト2ぞターン16の幅を約0.
3μm〜約0.5μmに容易に形成することができる。
In this step, the width of the opening 15 exceeds the resolution of the g-light device, and the ultraviolet rays 14 do not cause diffraction, so the boundary between the opening 15 and the positive resist pattern 216 is clear. Then, set the width of the positive resist 2 turn 16 to about 0.
It can be easily formed to a thickness of 3 μm to about 0.5 μm.

次に、(e)に示すようにポジ型レジストパfi−71
6を遮光マスクとして用す遠紫外線(波長2000A〜
3000A)17で全面露元を行い、ネガ型レジスト膜
12の内で開口部15の領域を感光させる。その後、(
f)に示すように例えは酢酸インアミ) ルとエチルセ
ルンルブの混合液又はメチルイソグチルケトン、メチル
エテルケト/等の醪液からなる現像液を用いて現像して
ポジ型しヅストパターン16とネガ型しソス)ml 2
の未露光部分でめる$′ゾ型レしストパターン16下の
部分を除去し、ネガ型レジスト@12の麹元部分である
ネガ型レジストパターン18を形成する。このネガ型レ
ジストパターン18間には幅が例えば上記露光装置の解
像度μ下の0.3μm〜0.5μmの凹部19が形成さ
れている。
Next, as shown in (e), a positive resist film fi-71
Far ultraviolet rays (wavelength 2000A ~) using 6 as a light-shielding mask
3000A) Full-surface exposure is performed in step 17 to expose the area of the opening 15 within the negative resist film 12. after that,(
As shown in f), a positive type dust pattern 16 and a negative type are developed by developing with a developer consisting of a mixture of acetic acid inamyl alcohol and ethylcerene lubricant or a solution of methyl isobutyl ketone, methyl ether ketone, etc. ml 2
The portion below the $'-type resist pattern 16, which is the unexposed portion of the resist pattern 16, is removed to form a negative resist pattern 18, which is the original part of the negative resist @12. A recess 19 is formed between the negative resist patterns 18 and has a width of, for example, 0.3 μm to 0.5 μm below the resolution μ of the exposure apparatus.

次に、(g)VC示すようにネガ型レジストパターン1
8をマスクとしてエツチング処理によシ下地層11内に
微細な線又は孔20を形成し、ネガ型レジストパターン
18全除去すれば[有])のようにナル。
Next, as shown in (g) VC, negative resist pattern 1
8 as a mask, fine lines or holes 20 are formed in the underlayer 11 by etching, and the negative resist pattern 18 is completely removed, as shown in the figure below.

この線又は孔20としては例えば約0.3〜0.54□
口のコンタクト孔t−形成することができる。
For example, the line or hole 20 is approximately 0.3 to 0.54□
A contact hole in the mouth can be formed.

以上のように、この発明によれば解像力の高いネガ型レ
ジスト@を下層に用いることによってポジ型レジストパ
ターンに対して反転した/セター7を得るものでめシ、
ポジ型レジスト/ぐターンノ寸法にi光量を増加させる
と極めて微細なノセターンを安定して形成することが可
能で、この・せターン寸法は露光装置の解像限界に制限
されることがなく、例えばG −1ine N、A O
,35のステy A −テも0.3〜0.5μm のパ
ターン形成が可能である。従って、この微細パターンを
反転して得られるネガ型レジストパターンの坂小スリッ
トは上記縛元装置の解@度以上の極めて狭いスリットや
コンタクト孔となる。
As described above, according to the present invention, by using a negative resist with high resolution as the lower layer, a setter 7 which is inverted with respect to the positive resist pattern can be obtained.
By increasing the amount of light in the positive resist pattern, it is possible to stably form extremely fine patterns, and the pattern size is not limited by the resolution limit of the exposure equipment, for example. G-1ine N, A O
, 35 STAY A-TE is also capable of forming a pattern of 0.3 to 0.5 μm. Therefore, the small slope slit of the negative resist pattern obtained by inverting this fine pattern becomes an extremely narrow slit or contact hole that is larger than the resolution of the above-mentioned binding device.

(発明の効果) 以上のようにこの発明の製造方法によれば、レジストI
ViIをネガ型とポジ型の2層構造に形成し、ポジ型か
らネガ型の11にレジスト膜を露光−現1球するように
したので、露光装置の解像度以上の解像度でレソストノ
量ターンのスリット全形成でき、LSIの高集積度化が
可能であυ、しがもXilや電子ビーム等の特殊な機器
を必快とせず安価にできることが期待できる。
(Effect of the invention) As described above, according to the manufacturing method of the present invention, the resist I
The ViI is formed into a two-layer structure of a negative type and a positive type, and the resist film is exposed and exposed from the positive type to the negative type 11, so that the slit of the turn of the resist can be formed with a resolution higher than that of the exposure equipment. It is possible to form a complete LSI, and it is possible to increase the degree of integration of LSI, and it is expected that it can be made at low cost without requiring special equipment such as XIL or electron beam.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図はこの発明の一実施例による工程図、第2図はド
ーズ量と・臂ターン寸法との関係を示す線図、第3図は
従来タリによるパターン形成方法の工程図、第4図はホ
トマスクと光強度曲線との関係を示す説明図である。 10・・・半導体基板、11・・・被エツチング験、1
2・・・ネガ型レジスト膜、13・・・ポジ型ルソスト
m、14・・・紫外光、16・・・ポジ型レジスト・ぐ
2−/、17・・・遠紫外光、18・・・ネガ型レジス
トパターン。 第1S 第3図
Fig. 1 is a process diagram according to an embodiment of the present invention, Fig. 2 is a diagram showing the relationship between dose amount and arm turn dimension, Fig. 3 is a process diagram of a conventional pattern forming method using tarry, and Fig. 4 is an explanatory diagram showing the relationship between a photomask and a light intensity curve. 10...Semiconductor substrate, 11...Etching test, 1
2... Negative resist film, 13... Positive type Lusosto m, 14... Ultraviolet light, 16... Positive resist film, 17... Far ultraviolet light, 18... Negative resist pattern. 1S Figure 3

Claims (1)

【特許請求の範囲】[Claims] (1)半導体基板の表面上に設けられた被エッチング膜
上にネガ型レジスト膜を形成する第1工程、次に、上記
ネガ型レジスト膜上にポジ型レジスト膜を形成する第2
工程、 次に、上記ポジ型レジスト膜に対してパターニングを行
う第3行程、 次に、第1の現像液を用いて上記ポジ型レジスト膜を現
像してポジ型レジストパターンを形成する第4工程、 次に、上記ポジ型レジストパターンを遮光マスクとして
全面露光を行い、上記ネガ型レジスト膜を露光する第5
工程、 次に、第2の現像液を用いて上記ネガ型レジスト膜を現
像し、上記ネガ型レジスト膜の未露光部分を上記ポジ型
レジストパターンと共に除去してネガ型レジストパター
ンを形成する第6工程とから成ることを特徴とするレジ
ストパターン形成方法。
(1) A first step of forming a negative resist film on the film to be etched provided on the surface of the semiconductor substrate, and then a second step of forming a positive resist film on the negative resist film.
Step, Next, a third step of patterning the positive resist film, Next, a fourth step of developing the positive resist film using a first developer to form a positive resist pattern. Next, the entire surface is exposed using the positive resist pattern as a light shielding mask, and the negative resist film is exposed in a fifth step.
a sixth step of developing the negative resist film using a second developer and removing the unexposed portion of the negative resist film together with the positive resist pattern to form a negative resist pattern; A resist pattern forming method comprising the steps of:
JP30396886A 1986-12-22 1986-12-22 Method of forming resist pattern Pending JPS63157421A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP30396886A JPS63157421A (en) 1986-12-22 1986-12-22 Method of forming resist pattern

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP30396886A JPS63157421A (en) 1986-12-22 1986-12-22 Method of forming resist pattern

Publications (1)

Publication Number Publication Date
JPS63157421A true JPS63157421A (en) 1988-06-30

Family

ID=17927446

Family Applications (1)

Application Number Title Priority Date Filing Date
JP30396886A Pending JPS63157421A (en) 1986-12-22 1986-12-22 Method of forming resist pattern

Country Status (1)

Country Link
JP (1) JPS63157421A (en)

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008171859A (en) * 2007-01-09 2008-07-24 Toppan Printing Co Ltd Resist pattern forming method, manufacturing method of electronic element and manufacturing method of semiconductor integrated circuit
US8308036B2 (en) 2007-10-31 2012-11-13 Sankyo Seisakusho Co. Sheet material feeding apparatus

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2008171859A (en) * 2007-01-09 2008-07-24 Toppan Printing Co Ltd Resist pattern forming method, manufacturing method of electronic element and manufacturing method of semiconductor integrated circuit
US8308036B2 (en) 2007-10-31 2012-11-13 Sankyo Seisakusho Co. Sheet material feeding apparatus

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