JPS63148297A - Liquid crystal display control circuit - Google Patents

Abstract

(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

DETAILED DESCRIPTION OF THE INVENTION [Object of the Invention] (Industrial Application Field) The present invention relates to a liquid crystal display control circuit for controlling the drive of a liquid crystal display device having a plurality of screens.

(Prior Art) FIG. 4 is a block diagram showing the configuration of a conventional liquid crystal display control circuit that drives a two-screen liquid crystal display device (hereinafter referred to as LCD). In the figure, 11 is an LCD controller, 12 is a video RAM (V-RAM), 13 is a character generator, 14 and 15 are each an LCD,
16 and 17 are column drivers, and 18 and 19 are row drivers.

In such a configuration, character codes are stored in the V-RAM 12 in advance, and the 12-bit refresh address MAO-
One character code consisting of 8-bit data DO to D7 is read out based on MA11. This character code is supplied to the character generator 13 as an upper address. Character generator 13 generates a character pattern corresponding to this upper address. As shown in Figure 5, this character pattern is, for example, 8 dots horizontally x 8 dots vertically.
Assume that it is made up of dots and consists of 8 lines in the horizontal direction. Therefore, from the character generator 13, L
Based on the 3-bit scanning addresses LAO to LA2 output from the CD controller 11, 8-bit data PD
One line of character patterns consisting of O-PD7 are sequentially output. The character pattern for each line is supplied to the LCD controller 11, and after receiving the output from this LCD controller 11, the column driver 16.17 and the row driver 18.19 output the character pattern to each L CD 1 of the two screens.
4.15 display control is performed.

By dividing the LCD into a plurality of screens and driving the display in this way, a decrease in display duty can be suppressed and a higher display contrast can be obtained than when using one large LCD.

Here, for example, each of the LCDs 14 and 15 has a screen of 512 dots horizontally and 100 dots vertically, as shown in Figure 6, and displays characters of 8 x 8 fonts (corresponding to the number of dots) in 64 horizontal characters x 125 lines. In this case, the lower 4 bits of the characters in the last line of one screen will be displayed on the second screen.

In this case, in order to perform control to prevent display omission, the first scan address of the first screen starts from the first line, that is, scan address 0, but the first scan address of the second screen starts from the fifth line, that is, scan address 0. We need to start at scan address 4.

For this reason, conventionally, it is necessary to provide a correction circuit within the CD controller 11 to correct the scanning address. Since this correction circuit needs to perform calculations, the circuit configuration becomes complicated, and the chip size becomes large when integrating the LCD controller.

(Problem to be Solved by the Invention) Conventionally, when displaying characters using a liquid crystal display device with multiple screens, the number of vertical dots on one screen corresponds to the vertical font of the character to be displayed. A correction circuit is required to correct the scanning address when it is no longer divisible by the number, which has the drawback of complicating the circuit and increasing the chip size when integrated.

The present invention has been made in consideration of the above circumstances, and an object thereof is to provide a liquid crystal display control circuit that does not require a correction circuit for correcting scanning addresses.

[Structure of the Invention] (Means and Effects for Solving the Problems) The liquid crystal display control circuit of the present invention includes a memory circuit for storing data, and a character pattern consisting of a plurality of lines corresponding to the data read from the memory circuit. A character pattern generating circuit outputs the above line by line based on the scanning address, the size of the characters to be displayed and the number of lines of characters to be displayed on the liquid crystal display II are set, and the memory circuit is addressed and the above A liquid crystal display control comprising a control circuit that generates a scanning address and controls character display on a plurality of liquid crystal display devices with a preset character size and number of lines based on the character pattern output from the character pattern generation circuit. In the circuit, the control circuit sets a vertical character size whose integral multiple matches the number of dots in the vertical direction of the liquid crystal display device, and among the addresses for specifying the address of the storage circuit, the liquid crystal display device An address that changes with one period corresponding to the number of characters that can be displayed in the horizontal direction is supplied to the character pattern generation circuit as the highest scanning address.

(Example) Hereinafter, one embodiment of the present invention will be described with reference to the drawings.

In FIG. 1, 11 is an LCD controller, 12 is a video RAM (v-RAM), 13 is a character generator, 14 and 15 are single-screen LCDs 116 and 17 drive each of the above-mentioned LCDs 14 and 15 in the column direction. Column driver, 18 and 19
This is a row driver that drives D14.15 in the row direction.

The LCD controller 11 can set the size of characters to be displayed on the two-screen LCD, that is, the number of horizontal and vertical fonts of characters, and the number of lines of characters to be displayed on the LCD, and can set a 12-bit refresh address. MAO～M
A11, 8 fonts wide x 8 fonts tall, 64 fonts wide
When displaying characters with 25 vertical lines, use 3-bit scanning addresses LAO to LA2, and when displaying characters of 8 fonts horizontally x 4 fonts vertically with 64 characters horizontally x 50 lines vertically, use 2-bit scanning addresses LAO. - Output LA1 respectively.

The V-RAM 12 stores in advance a character code consisting of 8-bit data Do to D7, and refresh addresses MA○ to M output from the LCD controller 11 are stored in advance.
Based on A11, the stored character codes are sequentially and repeatedly read out.

The character generator 13 stores character patterns, and the character code DO read from the V-RAM 12
By supplying -D7 as the upper address, one character pattern each consisting of 8 lines is selected. Then, the character generator 13 outputs this character pattern line by line based on the 3-bit scanning address LAO-LA2 or the 2-bit scanning address LAO-LA1 output from the LCD controller 11. Character pattern data PD◯ to PD7 for each line outputted from the character generator 13 are sequentially supplied to the LCD controller 11.

Each of the LCDs 14 and 15 has a screen of 512 dots horizontally and 100 dots vertically, similar to that shown in FIG.

Column driver 16.17 and row driver 18.
19 controls the display of each LCD 14.15, and the column driver 16.17 controls the LCD 14.15.
The character pattern output from the CD controller 11 is L.
When one horizontal line of each CD14 and CD15 is completed, the character pattern is supplied to the corresponding LCD. At this time, the row drivers 18 and 19 drive the corresponding rows of each LCD.

In the liquid crystal display control circuit of this invention, 8 fonts horizontally x 8 fonts vertically
Even when displaying font characters in 64 horizontal characters x 25 lines, the settings in the LCD controller 11 are set to display characters in 8 fonts horizontally x 4 fonts vertically as 64 characters horizontally x 150 lines, and instead of that, the character generator 13 The memory address MA6 is supplied to the highest scanning address LA2. In addition, V-
Since the memory address input to the RAM 12 is empty at MA6, the address of the upper bits is sequentially filled and supplied there.

Here, each screen is 512 dots horizontally and 100 dots vertically, and the duty is 1/100 LCD 14.15
Let us consider the case where characters of 8×8 font size are displayed in 64 horizontal characters×25 vertical lines on a two-screen LCD. 1
When displaying 25 lines on a 2-screen LCD with /100 duty, the vertical size of one character is 8 dots, so
As mentioned above, only the upper four dots of characters at the joint between the two screens are displayed, and the lower four dots disappear.

However, 8x8 font size characters are 1/100
When displaying on duty, 4 remain without being displayed.
Since it is a dot, the number of times one character is scanned is 4 instead of 8.
The duty can be reduced to 1/100 times. but,
In this case, characters of 8 fonts horizontally by 4 fonts vertically will be displayed.

Therefore, in this invention, by scanning one character four times, 64 horizontal characters x
Set to 50 lines vertically and set the number of vertical dots of characters to be displayed as 4.
50 times the number of vertical dots on the two-screen LCD, which is 200. 64 horizontal characters x 25 vertical characters by scanning 1 character 8 times
When the line is set, 3 bits are output from the LCD controller 11 as the scanning address, but when each character is scanned 4 times and set to 64 characters horizontally x 50 lines vertically, only 2 bits LAO and LAl are output as the scanning address. No output.

In this case, the character generator 13 will output only the upper four lines of character patterns for each character. Therefore, among the memory addresses MAO to MA11 for addressing the V-RAM 12, the LCD 14
．． 15 characters that can be displayed in the horizontal direction, that is, 6
Address MA that changes with the period corresponding to 4 as one cycle
6 is supplied to the character generator 13 as the highest scanning address LA2, one character is scanned eight times.

That is, as shown in FIG. 2, the character pattern selected by the outputs DO to D7 of the V-RAM 12 is sequentially displayed as lines (11, Q2, 1.3° In the eye scan, line J25.ρ6.λ71
The display is performed in the order of ℃8.

Thereby, in a two-screen LCD, even if the number of vertical dots on one screen is not exactly divisible by the number of vertical fonts of characters to be displayed, it is possible to prevent display gaps from occurring.

Figure 3 shows the memory address MAO-MA when the character on the 13th line, which is exactly the joint between the two LCD screens, is rAJ.
5. MA7 to MA 11.3-bit scanning address L
FIG. 7 is a diagram showing the relationship between AO, LA1, MA6, and output patterns PDO to PD7 from the character generator 13. When LAO-0°LA1-0, MA6-0, after the corresponding character pattern for one line is displayed, the refresh address MA changes to the address for selecting the next line of characters. , MA6 changes from "O" level to "1" level. Since this address is supplied to the character generator 13 as the highest scanning address LA2, the LCD controller 11 tries to display characters on different lines of 8 fonts x 4 fonts, but the character generator 13 Font×
The character pattern of the top line of the lower four lines in the same character as above in 8 fonts is output. Through this repetition, the letter "A" of 8 fonts x 8 fonts becomes 2
It is displayed on the 13th line, which is exactly the joint on the screen LCD.

As described above, according to the above embodiment, there is no need for a correction circuit for correcting the scanning address, and it is only necessary to change the settings and wiring connections in the LCD controller 11, thereby preventing the LCD controller 11 from becoming complicated. be able to. As a result, it is possible to prevent the chip size from increasing when integrating the LCD controller 11.

[Effects of the Invention] As described above, according to the present invention, it is possible to provide a liquid crystal display control circuit that does not require a correction circuit for correcting scanning addresses.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of a circuit according to an embodiment of the present invention, FIGS. 2 and 3 are diagrams for explaining the circuit of the embodiment, respectively, FIG. 4 is a block diagram of a conventional circuit, and FIG. 6 and 6 are diagrams for explaining the above-mentioned conventional circuit, respectively. 11... LCD controller, 12... Video RA
M. 13... Character generator, 14.15... Liquid crystal display device (LCD), 18.17... Column driver, 18, 19... Row driver. Applicant's representative Patent attorney Takehiko Suzue Figure 1 Figure 2 Figure 3 512 dots Figure 6

Claims (1)

[Claims] a memory circuit that stores data; a character pattern generation circuit that outputs a character pattern consisting of multiple lines corresponding to the data read from the memory circuit line by line based on a scanning address; The number of lines of characters to be displayed on the liquid crystal display device can be set, the storage circuit can be addressed and the scanning address can be generated, and the character size and character size can be set in advance based on the character pattern output from the character pattern generation circuit. In a liquid crystal display control circuit equipped with a control circuit for controlling character display in a plurality of liquid crystal display devices in terms of the number of lines, the control circuit controls vertical dots whose integral multiple corresponds to the number of dots in the vertical direction of the liquid crystal display device. The character size is set, and among the addresses for addressing the memory circuit, an address that changes with one period corresponding to the number of characters that can be displayed in the horizontal direction of the liquid crystal display device is sent to the character pattern generation circuit. A liquid crystal display control circuit characterized in that the circuit is configured to supply the scanning address as the highest scanning address.