JPS63146468A - Manufacture of semiconductor device - Google Patents

Abstract

PURPOSE:To prevent silicide part from being oxidized or exfoliated in an oxidation process or a heat treatment process by coating the whole surface with a nitride film before oxidation or heat treatment after forming a gate electrode of polycide structure. CONSTITUTION:After an oxide film 13 and a gate electrode 16 composed of polysilicon 14 and silicide 15 are formed on a silicon substrate 11, a silicon nitride film 17 is formed on the whole surface of the substrate 1 containing the gate electrode 16. After implanting ions for forming a source.drain region, a heat processing is performed in an oxygen atmosphere, the above implanted ions are activated, and the source.drain region 18 is formed. As the gate electrode 16 is coated with the nitride film 17 in this process, the silicide 15 of the electrode 16 can be prevented from being oxidized or exfoliated.

Description

DETAILED DESCRIPTION OF THE INVENTION (Field of Industrial Application) The present invention relates to a method of manufacturing a semiconductor element having a gate electrode having a polycide structure.

(Prior Art) A method of manufacturing a conventional MO8 type transistor having an f-) electrode with a raised side structure will be described with reference to FIG.

First, a thick field oxide film 2 is selectively formed on the surface of a silicon substrate 1 by the LOCO8 method, and the substrate 1 is separated into a field region and an active region (device region) (FIG. 2(a)). .

Next, a thin oxide film 3 is formed on the surface of the substrate 1 in the element region to become an insulating film (%f-), and 4 silicon 4 and silicide 5 are superimposed to form a gate electrode on the entire surface (second Figure (b)).

Next, gate photolithography and anisotropic etching are performed to leave the silicide 5 and polysilicon 4 only in the r-to region in the element region, thereby forming a gate electrode 6 having a polycide structure.

Further, the thin oxide film 3 is etched, leaving the oxide film 3 as a gate insulating film only under the dirt electrode 6 (FIG. 2(C)).

Next, round ion implantation is performed to form source/drain regions, and an impurity having a conductivity type opposite to that of the substrate, such as arsenic (Al), is implanted into the substrate regions on both sides of the electrode 6 (source/drain formation regions). K is introduced (Figure 2(d)).

Thereafter, a heat treatment is performed to activate the introduced arsenic ions, thereby forming a source/drain region 7 in the source/drain formation region in the element region of the substrate 1 (FIG. 2(e)).

After that, forming an intermediate insulating film, opening a contact hole,
Wiring formation, passivation film formation, MO8f
fi) Complete the run sister.

(Problems to be Solved by the Invention) However, in the conventional method as described above, the silicide in the gate electrode 6 is removed in the heat treatment step when forming the source/drain region 7 after forming the r-to-electrode 6. 5
There was a problem in that the silicide 5 was oxidized and, in some cases, the silicide 5 was peeled off as shown in FIG. 2(e). Note that this problem also occurs in an element manufacturing method that includes an oxidation step after forming a gate electrode having a polycide structure, during the oxidation step.

This invention was made in view of the above points, and its purpose is to eliminate the problem that the silicide in the dart electrode with a polycide structure is oxidized and peeled off during the oxidation or heat treatment process, and to manufacture good devices with a high yield. It is an object of the present invention to provide a method for manufacturing a semiconductor device that can be manufactured.

(Means for Solving the Problems) The present invention provides a method for manufacturing a semiconductor device that includes an oxidation or heat treatment step after forming a polycide structure gate electrode. Alternatively, before performing the heat treatment step, a step of forming a silicon nitride film on the entire surface of the substrate including the gate electrode may be introduced. If a silicon nitride film is formed over the entire surface of the substrate, the silicide of the r-to-electrode will be protected from oxidation by the silicon nitride film and will not be oxidized when an oxidation or heat treatment process is performed. Therefore, the silicide does not peel off.

(Example) An embodiment of the present invention will be described below with reference to FIG.

First, a thick field oxide film 1 of 4000 to 8000^ is formed on the surface of a P-type silicon substrate 110 by the LOCO8 method.
2 is selectively formed to separate the substrate 11 into a field region and an active region (device region) (FIG. 1(a)).

Next, a thin oxide film 13 with a thickness of about 200 to 300λ is formed on the surface of the substrate 11 in the element region to serve as a gate insulating film, and a polysilicon film 14 is further formed on the entire surface to form a gate electrode.
and silicide 15 are stacked on top of each other (FIG. 1(b)).

Here, the polysilicon 14 is formed to a thickness of 1000 to 3000λ by the CVD method, and the silicide 15 is formed to a thickness of 2000 to 3000λ.
It is formed to a thickness of 00λ by sputtering or CVD.

Next, gate photolithography and anisotropic etching are performed to leave the silicide 15 and polysilicon 14 only in the gate region in the element region, thereby forming a gate electrode 16 having a polycide structure. 1 more thin oxide film 1
3, and the oxide film 13 is etched as the gate electrode 16.
It is left as an r-t insulating film only under the (FIG. 1(C)).

Next, a silicon nitride film 17 is formed on the entire surface of the substrate 11, including on the gate electrode 16 of the polycide structure (the first
Figure (d)). Here, the silicon nitride film 17 is 200 to 5
It is formed to a thickness of 00λ by low pressure CVD.

Then, with the entire surface covered with the silicon nitride film 17,
Arsenic ion implantation to form source/drain regions (dose 6 to 8E15, acceleration voltage -40 to 50 K)
eV), and arsenic (As) is introduced into the substrate region (source/drain formation region) on both sides of the gate electrode 16 through the silicon nitride film 17 (FIG. 1(d)).

Thereafter, with the entire surface covered with the silicon nitride film 17, the
The introduced arsenic ions are activated by heat treatment for 10 minutes, thereby forming an N-type source/drain region 18 in the source/drain forming region in the element region of the substrate 11 (see FIG. 1(e). )).

At this time, the dirt electrode 16 is covered with a silicon nitride film 17, and therefore the silicide 15 of the gate electrode 16 is covered with a silicon nitride film 17.
is not oxidized and the silicide 15 is not peeled off.

Thereafter, a BPSG film 19 is formed as an intermediate insulating film over the entire region except for the silicon nitride film 17 by CVD (FIG. 1(f)). Furthermore, all 19 of the BPSG films are nitrided! A contact hole 20 is opened in 17417 (Fig. 1 (2)) and a wiring 21 is formed (Fig. 1 On).
), and on top of that, for example, a nitride film (not shown) as a ssipation film! Lasma enhanced CVD
By forming it by a method, a MO8O8 cylinder is formed.

Note that in the above embodiment, the silicon nitride film 17 was formed to prevent the silicide 15 of the gate electrode 16 from being oxidized in the heat treatment step when forming the source/drain regions. In such a device manufacturing method, the oxidation and peeling of the silicide 15 in the oxidation step are performed on the silicon nitride film 17.
This can be prevented.

(Effect of the invention) As detailed above, according to the manufacturing method of the present invention, -
After forming the gate electrode of the reside structure and before performing the oxidation or heat treatment process, a silicon nitride film should be formed on the entire surface of the substrate including the Y-T electrode. It is possible to reliably prevent the silicide from being oxidized and peeled off, and it is possible to manufacture good elements at a high yield.

Further, as in the embodiment, if ion implantation for forming source/drain regions is performed through the silicon nitride film for preventing oxidation, the silicon nitride film can prevent the substrate surface from being damaged by the ion implantation. . Therefore, in the past, an oxidation process was necessary to prevent damage, but
The oxidation step can be omitted.

Furthermore, if the silicon nitride film is left until the end as in the example, it is possible to prevent the semiconductor substrate from being damaged in the process of removing the silicon nitride film, and to simplify the process by omitting the removal process. can be achieved.

[Brief explanation of the drawing]

FIG. 1 is a process sectional view showing an embodiment of the method for manufacturing a semiconductor device according to the present invention, and FIG. 2 is a process cross-sectional view showing an example of the method for manufacturing a conventional MO 8-base transistor. ! FIG. DESCRIPTION OF SYMBOLS 11... P-type silicon substrate, 12... Field oxide film, 13... Thin oxide film, 14... Polysilicon, 15... Silicide, 16... Gate electrode, 17
...Silicon nitride film, 18...Source/drain region.

Claims (1)

[Claims] A method for manufacturing a semiconductor device comprising an oxidation or heat treatment step after forming a polycide-structured gate electrode on a semiconductor substrate, comprising: (a) selectively forming a thick field oxide film on the surface of the semiconductor substrate; After that, on the surface of the gate region in the element region of the substrate,
(b) forming a gate electrode with a polycide structure made of silicide and polysilicon by sandwiching the gate insulating film; (b) then, before performing an oxidation or heat treatment step, forming a silicon nitride film over the entire surface of the substrate including the top of the gate electrode; 1. A method for manufacturing a semiconductor device, comprising the steps of: forming a semiconductor device;