JPS6314500Y2 - - Google Patents

Description

[Detailed description of the invention] The present invention relates to a muting circuit that removes inter-office noise and detuning noise of an FM receiver, and in particular, the purpose is to provide a muting circuit that obtains good characteristics with a low voltage power supply. do.

The muting circuit of the present invention will be explained based on FIGS. 1 to 5. Note that common parts are given common symbols throughout the drawings.

FIG. 1 is a block diagram of an FM receiver equipped with a muting circuit M. In the figure, 1 is the front end, 2 is the intermediate frequency amplification stage, 3 is the FM detection stage, 4 is the demodulator, 5 is the AFC circuit (automatic frequency control circuit), and 6 is the muting signal for setting the muting band. Band setting circuit to obtain 7,
8 is a reference voltage source for setting a muting band, 9 is a low frequency amplifier, and 10 and 11 are speakers. The muting circuit M is supplied with an output a from the AFC circuit 5 and a reference voltage from reference voltage sources 7 and 8, and obtains a muting signal b. As shown in FIG. 2, the frequency amplitude characteristic of the output a of the FM detection stage 3 has an S-shaped characteristic. In addition, the reference voltage source 7
is the upper voltage P ₁ that sets the muting band
, and the reference voltage source 8 has a lower voltage P ₂ .
The shaded area in FIG. 2 is the detuned frequency region in which the muting circuit is driven so that no sound is output.

FIG. 3 is a diagram for explaining the muting circuit according to the present invention, in which the band setting circuit 6 is a differential amplifier.
It is formed from A ₁ and A ₂ . The reference voltage sources 7 and 8 are connected to the normal input terminals of the differential amplifiers A ₁ and A ₂ , respectively.
Their inverting input terminals are commonly connected and connected to the AFC circuit 5. a indicates the output of the AFC circuit 5,
b indicates the output from the differential amplifiers A ₁ and A ₂ .

Now, FIG. 4 is a specific circuit diagram of the muting circuit. The differential amplifier _A1 is formed by a pair of NPN transistors _Q1 , _Q2 , a load resistor _R5 , and an emitter resistor _R7 . The differential amplifier _A2 is formed from a pair of PNP transistors _Q3 , _Q4 , a load resistor _R6 and an emitter resistor _R8 . The base of the NPN transistor Q ₂ and the base of the PNP transistor Q ₄ are commonly connected to the terminal 12. Further, reference voltage sources 7 and 8 are connected to the bases of the NPN transistor Q ₁ and the PNP transistor Q ₃ , respectively. The reference voltages 7 and 8 are formed by diode-connected transistors Q ₁₂ and Q ₁₃ connected in series in a floating state by a current source circuit consisting of transistors Q ₁₀ , Q ₁₁ and Q ₁₄ , and Q ₁₅ . Dividing resistors R ₁ to _{R 4} are connected between the collectors of Q ₁₁ and Q ₁₅ . An upper reference voltage _P1 for setting the muting band is obtained from the connection point _K1 between the resistors _R1 and _R2 . Then, a lower reference voltage _P2 for setting the muting band is obtained from the connection point _K2 with the resistors _R3 and _R4 . Note that the terminal 14 is supplied with a reference voltage E ₁ which is one half of the power supply voltage V _CC , and the terminal 15 is supplied with a bias voltage E ₂ .
The connection point between the load resistance R ₅ and the collector of the transistor Q ₂ is connected to the base of the transistor Q ₆ , and the connection point between the collector of the transistor Q ₄ and the resistance R ₆ is connected to the base of the transistor Q ₅ .
The collector of transistor Q ₅ is connected to the base of transistor Q ₆ via a resistor R ₉ . The collector of transistor _Q6 is connected to the anode side of diode-connected transistor _Q8 . Transistor Q ₇ is biased by transistor Q ₈ to obtain a muting signal from terminal 13.

Now, with reference to FIG. 4, the operation of the muting circuit will be explained with reference to FIG. 2. terminal 12
When the output a of the AFC circuit 5 inputted to is higher than the voltage _P1 at the connection point _K1 , the NPN transistor _Q2 is turned on, biased by the voltage across the terminals of the resistor _R5 , and the transistor _Q6 is turned on. Then,
Muting signal b for setting the upper voltage _P1 of the muting band from transistor _Q7
is occurring. Furthermore, when the output a of the AFC circuit 5 is in the range ±Δ frequency detuned from the center frequency ₀ as shown in FIG _.
Since the base potential of the transistor _Q2 is lower than the potential of the reference voltage P1, the transistor _Q2 is turned off. Also,
In this state, transistor Q ₄ of PNP transistors Q ₃ and Q ₄ forming differential amplifier A ₂ is in an off state. When the output a falls below the voltage _P2 at the lower end of the muting band, the PNP transistor _Q4 is turned on. Therefore, the voltage across the terminals of the resistor _R6 turns on the transistor _Q5 , turning on the transistor _Q6 and generating the muting signal b from the transistor _Q7 . The low frequency amplifier 9 is controlled by this muting signal b to set a muting band. Note that the muting band is based on the reference voltage sources 7 and 8.
It can be set arbitrarily by adjusting the potential of .

Incidentally, one of the factors that hinders the operation of a transistor amplifier circuit with a low voltage source is voltage loss due to the voltage between the base and emitter of the transistor (approximately 0.6V). The mutating circuit of the present invention uses a differential amplifier that detects the upper voltage _P1 of the muting band in order to operate with a power supply voltage of 1.8 volts.
A ₁ is formed by an NPN transistor, and the lower voltage P ₂
The differential amplifier _A2 that detects the voltage is formed from a PNP transistor so that the base-emitter voltage does not act as a voltage loss. what if,
When PNP transistors Q ₃ and Q ₄ are formed of NPN transistors, the emitters of the NPN transistors
The base-to-base voltage (about 0.6 volts) and the voltage loss due to the emitter resistance are about 0.8 volts, so the differential amplifier will not operate unless this potential is exceeded.
Furthermore, when the power supply voltage is 1.8 volts, the reference voltage E ₁ at the midpoint is 0.9 volts, and there is only a voltage margin of 0.1 volts, making it extremely difficult to obtain stable operating characteristics. However, these problems can be solved by forming the differential amplifier _A2 with a PNP transistor as in the embodiment shown in FIG. That is, the PNP transistor Q ₄ is activated by a voltage where the base voltage of the PNP transistor Q ₄ is lower than the base voltage of the PNP transistor Q ₃ .
Furthermore, the base-emitter voltage of a PNP transistor does not act as a voltage loss.

FIG. 5 shows another embodiment of the present invention. Fourth
Differential amplifiers A ₁ and A ₂ are different from the embodiment shown in the figure. That is, the emitter resistors R ₇ and R ₈ are replaced by current source transistors Q ₂₀ and Q ₂₁ , and
The difference is that the load resistors R ₅ and R ₆ are replaced by diode-connected transistors Q ₂₂ and Q ₂₃ . The other circuits are substantially the same as those in FIG.

As described above, the muting circuit according to the present invention can provide a muting circuit that operates stably even with a low voltage source of 1.8 to 3 volts. Of course, it will still work even if the power supply voltage is 5 volts or more.

In addition, the reference voltage of the low-voltage power supply is obtained by dividing the voltage source based on the base-emitter voltage, and the reference voltage source is kept in a floating state by the current source circuit, so that the voltage source is obtained from the base-emitter voltage. An intermediate voltage is supplied as a reference voltage. Therefore, it is an extremely stable reference voltage source.

The muting circuit of the present invention includes a reference voltage source 7,
8 and the band setting circuit 6, it is possible to set an arbitrary muting band. Furthermore, it is possible to provide an excellent muting circuit for an FM receiver that operates with a low voltage source.

[Brief explanation of drawings]

Figure 1 is a block diagram of an FM receiver equipped with a muting circuit, and Figure 2 is the FM detection output S
FIG. 3 is a diagram showing an outline of the muting circuit according to the present invention, and FIG. 4 is a circuit diagram showing a specific embodiment of the muting circuit according to the present invention. . FIG. 5 shows another embodiment of the muting circuit. 5: AFC circuit, 6: Band setting circuit, 7, 8:
Reference voltage source, 9: low frequency amplifier circuit, M: mutating circuit, A ₁ , A ₂ : differential amplifier circuit.

Claims (1)

[Scope of utility model registration request] In the muting circuit of the FM receiver, from the first and second reference voltage sources having upper and lower voltages that set the muting band, a first differential amplifier consisting of a pair of NPN transistors, and a pair of PNP transistors. a second differential amplifier,
A first reference voltage source is supplied to one base of the NPN transistor, a second reference voltage source is supplied to one base of the PNP transistor, and the second reference voltage source is supplied to one base of the PNP transistor.
A muting signal for setting a muting band is obtained from the first and second differential amplifiers by supplying the output from the AFC circuit to the bases of the other of the NPN transistor and the PNP transistor, respectively. FM receiver muting circuit.