JPS63142454A - Semiconductor integrated circuit device - Google Patents

Abstract

PURPOSE:To easily generate a fixed address signal by providing each module circuit with a module decoder and an address decoder circuit and setting an address space of each module circuit. CONSTITUTION:A one-chip microcomputer consists of a microprocessor CPU, peripheral circuits (module circuits) I/O0-I/On, and module decoders MDEC which are provided to peripheral circuits I/O0-I/On in 1:1 and generate module selecting signals MS0-MSn. Logics of module decoders MDEC and fixed address information are changed to set/change address spaces assigned to respective peripheral circuits I/O0-I/On.

Description

[Detailed Description of the Invention] [Industrial Application Field] The present invention relates to a semiconductor integrated circuit device, and is used for addressing peripheral circuits in a one-chip microprocessor or microcomputer consisting of a microprocessor and its peripheral circuits, for example. It is about effective techniques.

[Conventional technology]

2. Description of the Related Art Multifunctional microprocessors equipped with a microprocessor and its peripheral circuits, such as a memory management mechanism, a direct memory access control circuit, and a timer circuit, are well known. Each of the above peripheral circuits should be provided with an address decoder that decodes the address space assigned to each. Regarding microprocessors with built-in peripheral circuits, for example, ■ Hitachi, Ltd., published in March 1985 rHD
64180 (CMO 38-bit microprocessor) User's Manual J is available.

[Problem that the invention seeks to solve]

The inventors prepared in advance a plurality of peripheral circuits (module circuits) each having standardized functions,
The idea was to form peripheral circuits that would be installed by combining them according to the customer's specifications. In this way, if it is possible to change the combination of peripheral circuits installed in a microprocessor to match the customer's specifications, the address decoders in each peripheral circuit installed in the microprocessor must be changed one by one.
Needs to be rebuilt. Rebuilding such an address decoder not only requires a large number of man-hours but also tends to cause logical errors. Therefore, a problem arises in that the number of man-hours for product development increases.

An object of the present invention is to provide a semiconductor integrated circuit device with improved versatility.

The above and other objects and novel features of the present invention will become apparent from the description of this specification and the accompanying drawings.

[Means for solving problems]

A brief overview of typical inventions disclosed in this application is as follows.

That is, in a semiconductor integrated circuit device consisting of one or more module circuits constituting a microprocessor and its peripheral circuits, in response to an address signal sent from the microprocessor, an address space corresponding to the address space assigned to each of the module circuits is assigned. a module decoder that forms a module selection signal or a plurality of module selection signals; an addition or subtraction circuit that receives an address signal supplied from the microprocessor and arbitrarily set fixed address information; and an output signal of the addition or subtraction circuit. and an address decoder circuit that receives the corresponding module selection signal are provided in each module circuit to set the address space of each module circuit.

[For production]

According to the above means, by changing the logic of the module decoder and changing the fixed address information, it becomes possible to easily set/change the address space allocated to each module circuit.

〔Example〕

FIG. 1 shows a block diagram of a one-chip microcomputer system to which the present invention is applied. Each circuit block in the figure is formed on one semiconductor substrate such as, but not limited to, single-crystal silicon using known semiconductor integrated circuit manufacturing techniques.

The one-chip microcomputer of this embodiment includes a microprocessor CPU, a peripheral circuit (module circuit) I
loo or I/On and their peripheral circuits■10
The module decoder MDEC generates module selection signals MSO to MSn, which are provided in one-to-one correspondence with 0 to I/On. These microprocessors CPU and each peripheral circuit l100 to I/
On are interconnected by an address bus AB, a data bus DB, and a control bus (not shown). The module decoder MDEC is coupled to the microprocessor CPU via the address bus AB. Although not particularly limited, the selection signal R'S and address signal of the internal circuit formed by the microprocessor CPU are sent to the module decoder MDEC via the address bus AB.
is supplied to

The above peripheral circuits 100 and 100 or I/Ons include, but are not limited to, a plurality of standard modular circuits having various functions such as a memory management unit, a direct memory access control circuit, a timer circuit, an A/D conversion circuit, etc. The circuits are installed by combining them according to the customer's specifications.

The microprocessor CPU and its peripheral circuits are well known, for example, from the rHD64180 (CMO 38-bit microprocessor) User's Manual J, and a detailed explanation of their internal configuration will be omitted.

The module decoder MDEC has each peripheral circuit l10
Module selection signals MSO to MSn according to the absolute address space assigned from 0 to I/On
form. As a result, the address space shown with diagonal lines in FIG. 3 is created for each peripheral circuit 1101 (MS
I) to I103l103().

On the other hand, each of the peripheral circuits r7oo to I/On is provided with an address selector SEL.

As the specific configuration of this address selector is shown in FIG. The adder circuit AU includes an adder circuit AU which receives a fixed address signal FA consisting of a plurality of bits formed by being connected to the adder circuit AU, and a decoder circuit DCR which receives the output signal of this adder circuit and the module selection signal R5. The above fixed address signal FA
are formed by forming wiring made of aluminum or the like to be selectively coupled to a ground line or a power supply voltage line for each terminal coupled to the one input terminal of the adder circuit AU. In addition to setting the address signal FA using such a wiring pattern, it may also be formed by selectively cutting fuse means made of polysilicon, for example. The adder circuit AU adds the fixed address signal FA to the address signal supplied from the address bus AB to form an address signal to be supplied to the decoder DCR, and performs a kind of address modification. Thereby, the address space set by the module decoder MDEC can be changed according to the address signal FA, as shown by the dotted line in the figure. For example, a peripheral circuit 110 (not shown)
0, if an address space that overlaps with the absolute address space designated by the module selection signal MSI is specified, in the peripheral circuit r101 (MSl), only the overlapping portion is specified by the setting of the address signal FA. Address space can be changed. Correspondingly, the address spaces of the other peripheral circuits 102 and 1103 are similarly shifted. In addition to such a shift of the overall address space, the address space of each peripheral circuit set by the module decoder MDEC is shifted in accordance with the address signal FA fixedly set for each address space. be able to.

The effects obtained from the above examples are as follows. (1) In a semiconductor integrated circuit device consisting of a microprocessor and its peripheral circuits or a plurality of module circuits, an address space assigned to each of the module circuits in response to an address signal sent from the microprocessor. a module decoder that forms one or more module selection signals corresponding to the above; an adder circuit that receives an address signal supplied from the microprocessor and fixed address information set arbitrarily; and an output signal of the adder circuit; An address decoder circuit that receives the corresponding module selection signal is provided in each module circuit to set the address space of each module circuit. As a result, the fixed address signals in each module circuit can be constructed in a very simple manner, and the effect that system settings/changes can be made only by changing the logic of the module decoder can be obtained.

(2) Due to (1) above, the address selector in each module circuit can be fixedly designed regardless of the address space to which it is assigned, which has the effect of improving versatility. .

(3) With (1) and (2) above, it is possible to significantly reduce the number of man-hours required for product development of a one-chip microcomputer having a peripheral circuit (module circuit) according to the customer's specifications.

Although the invention made by the present inventor has been specifically explained based on Examples above, the present invention is not limited to the above Examples, and it is possible to make various changes without departing from the gist thereof. Not even. For example, instead of using the adder circuit described above, the address signal supplied to the decoder OCR provided in each module circuit may be reduced by the address specified by the fixed address signal FA using a subtracter circuit. Further, the addition or subtraction circuit simply carries up or down N bits of the address signal supplied from the address bus AB in accordance with the fixed address signal FA, thereby creating an address space designated by the module decoders MDF and C. 2N
You may also change only that.

The present invention can be widely used in various semiconductor integrated circuit devices having microcomputer functions as well as one-chip microcomputers.

〔Effect of the invention〕

A brief explanation of the effects obtained by typical inventions disclosed in this book, Wi, is as follows. That is, in a semiconductor integrated circuit device consisting of one or more module circuits constituting a microprocessor and its peripheral circuits, in response to an address signal sent from the microprocessor, an address space corresponding to the address space assigned to each of the module circuits is assigned. a module decoder that forms one or more module selection signals; an adder circuit that receives an address signal supplied from the microprocessor and fixed address information set arbitrarily; and an output signal of the adder circuit and corresponding thereto. By providing each module circuit with an address decoder circuit that receives the module selection signal described above and setting the address space of each module circuit,
Since fixed address signals in each module circuit can be configured extremely easily, system settings/changes can be made only by changing the logic of the module decoder.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an embodiment of a one-chip microcomputer according to the present invention, FIG. 2 is a block diagram showing an embodiment of its address selector, and FIG. 3 shows an address space of a module circuit. FIG. 2 is a conceptual diagram for explaining settings. CPU...Microprocessor, ■10O~I/On
・・Peripheral circuit (module circuit), MDEC・・Module decoder, SEL・・Address selector, AU・・
Addition circuit, DCR...decoder Figure 1 Figure 2 Figure 3

Claims (1)

[Scope of Claims] A microprocessor constituting a one-chip microcomputer, one or more module circuits constituting its peripheral circuits, and each of the module circuits receiving an address signal sent from the microprocessor. a module decoder that forms one or more module selection signals corresponding to an address space allocated to the module;
an addition or subtraction circuit provided in each of the module circuits and receiving an address signal supplied from the microprocessor and arbitrarily set fixed address information; and a corresponding addition or subtraction circuit provided in each of the module circuits. 1. A semiconductor integrated circuit device comprising: an address decoder circuit that receives an output signal of and the corresponding module selection signal. 2. The above module circuit is one of a plurality of module circuits having respective functions that have been standardized and prepared in advance.
2. The semiconductor integrated circuit device according to claim 1, wherein the semiconductor integrated circuit device is built-in according to a user's combination designation.