JP2730287B2 - Microcomputer - Google Patents

Description

Description: BACKGROUND OF THE INVENTION 1. Field of the Invention The present invention relates to a chip layout of a single-chip microcomputer, and more particularly, to a single-chip microcomputer incorporating a plurality of functional circuits requiring a plurality of clock signals having different frequencies. Chip layout.

[Conventional technology]

The conventional chip layout of a single-chip microcomputer having a plurality of timer circuits as a functional circuit requiring a plurality of clock signals having different frequencies is the second.
The configuration was as shown in the figure.

In FIG. 2, a CPU 21, a frequency dividing circuit 23, a first timer circuit 2
4, the first clock signal selector 25, the second timer circuit 26, the second
The clock signal selector 27, the third timer circuit 28, and the third clock signal selector 29 are built in the single-chip microcomputer 30.

 Next, the operation will be described.

Basic clock signal f _x is supplied to the CPU 21, along with operating the CPU 21, it is also supplied to the frequency divider 23. The frequency dividing circuit 23 generates a clock signal having a frequency of f _x / 2 ⁿ (n is the number of frequency dividing stages). In FIG. 2, since it is an 8-stage frequency dividing circuit,
_{f x / 2, f x /} 4, f x / 8, f x / 16, f x / 32, f x / 64, f x / 128, f x / 256 8 kinds of different frequencies of clock signals generated I do.

The first timer circuit 24, the first clock signal selector 25, the second
A timer circuit 26, a second clock signal 27, a third timer circuit 28,
The third clock signal selectors 29 are each connected to the microcomputer 21 via the data bus 22.

A timer circuit built into a single-chip microcomputer generally counts a clock signal of a predetermined frequency and gives an interrupt to a CPU when a set time is reached, or outputs a pulse at a set time interval. Circuit.

The bit length of the timer circuit is generally fixed. Therefore, in order to set the setting time widely, the count clock can be selected from a plurality of clock signals having different frequencies.

In Figure 2, f _x / 2 as the count _{clock, f x / 4, f x} /
_{8, f x / 16, f} x / 32, f x / 64, f x / 128, f x / 8 kinds of clock signals having different frequencies 256 are prepared, the microcomputer in the first clock signal selector 25 , One of the clock signals is selectively output and input to the timer circuit 1:24 as a count clock.

Similarly, the count timers of the second timer circuit 26 and the third timer circuit 29 can be independently selected from eight types of clock signals.

[Problems to be solved by the invention]

In this conventional single-chip microcomputer, a timer circuit and a clock signal selector are laid out as a pair, and the respective clock signal selectors are separated from each other, and a clock signal required for each clock signal selector is input. Therefore, there is a problem that the number of wirings on the chip increases and the chip size increases.

[Means for solving the problem]

The microcomputer of the present invention includes a plurality of functional circuits that require a plurality of clock signals having different frequencies, a frequency divider circuit that generates a plurality of clock signals having different frequencies,
A plurality of clock signal selection circuits for receiving a plurality of clock signals having different frequencies of the frequency divider circuit and selectively outputting a clock signal required by the functional circuit from the plurality of clock signals; and the plurality of clock signal selection circuits And a means for supplying the output to the corresponding function circuit, wherein the plurality of clock signal selection circuits are provided in proximity to the frequency dividing circuit.

〔Example〕

 Next, the present invention will be described with reference to the drawings.

FIG. 1 is a configuration diagram of a chip layout according to an embodiment of the present invention. The CPU 1, the frequency divider 3, the first timer circuit 4, the first clock signal selector 5, the second timer circuit 6, the second clock signal selector 7, the third timer circuit 8, and the third clock signal selector 9 are single-chip microcomputers. Built in 10. The turning operation is the same as the conventional example.

In Figure 1, the dividing circuit _{3 f x / 2, f x} / 4, f x / 8, f x
_{/ 16, f x / 32,} f x / 64, f x / 128, f x / 256 8 kinds of different frequencies of the clock signal is output, the first clock signal selector 5, a second clock signal selector 7, the It is input to a three-clock signal selector 9. The first clock signal selector 5,
The second clock signal selector 7 and the third clock signal selector 9 are arranged in a concentrated manner.

The output of the first clock signal selector 5 is input to the first timer circuit 4 and becomes the count clock of the first timer circuit 4. Similarly, the output of the second clock signal selector 7 becomes the count clock of the second timer circuit 6,
The output of the clock signal selector 9 becomes the count clock of the third timer circuit 8.

Generally, a single-chip microcomputer is
In many cases, a plurality of functional circuits that require a plurality of clock signals having different frequencies are incorporated, and these functional circuits are separated from each other in layout. Also, in order to improve the function of this functional circuit, it has become important to be able to select a clock signal from more clock types. In the present invention, the clock signal selectors 5, 7, and 9 for selecting a plurality of clock signals having different frequencies are intensively arranged on a chip layout.

In this embodiment, there are eight clock signals of different frequencies,
Since there are three timer circuits, the number of wires on the chip can be reduced from eight to three.

〔The invention's effect〕

As described above, the present invention provides a frequency dividing circuit for generating a plurality of clock signals having different frequencies, a plurality of clock signal selecting circuits for selecting and outputting one clock signal from the plurality of clock signals having different frequencies. In a single-chip microcomputer including a plurality of functional circuits, arranging the plurality of clock signal selection circuits intensively on a chip layout has the effect of reducing the number of wires and reducing the chip size.

[Brief description of the drawings]

FIG. 1 is a layout configuration diagram of a single-chip microcomputer according to one embodiment of the present invention, and FIG. 2 is a layout configuration diagram of a conventional single-chip microcomputer. 1,21 CPU, 2,22 Data bus, 3,23 Frequency divider, 4,24 Timer circuit 1,5,25 Clock signal selector 1,6,26 Timer circuit 2, 7, 27 clock signal selector 2, 8, 28 timer circuit 3, 9, 29 clock signal selector 3, 10, 30 single chip microcomputer.

Claims (2)

(57) [Claims] 1. A plurality of functional circuits requiring a plurality of clock signals having different frequencies, a frequency dividing circuit for generating a plurality of clock signals having different frequencies, and a plurality of clock signals having different frequencies of the frequency dividing circuit. A plurality of clock signal selection circuits that select and output a clock signal required by the functional circuit from the plurality of clock signals as an input; and a unit that supplies outputs of the plurality of clock signal selection circuits to the corresponding functional circuits. Wherein the plurality of clock signal selection circuits are provided in proximity to the frequency dividing circuit. 2. The microcomputer according to claim 1, wherein said plurality of clock signal selection circuits are provided closer to said frequency dividing circuit than said plurality of function circuits.