JPS63140737U

JPS63140737U -

Info

Publication number: JPS63140737U
Application number: JP3271287U
Authority: JP
Priority date: 1987-03-06
Filing date: 1987-03-06
Publication date: 1988-09-16

Description

[Brief explanation of the drawing]

第１図はこの考案の一実施例によるアナログ・
デイジタル変換回路を示す回路図、第２図はこの
発明の一実施例によるアナログ・デイジタル変換
回路に故障が発生していない状態を示す波形図、
第３図はこの発明の一実施例によるアナログ・デ
イジタル変換回路の故障検出回路に故障が発生し
た状態を示す波形図、第４図は従来のアナログ・
デイジタル変換回路を示す回路図、第５図は従来
のアナログ・デイジタル変換回路の動作を示す波
形図である。図において、８は一致検出回路、９はデータ設
定回路、１０はＡＮＤ回路、１１はワンシヨツト
タイマ回路である。なお、図中同一符号は同一部
分を示す。 Figure 1 shows an analog
A circuit diagram showing a digital conversion circuit; FIG. 2 is a waveform diagram showing a state where no failure has occurred in the analog-to-digital conversion circuit according to an embodiment of the present invention;
FIG. 3 is a waveform diagram showing a state in which a failure occurs in the failure detection circuit of an analog-to-digital conversion circuit according to an embodiment of the present invention, and FIG.
FIG. 5 is a circuit diagram showing a digital converter circuit. FIG. 5 is a waveform diagram showing the operation of a conventional analog-to-digital converter circuit. In the figure, 8 is a coincidence detection circuit, 9 is a data setting circuit, 10 is an AND circuit, and 11 is a one-shot timer circuit. Note that the same reference numerals in the figures indicate the same parts.

補正昭６２．６．９図面の簡単な説明を次のように補正する。明細書の第１１頁第１０行と第１１行の間に「
４．図面の簡単な説明」を挿入する。Amendment June 9, 1982 The brief description of the drawing is amended as follows. Between line 10 and line 11 on page 11 of the specification, “
4. Insert a brief description of the drawing.

Claims

[Scope of utility model registration request]

In an analog-to-digital conversion circuit that inputs a large number of analog data, converts the analog data into digital data in a time-sharing manner, and outputs the same, reference analog data having a constant value is input to one of the large number of analog data inputs. is input, and each time the reference analog data is accessed in a time-sharing manner, it is always compared with reference digital data having a value equal to the digital conversion value of the reference analog data, and if the comparison results do not match, a fault signal is issued. An analog-to-digital conversion circuit characterized by outputting.