JPS63139208A - Movement detection circuit - Google Patents

Abstract

PURPOSE:To detect the characteristic of the movement of the limbs of a person, by a method wherein the acceleration signal from the acceleration sensor mounted to the person is integrated on the basis of a characteristic period to be converted to a speed signal which is, in turn, integrated to be converted to a distance signal. CONSTITUTION:When an acceleration signal AI is supplied to a phase shift/peak detection circuit 16, an output signal U rises and falls at the time when the amplitude of the signal AI becomes the max. value. When the signal U rises, the output signal DL of a delay circuit 22 rises and falls so as to delay by a predetermined time from the falling of the signal U. During a time when the signal DL is a '1' signal, lead relays 6, 13 are excited to become an open state. During this time, the signal AI is integrated by an integration circuit 2 to output a signal DV. Since the signal DV is integrated over an acceleration increase period, said signal DV shows the max. speed at the point of time when the acceleration increase period of an article to be measured is finished. The signal DV is integrated by an integration circuit 8 to output a signal DD. The signal DD shows the moving distance of the article to be measured until acceleration becomes max. As mentioned above, since integration is performed during the characteristic (acceleration increase) period of the signal AI, the characteristic of operation can be detected.

Description

DETAILED DESCRIPTION OF THE INVENTION [Industrial Application Field] The present invention relates to a dynamic state detection circuit suitable for use in detecting, for example, the speed and amount of movement of a human's right hand.

[Prior Art] In recent years, there has been an increasing demand for converting body axidins into musical sounds, and for this reason, there has been a demand for the development of dynamic detection circuits that detect movements of hands and feet.

[Problems to be Solved by the Invention] However, no device for detecting human movements has been made in the past.

Therefore, an object of the present invention is to provide a dynamic detection circuit that detects the characteristics of human hand and foot movements.

[Means for Solving the Problems] The present invention includes a first integration circuit that integrates an acceleration signal output from an acceleration sensor and converts it into a speed signal, and a first integration circuit that integrates this speed signal and converts it into a distance signal. a second integration circuit; and an integration period control circuit that extracts a characteristic period of the acceleration signal and controls integration operations of the first integration circuit and the second integration circuit based on the extracted characteristic period. It is characterized by the following:

[Operation] According to the above configuration, the integral period control circuit extracts the characteristic period from the acceleration signal. Further, the integration period control circuit causes the first integration circuit and the second integration circuit to perform the integration operation only during the characteristic period of the acceleration signal. As a result, within the characteristic period of the acceleration signal, the first integrating circuit integrates the acceleration signal and converts it into a speed signal, and the second integrating circuit integrates the speed signal output from the first integrating circuit. Convert to distance signal.

[Embodiment] An embodiment of the present invention will be described below with reference to the drawings.

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention. The embodiment shown in this figure is a circuit that integrates an output signal supplied from an acceleration sensor and outputs a signal corresponding to the speed and moving distance of an object to be measured.

In Fig. 1, 1 is an acceleration sensor Sλ (piezoelectric type, etc.)
This is an input terminal to which the acceleration signal AI output from the input terminal is supplied.

3 is an operational amplifier, a resistor 4 is inserted between the inverting input terminal of the operational amplifier 3 and the input terminal 1, and a resistor 4 is inserted between the inverting input terminal and the output terminal of the operational amplifier 3. A capacitor 5 is inserted. The operational amplifier 3 has its non-inverting input terminal 4 grounded, and its output terminal is connected to the inverting input terminal of the operational amplifier 9 via a resistor 11, as well as to the terminal 7.
It is connected to the. The above-described operational amplifier 3, resistor 4, and capacitor 5 constitute an integrating circuit 2. Further, contact portions of a reed relay 6 are connected in parallel to both ends of the capacitor 5.

Next, 8 is an integrating circuit consisting of an operational amplifier 9, a resistor 11, and a capacitor 12, and has the same circuit configuration as the above-mentioned integrating circuit 2. The output end of this integrating circuit 8 is connected to a terminal 14. Further, contact portions of a reed relay 13 are connected in parallel to both ends of the capacitor 12. One end of each relay coil of the reed relay 13 and the reed relay 6 described above is connected to the output end of the delay circuit 22, and the other end is grounded. Further, semiconductor switches may be used instead of reed relays 6 and 13.

The above-mentioned integration circuits 2 and 8 constitute a data conversion section CHN.

Next, 17 is a comparator, and this comparator 17 has a non-inverting input terminal connected to input terminal 1 via a resistor 18, and an inverting input terminal connected to the input terminal 1 via a capacitor 20 and grounded via a resistor 19. Connected to input terminal 1. in this case,
A resistor 19 and a capacitor 20 constitute an integrating circuit, which delays the acceleration signal AI to generate a signal Ald. Comparator 17
The output terminal of is connected to the input terminal T of the flip-flop 21 and to the input terminal of the delay circuit 22.

The comparator 17, the resistors 18 and 19, and the capacitor 20 constitute a phase shift/beak detection circuit 16.

This phase shift/beak detection circuit 16 compares the acceleration signal AI supplied to the input terminal l with a signal AId obtained by delaying this acceleration signal AI, and outputs a pulse signal corresponding to the comparison result. be. For example, in Figure 2 (
When the acceleration signal AI is supplied to the input terminal l at time t0 as shown in b), this acceleration signal AI is applied to the resistor 18.
The signal AId is supplied to the non-inverting input terminal of the comparator 17α through the inverting input terminal of the comparator 17, and is also delayed by an integrating circuit consisting of a resistor 19 and a capacitor 20, and is supplied to the inverting input terminal of the comparator 17 as a signal AId. As a result, acceleration signal AI and signal A
Id is compared by the comparator 17, and the time when the acceleration signal AI becomes larger than the signal AId [. From 1. Until then, “
l” signal.

In this case, as shown in the figure, the time clock 〇 is the acceleration signal AI
Very close to the peak hours (also the time of day).

That is, since the signal Ald is a delayed signal of the acceleration signal AI, the time when the signal AId becomes larger than the acceleration signal AI is later than the peak time of the acceleration signal AI, but the delay time of the signal AId is By appropriately selecting a small value, the time at which the signal Aid becomes larger than the signal AI can be made approximately equal to the peak time of the acceleration signal AI.

In this way, the comparator 1 shown in FIG.
The output signal U of 7 rises to "L".

Next, the flip flop 21 inverts its output every time the input signal falls. The flip-flop 21 has its output terminal Q connected to a terminal 23 and its reset input terminal R connected to a terminal 24. In this case, the signal IR output from the output terminal Q of the flip-flop 21 is supplied to an external device. Further, the external device outputs a reset signal RES to reset the flip-flop 21 when the signal IR rises to the "L" level.

The delay circuit 22 is a circuit that delays the fall time of the output signal U to widen the pulse width. In this case, delay circuit 2
The output signal DL output from the input signal 2 is set to be delayed by 20 to 100 μsec from the fall time of the input signal.

The above-mentioned phase shift/beak detection circuit 16 and delay circuit 2
2 and flip-flop 21 constitute a data control unit CTL.

Next, the operation of this embodiment will be explained with reference to the waveform diagram in FIG.

When acceleration signal A+ is supplied to input terminal l, this acceleration signal AI is transmitted to data control unit CTL and data conversion unit CHN.
simultaneously supplied to

First, the circuit operation of the data control unit CTL will be explained.

When the acceleration signal AI is supplied to the phase shift/beak detection circuit 16 via the input terminal l at time t0 shown in FIG.
The output signal U from the phase shift/beak detection circuit 16 at
At time t, when the amplitude of the acceleration signal AI becomes the maximum value, the output signal U falls to the "0" signal. At the same time j+ when this output signal U falls to the "0" signal, the signal IR at the output terminal Q of the flip-flop 21
rises to the "L" signal and is supplied to the external device via the output terminal 23. As a result, the reset signal RES from the external device is supplied to the reset terminal R of the flip-flop 21 via the input terminal 24, and the signal IR of the flip-flop 21 falls to a "0" signal. Also, the output signal U is “l”
When the double signal rises, the output signal DL of the delay circuit 22 becomes “
1" signal rises. The "I" signal period of this output signal DL is 20 to 100 μs after the output signal U falls.
cContinues. The relay coils of reed relays 6 and 13 are excited while the output signal DL is a "1" signal (time to tz). As a result, the contacts of reed relays 6 and 13 become open during time to-ts.

Next, the circuit operation of the data converter CHH will be explained.

Integrating circuits 2 and 8 in data converter CHN do not operate as integrating circuits while reed relays 6 and 13 are in the closed state, but when acceleration signal AI is supplied at time t0, the contacts of reed relays 6 and 13 is open, so
Integrating circuit 2 and integrating circuit 8 start an integrating operation. That is, the integration circuit 2 is at time t. -t5, the acceleration signal AI is integrated and an output signal DV is output. Since this output signal DV integrates the acceleration signal AI over the acceleration increase period jo t+, it indicates the maximum velocity of the object to be measured at the end of the acceleration increase period. Further, the integrating circuit 8 outputs the output signal DL of “1”.
° During the period when the output signal DV of the integrating circuit 2 is
is integrated and outputs an output signal DD. This output signal DD
Since DV integrates the velocity signal DV, it indicates the distance traveled by the object to be measured until the acceleration reaches its maximum.

As described above, according to this embodiment, the characteristic period is captured from the acceleration signal output from the acceleration sensor 5ilL attached to the fixed object, and is integrated in this characteristic period (acceleration increase period). Features can be detected.

In addition, in determining the moving speed and moving distance of the object to be measured, a simple circuit (in the embodiment of the present invention, three operational amplifiers, one flip-flop, and several other resistors) is used.
(capacitors, reed relays), and costs can be reduced.

Note that, for example, the musical tone generator 25 shown in FIG. 3 may be used as the external control device in the above embodiment. The operation will be explained below.

In the figure, when the output signal In is supplied from the flip-flop 21 to the CPU 30 as an interrupt signal, CP(J
3O supplies the flip-flop 21 reset signal RES. On the other hand, the A/D converters (analog/digital conversion circuits) 26 and 27 output the output signal D at the same time as the output time of the reset signal RES (time 11 shown in FIG. 2).
The output signals DV and DD are converted into digital values by the A/D converters 26 and 27, and are stored in the registers 28 and 29, and then sent to the data bus 31. The data is read into the CPU 30 via the program. CPU 30 reads data in registers 28 and 29 and supplies these read data to sound generator 32 via data bus 31. in this case,
The CP'U 30 supplies the data in the register 28 as volume control data and the data in the register 29 as pitch control data to the sound generator 32. As a result, the sound generator 32 supplies a musical tone signal having tone 1 and pitch corresponding to the output signals DV and DD to the sound system 33-. Koi 1. From ζ5-, the sound system 33 outputs the output signals DV and DD from the speaker 34.
A musical tone corresponding to the sound is generated.

In addition, as for the meaning of the output signals DV, DD, there are other application examples as follows. For example, the output signal DV
Let be a signal to control the resist, and let output signal 1)D be a signal to control the tone (flute, piano, etc.).

Note that "registration" refers to presetting of various levers and the like on the operation panel in order to determine the timbre of musical tones.

Further, when the register is controlled by a change in the output signal DV, the register is changed to a different register depending on changes in human motion, etc., so that a new musical sound effect different from an intentional registration by manual operation can be obtained.

[Effects of the Invention] As explained above, according to the present invention, there is provided a first integrating circuit that integrates an acceleration signal output from an acceleration sensor and converts it into a speed signal, and a first integrating circuit that integrates this speed signal and converts it into a distance signal. A second integrating circuit converts the acceleration signal, extracts a characteristic period of the acceleration signal, and converts the acceleration signal into the second integral circuit based on the extracted characteristic period.
Since the second integrating circuit includes the integrating circuit and the integrating period control circuit that controls the integrating operation of the second integrating circuit, characteristics of the operation of the object to be measured can be detected.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing the configuration of an embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the operation of the embodiment.
FIG. 3 is a block diagram showing the configuration of a musical tone generating device using the dynamic state detection circuit shown in the same embodiment. 2.8... Integrating circuit (first integrating circuit, second integrating circuit), 6.13... Reed relay, 16... Phase shift/beak detection circuit, 22... Delay circuit (or more) 6.
13.16.22 is an integration period control circuit), AI...acceleration signal, Sa...acceleration sensor.

Claims (1)

[Claims] A first integrating circuit that integrates an acceleration signal output from an acceleration sensor and converts it into a speed signal, a second integrating circuit that integrates this speed signal and converts it into a distance signal, and a characteristic period of the acceleration signal. A dynamic detection circuit comprising: an integration period control circuit that extracts and controls integration operations of the first integration circuit and the second integration circuit based on the extracted characteristic period.