JPS63128654A - Semiconductor device mounting body - Google Patents

Semiconductor device mounting body

Info

Publication number
JPS63128654A
JPS63128654A JP27451586A JP27451586A JPS63128654A JP S63128654 A JPS63128654 A JP S63128654A JP 27451586 A JP27451586 A JP 27451586A JP 27451586 A JP27451586 A JP 27451586A JP S63128654 A JPS63128654 A JP S63128654A
Authority
JP
Japan
Prior art keywords
leads
socket
semiconductor device
main body
substrate
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP27451586A
Other languages
Japanese (ja)
Inventor
Hiroshi Nonoguchi
野々口 博
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Panasonic Holdings Corp
Original Assignee
Matsushita Electric Industrial Co Ltd
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Matsushita Electric Industrial Co Ltd filed Critical Matsushita Electric Industrial Co Ltd
Priority to JP27451586A priority Critical patent/JPS63128654A/en
Publication of JPS63128654A publication Critical patent/JPS63128654A/en
Pending legal-status Critical Current

Links

Abstract

PURPOSE:To prevent a semiconductor device from breaking down due to erroneous fixation by a method wherein the interval between two adjoining leads among multiple leads is differentiated from the arrayal intervals of other leads while engaging grooves to be engaged with said leads are provided on a socket. CONSTITUTION:Two leads 4a, 4b among other leads 4 are arranged at different interval from that of other leads 4 in a semiconductor device main body 3 while engaging grooves 6 corresponding to the leads 4 are provided in a socket 5 to fix the main body 3. The main body 3 is oriented in the specific direction not to be fixed in the erroneous direction. On the other hand, the socket 5 is provided with socket leads 7 corresponding to the leads 4 while a substrate 8 whereon the socket 5 is fixed is provided with engaging holes 9 in arrayal corresponding to the socket leads 7 so that the socket 5 may be fixed on the substrate 8 to orient the socket 5 and the substrate 8 in the specific direction.

Description

【発明の詳細な説明】 産業上の利用分野 本発明は電子回路に用いる半導体装置実装体に関するも
のである。
DETAILED DESCRIPTION OF THE INVENTION Field of Industrial Application The present invention relates to a semiconductor device package used in an electronic circuit.

従来の技術 一般にこの種の半導体装置実装体における半導体装置の
構成については、たとえば特開昭69−22352号公
報に示されるようなものが知られており、第2図に示す
ように構成されていた。第2図において、1は半導体装
置本体(以下本体という)で、この本体1の内部には半
導体素子が配設されていた。前記本体1の側面からはリ
ード2が導出され、かつこれらのリード2のなかで相対
向する側面の中央のリード2のリード間隔は、他のリー
ド間隔より広く配設されていた。すなわちリード2aと
リード2bとのリード間隔は他のリード間隔よりも広く
配設されていた。
BACKGROUND ART In general, the structure of a semiconductor device in this type of semiconductor device package is known, for example, as shown in Japanese Patent Application Laid-Open No. 69-22352, and the structure is as shown in FIG. Ta. In FIG. 2, reference numeral 1 denotes a semiconductor device main body (hereinafter referred to as main body), and inside this main body 1, semiconductor elements were arranged. Leads 2 are led out from the side surfaces of the main body 1, and among these leads 2, the interval between the leads 2 at the center of the opposing sides is wider than the intervals between the other leads. That is, the lead interval between the lead 2a and the lead 2b was wider than the other lead intervals.

発明が解決しようとする問題点 しかしながら上記従来の構成においては、前記半導体装
置本体1を直接半導体基板に装着し、かつ半田付けする
場合、前記リード2aとリード間隔が他のリード間隔と
異なっていたとしても、半導体基板側の嵌合穴はそれに
対応した形で設けられるため、半導体装置本体1の方向
づけを失うことなく、両者を嵌合させることができるも
のの、前記半導体装置本体1を一般に市販されているソ
ケットを介して半導体基板に装着する場合、一般に市販
されているソケットの嵌合溝は等間隔に設けられている
ため、前記半導体装置本体1をソケノトに装着すること
ができなかった。
Problems to be Solved by the Invention However, in the above conventional configuration, when the semiconductor device main body 1 is directly attached to a semiconductor substrate and soldered, the distance between the leads 2a and the leads is different from the distance between the other leads. However, since the fitting hole on the semiconductor substrate side is provided in a corresponding shape, the two can be fitted together without losing the orientation of the semiconductor device body 1. When mounting the semiconductor device main body 1 on a semiconductor substrate through a socket, the fitting grooves of commercially available sockets are provided at equal intervals, so the semiconductor device main body 1 cannot be mounted on the socket.

本発明は上記従来の問題点を解決するもので、誤装着が
発生することがなく、製品信頼性に優れた半導体装置実
装体を提供することを目的とするものである。
The present invention solves the above-mentioned conventional problems, and aims to provide a semiconductor device package that is free from erroneous mounting and has excellent product reliability.

問題点を解決するだめの手段 上記目的を達成するために本発明の半導体装置実装体は
、半導体装置本体の長手方向の両端部に複数個のリード
を配設した半導体装置と、この半導体装置を着脱自在に
装着するソケットとを有し、前記複数個のリードの隣り
合う2本のリードの間隔を、他のリードの配列間隔と異
ならせ、かつ、これらのリードが嵌合する嵌合溝を前記
ソケットに設けたものである。
Means for Solving the Problems In order to achieve the above object, the semiconductor device package of the present invention includes a semiconductor device in which a plurality of leads are arranged at both longitudinal ends of the semiconductor device body, and a semiconductor device including the semiconductor device. a removably mounted socket, the spacing between two adjacent leads of the plurality of leads is different from the arrangement spacing of the other leads, and a fitting groove into which these leads fit is provided. This is provided in the socket.

作  用 上記構成によれば、リードのうちの2本の配列間隔を他
のリードの配列間隔と異なる間隔としたために、半導体
装置に特定の方向づけを持たせることができ、さらにこ
の半導体装置のリードに対応した嵌合溝をソケットに設
けた構成としたために、半導体装置の方向づけを失わせ
ることなく、前記半導体装置をソケットに装着すること
が可能となる。
According to the above configuration, since the arrangement spacing of two of the leads is set to be different from the arrangement spacing of the other leads, the semiconductor device can be given a specific orientation, and furthermore, the leads of this semiconductor device can be given a specific orientation. Since the socket is provided with a fitting groove corresponding to the above, it is possible to mount the semiconductor device in the socket without losing the orientation of the semiconductor device.

実施例 以下、本発明の一実施例について第1図を参照しながら
説明する。
EXAMPLE Hereinafter, an example of the present invention will be described with reference to FIG.

図において、3は半導体装置本体(以下本体という)で
、この本体3の長手方向の両側部に複数個のリード4が
配設されている。このリード4の内のリード4aとリー
ド4bとの配列間隔L1は、他のリード4、たとえばリ
ード4bとり−ド4Cとの配列間隔L2とは異なる間隔
に配設され、かつL  =KxL2(Kは正数)を満足
することのない間隔に設定されている。前記本体3は、
ソケット6に着脱自在に装着され、このソケット5の上
部には、前記リード4を嵌着する嵌合溝6が、リード4
に対応して配設されている。この嵌合溝6には、ソケッ
トリード7がそれぞれ取り付けられており、嵌合溝6に
おいてリード4と当接するとともに、ソケット6の下面
から下方に突出している。前記ソケット6は基板8に装
着される。この基板8には前記ソケットリード7を嵌合
される嵌合孔9が配設され、この嵌合孔9はソケッ)I
J−ドアに対応する配列を有している。
In the figure, 3 is a semiconductor device main body (hereinafter referred to as main body), and a plurality of leads 4 are arranged on both sides of this main body 3 in the longitudinal direction. The arrangement interval L1 between the lead 4a and the lead 4b among the leads 4 is different from the arrangement interval L2 between the other leads 4, for example, the lead 4b and the lead 4C, and L=KxL2(K is a positive number). The main body 3 is
The socket 5 is detachably attached to the socket 6, and a fitting groove 6 into which the lead 4 is fitted is provided in the upper part of the socket 5.
are arranged accordingly. A socket lead 7 is attached to each of the fitting grooves 6, and contacts the lead 4 in the fitting groove 6, and protrudes downward from the lower surface of the socket 6. The socket 6 is attached to the board 8. This board 8 is provided with a fitting hole 9 into which the socket lead 7 is fitted.
It has an arrangement corresponding to a J-door.

上記実施例の構成によれば、半導体装置本体3は、リー
ド4の内の2本のリード4a 、4bの配列間隔を、他
のり−ド4の配列間隔と異なる間隔として、前記本体3
を装着するソケット6に前記リード4に対応する嵌合溝
6を設け、前記本体3をソケット6に装置する構成とし
たために、本体3は特定の方向づけがなされ、かつソケ
ット6に装着してもその方向づけを失うことはない。そ
して前記ソケット5はリード4に対応させて設けたソケ
ットリード7を有し、かつこのソケット6を取り付ける
基板8には、ソケットリード7に対応する配列を有する
嵌合孔9を設けて、ソケット6を基板8に取り付ける構
成としたために、ソケッ5と基板8にも特定の方向づけ
がなされ、したがって半導体装置本体3、ソケット6お
よび基板8には一連の共通した方向づけがなされる。さ
らにリード4a、4bの配列間隔L1は他のリード4の
配列間隔L2と異なり、かつL1=KXL2の関係を満
足することはないために、逆装着などの誤装着をするこ
とはなくなり、その結果、誤装着による半導体装置の破
壊を防止することができるため、製品の信頼性を高める
ことができる。
According to the configuration of the above embodiment, the semiconductor device main body 3 is arranged such that the arrangement interval between the two leads 4a and 4b of the leads 4 is different from the arrangement interval between the other leads 4.
Since the socket 6 into which the lead 4 is mounted is provided with a fitting groove 6 corresponding to the lead 4, and the main body 3 is installed in the socket 6, the main body 3 is oriented in a specific direction, and even when mounted in the socket 6, Never lose that orientation. The socket 5 has socket leads 7 provided corresponding to the leads 4, and the board 8 to which the socket 6 is attached is provided with fitting holes 9 having an arrangement corresponding to the socket leads 7. Since the socket 5 and the substrate 8 are configured to be attached to the substrate 8, the socket 5 and the substrate 8 are also oriented in a specific manner, and therefore the semiconductor device main body 3, the socket 6, and the substrate 8 are oriented in a series of common directions. Furthermore, since the arrangement interval L1 of the leads 4a and 4b is different from the arrangement interval L2 of the other leads 4 and does not satisfy the relationship L1=KXL2, incorrect mounting such as reverse mounting is prevented, and as a result, Since the semiconductor device can be prevented from being destroyed due to incorrect mounting, the reliability of the product can be improved.

発明の効果 上記実施例の説明から明らかなように本発明によれば、
半導体装置本体の両側部に配設したリードの内の2本の
リードの配列間隔を他のリードの配列間隔と異なる間隔
とし、このリードの配列に対応した配列を有する嵌合溝
をソケットに設けたために、前記リードの配列によって
半導体装置体の方向づけが行なわれ、そしてこの半導体
装置本体をソケットに装着してもその方向づけが失われ
ることはない。またリードの内の2本のリードの配列間
隔を他のリードの配列間隔として、かつこのリードを嵌
合させるソケットの嵌合溝をリードに対応する配列とし
たために、逆装着などの誤装着を行なうことはなくなり
、その結果、誤装着による半導体装置の破壊を防止する
ことができるため、製品の信頼性を高めることができる
Effects of the Invention As is clear from the description of the above embodiments, according to the present invention,
The spacing between two of the leads arranged on both sides of the semiconductor device body is different from that of the other leads, and the socket is provided with a fitting groove having an arrangement corresponding to the arrangement of the leads. Therefore, the orientation of the semiconductor device body is determined by the arrangement of the leads, and even if the semiconductor device body is mounted in a socket, the orientation will not be lost. In addition, since the arrangement spacing of two of the leads is the same as the arrangement spacing of the other leads, and the fitting grooves of the socket into which these leads are fitted are arranged in a manner corresponding to the leads, it is possible to prevent incorrect mounting such as reverse mounting. As a result, it is possible to prevent the semiconductor device from being destroyed due to incorrect mounting, thereby increasing the reliability of the product.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例を示す半導体装置実装体の分
解斜視図、第2図は従来の半導体装置の斜視図である。 3・・・・・・半導体装置本体、4.4a 、4b 、
4c・・・・・・リード、6・・・・・・ソケット、6
・・・・・・嵌合溝。
FIG. 1 is an exploded perspective view of a semiconductor device package showing an embodiment of the present invention, and FIG. 2 is a perspective view of a conventional semiconductor device. 3...Semiconductor device main body, 4.4a, 4b,
4c...Lead, 6...Socket, 6
・・・・・・Fitting groove.

Claims (1)

【特許請求の範囲】[Claims]  半導体装置本体の長手方向の両側部に複数個のリード
を配設した半導体装置と、この半導体装置を着脱自在に
装着するソケットとを有し、前記複数個のリードの隣り
合う2本のリードの間隔を、他のリードの配列間隔と異
ならせ、かつこれらのリードが嵌合する嵌合溝を前記ソ
ケットに設けた半導体装置実装体。
The semiconductor device has a semiconductor device in which a plurality of leads are arranged on both sides in the longitudinal direction of the semiconductor device body, and a socket into which the semiconductor device is detachably mounted, and the two adjacent leads of the plurality of leads are connected to each other. A semiconductor device packaged body, wherein the socket is provided with a fitting groove in which the spacing is different from the arrangement spacing of other leads and into which these leads fit.
JP27451586A 1986-11-18 1986-11-18 Semiconductor device mounting body Pending JPS63128654A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP27451586A JPS63128654A (en) 1986-11-18 1986-11-18 Semiconductor device mounting body

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP27451586A JPS63128654A (en) 1986-11-18 1986-11-18 Semiconductor device mounting body

Publications (1)

Publication Number Publication Date
JPS63128654A true JPS63128654A (en) 1988-06-01

Family

ID=17542772

Family Applications (1)

Application Number Title Priority Date Filing Date
JP27451586A Pending JPS63128654A (en) 1986-11-18 1986-11-18 Semiconductor device mounting body

Country Status (1)

Country Link
JP (1) JPS63128654A (en)

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015006552A (en) * 2014-10-07 2015-01-15 株式会社大都技研 Game board
JP2016073667A (en) * 2015-11-30 2016-05-12 株式会社大都技研 Game machine
JP2016105752A (en) * 2015-11-30 2016-06-16 株式会社大都技研 Game machine
JP2017196419A (en) * 2017-05-26 2017-11-02 株式会社大都技研 Game machine

Cited By (4)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2015006552A (en) * 2014-10-07 2015-01-15 株式会社大都技研 Game board
JP2016073667A (en) * 2015-11-30 2016-05-12 株式会社大都技研 Game machine
JP2016105752A (en) * 2015-11-30 2016-06-16 株式会社大都技研 Game machine
JP2017196419A (en) * 2017-05-26 2017-11-02 株式会社大都技研 Game machine

Similar Documents

Publication Publication Date Title
JPS63128654A (en) Semiconductor device mounting body
JPH01166545A (en) Zigzag type ic
US5611698A (en) Surface mounting IC socket
JP2687493B2 (en) Surface mount structure of semiconductor device
JPH0396292A (en) Printed wiring board
JPH0334923Y2 (en)
JPH01205456A (en) Multi-pin case for lsi
JPS62136060A (en) Semiconductor device
JPH03148165A (en) Pga type semiconductor device
JPS63128652A (en) Semiconductor device mounting body
JPH0625967Y2 (en) Connectable light emitting diode
JPH02122551A (en) Flat package
JPH0514549Y2 (en)
JPS6334287Y2 (en)
JP2785475B2 (en) Wiring device for mounting semiconductor elements
JPS5818292Y2 (en) Light emitting element mounting device
KR960000150Y1 (en) Dip socket
JPH0641349Y2 (en) Terminal board
JPH04239166A (en) Electronic component
JPH05183089A (en) Package for semiconductor device
JPH01151171A (en) Printed circuit board connector for surface mounting
JPS6288285A (en) Electronic part socket
JPH05326092A (en) Socket for ic package
JPH04364794A (en) Semiconductor module
JPH04309255A (en) Semiconductor device