JPS63128406A - Constant voltage generating circuit - Google Patents
Constant voltage generating circuitInfo
- Publication number
- JPS63128406A JPS63128406A JP61274766A JP27476686A JPS63128406A JP S63128406 A JPS63128406 A JP S63128406A JP 61274766 A JP61274766 A JP 61274766A JP 27476686 A JP27476686 A JP 27476686A JP S63128406 A JPS63128406 A JP S63128406A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- voltage
- output
- oscillation
- constant voltage
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 230000010355 oscillation Effects 0.000 claims abstract description 39
- 238000001514 detection method Methods 0.000 claims abstract description 34
- 230000007274 generation of a signal involved in cell-cell signaling Effects 0.000 claims description 17
- 239000003990 capacitor Substances 0.000 abstract description 19
- 230000003247 decreasing effect Effects 0.000 abstract 1
- 238000010586 diagram Methods 0.000 description 11
- 239000013078 crystal Substances 0.000 description 2
- 230000001934 delay Effects 0.000 description 2
- 230000000694 effects Effects 0.000 description 2
- 238000007599 discharging Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000004065 semiconductor Substances 0.000 description 1
Landscapes
- Control Of Electrical Variables (AREA)
Abstract
Description
【発明の詳細な説明】
〔産業上の利用分野〕
本発明は、電池等を電源とする低消費電力型のｌ−タプ
ル機器における定電圧発生回路に関する〔従来の技術〕
従来の定電圧発生回路は、第６図のブロック図に示すよ
うに、発振回路６０１の出力信号をタイミング信号発生
回路６０２に接続し、タイミング信蛙発生回路６０２の
出力信号な昇圧回路６０３に接続し、昇圧回路６０３の
出力電圧を電圧レギュレータ回路６０４に接続して、定
電圧出力６０５を発生する構成になっていた。[Detailed Description of the Invention] [Field of Industrial Application] The present invention relates to a constant voltage generation circuit in a low power consumption type l-tuple device using a battery or the like as a power source [Prior Art] Conventional constant voltage generation circuit As shown in the block diagram in FIG. The output voltage was connected to a voltage regulator circuit 604 to generate a constant voltage output 605.
しかし、前述の従来技術では、電圧レギュレータ回路に
おいて、入力電圧となる昇圧出力電圧と定電圧出力電圧
の差だけ電圧ロスが生じ、低消費電力型のポータプル機
器の電池の消耗を早め寿命を短くしてしまうという問題
点を有していた。However, in the above-mentioned conventional technology, a voltage loss occurs in the voltage regulator circuit by the difference between the boosted output voltage, which is the input voltage, and the constant voltage output voltage, which accelerates the battery consumption of low power consumption portable equipment and shortens its life. The problem was that the
第７図は、従来の定電圧発生回路に用いられている公知
のシリーズ抵抗型電圧レギエレータ回路の回路図である
。ここで昇圧する電池の電圧をＶＢＡＴ、昇圧の割合い
をル、昇圧出力電圧をＶＢＤ１電圧レギエレータの定電
圧出力電圧なＴＲＩＧとし、この定電圧出力電圧を電源
とする負荷７０６の消費電流を、工ＯＰとすると、電圧
レギ為レータで無駄に消費される電力ｗ’ｂｏｓは次の
ように表わされる。FIG. 7 is a circuit diagram of a known series resistance type voltage regulator circuit used in a conventional constant voltage generation circuit. Here, the voltage of the battery to be boosted is VBAT, the rate of boost is VBAT, the boosted output voltage is TRIG, which is the constant voltage output voltage of the VBD1 voltage regulator, and the current consumption of the load 706 that uses this constant voltage output voltage as a power source is calculated as follows: When OP is assumed, the power w'bos wasted in the voltage regulator is expressed as follows.
ＷＬ Ｏ５＝ ＩＶＢＤ−ＶＲＥＧ Ｉ Ｘ
工 ＯＰ −−−・−（１）ｖ Ｂ Ｄ ＝ ｖ
Ｂ Ａ Ｔ Ｘ ｆ＆・・・−（２）コ（’）無効電力
Ｗ Ｌ Ｏ３ハ、第７図＋７）ＮｇＭＯＳ ）ランジス
タフ０３でジュール熱として消費されている。また無効
電力ＷＬＯｉ９は、消費電流工ＯＰが多い程、電圧レギ
エレータ回路７０４０入出力電位差が大きい程、大きく
なる。WL O5=IVBD-VREG IX
Engineering OP ---・-(1) v BD = v
B AT In addition, the reactive power WLOi9 increases as the current consumption OP increases and as the input/output potential difference of the voltage regulator circuit 7040 increases.
そこで本発明は、このような問題点を解決するもので、
その目的とするところは低消費電力型の定電圧発生回路
を提供するところにある。Therefore, the present invention aims to solve these problems.
The purpose is to provide a constant voltage generation circuit with low power consumption.
本発明の定電圧発生回路は、
（１） 発振回路の出力信号をタイミング信号発生回
路に接続し、
（２） 該タイミング信号発生回路の出力信号な昇圧
回路に接続し、
（８） 該昇圧回路の出力電圧、または出力電圧を分
圧した電圧を電圧検出回路の入力に接続し、（４）
該電圧検出回路の出力信号を前記の発振回路、または前
記のタイミング信号発生回路に接続し、
前記の電圧検出回路の出力信号により昇圧動作をオン、
オフすることを特徴とする。The constant voltage generation circuit of the present invention includes: (1) connecting an output signal of an oscillation circuit to a timing signal generation circuit; (2) connecting an output signal of the timing signal generation circuit to a booster circuit; and (8) connecting the output signal of the timing signal generation circuit to a booster circuit. Connect the output voltage or the voltage obtained by dividing the output voltage to the input of the voltage detection circuit, and (4)
The output signal of the voltage detection circuit is connected to the oscillation circuit or the timing signal generation circuit, and the boost operation is turned on by the output signal of the voltage detection circuit.
It is characterized by being turned off.
第１図は本発明の定電圧発生回路のブロック図であって
、発振回路１０１の出力信号１０５をタイミング信号発
生回路１０２に接続し、タイミング信号発生回路１０２
の出力信号１０６を昇圧回路１０３に接続し、昇圧回路
１０３の出力電圧１０７を電圧検出回路１０４０入力に
接°続し、電圧検出回路１０４の出力信号１０８を発振
回路１０１ｔたはタイミング信号発生回路１０２に接続
し、該電圧検出回路１０４の出力信号１０８により昇圧
動作を、−オ゛ン、オフする。このとき、昇圧回路１０
５の出力電圧１０７が電圧検出回路２０４の検出レベル
に対応した、定電圧となる。第２図で本発明の実施例に
おける具体的な回路につ−て説明する。発振回路２０１
はＯＲＭの発振回路であり、ＮＡＮＤ２０５は、電圧検
出回路２０４の出力信号２２５により発振動作をオン、
オフするためのゲートである。昇圧回路２０３は、コン
デンサを用−た昇圧回路であり、タイミング信号発生回
路２０２の信号２２１が“Ｌ＃のとき、電池２２０の十
電極、Ｐ型ＭＯａ）ランジスタ２１２、コンデンサ２１
５、Ｎ型ＭＯｉ９）ランジスタ２１４、電池２２０の一
電極の経路で、コンデンサ２１５が、電池２２０により
充電される。また信号２２２が１″Ｈ”のときは、電池
２２０の十電極、コンデンサ２１８、ＮｆｉＭＯ８）ラ
ンジスタ２１６、コンデンサ２１５、ＨＭＩＭＯＥＩト
−ｙ／ジスタ２１３、電池２２０の一電極の経路で、コ
ンデンサ２１５が充電される。ここでコンデンサ２１５
の電圧が、電圧検出器７１９で設定された検出ノベルを
超えると、電圧検出回路２０４の出力信号２２３は＠Ｌ
”になり、発振回路２０１のＮＡＮＤ２０５の出力は−
１になり、発振は停止してしまう、ｔた、タイミング信
号発生回路２゜２の信号２２１は”Ｌ”、信号２２２も
’Ｌ”になり昇圧回路２０３は、コンデン？２１５の充
電状態で停止し、昇圧動作が停止（オフ）してしまう、
この段階で負荷２２４により消費される電流によりコン
デンサ２１８の端子電圧は次第に降下、してゆく、更に
、コンデンサ２１８の端子電圧が電圧検出器２１９の検
出レベルを割ると、電圧検出回路２０４の出力信号２２
２５は“Ｈ＃になり、発振回路２０１は、発振動作を開
始し、昇圧回路２０３も、コンデンサ２１５の充電期間
とコンデンサ２１８の充電期間を交互に繰り返す昇圧動
作を開始（オン）する。FIG. 1 is a block diagram of a constant voltage generation circuit according to the present invention, in which an output signal 105 of an oscillation circuit 101 is connected to a timing signal generation circuit 102.
The output signal 106 of the boost circuit 103 is connected to the boost circuit 103, the output voltage 107 of the boost circuit 103 is connected to the input of the voltage detection circuit 1040, and the output signal 108 of the voltage detection circuit 104 is connected to the oscillation circuit 101t or the timing signal generation circuit 102. The output signal 108 of the voltage detection circuit 104 turns the boost operation on and off. At this time, the booster circuit 10
The output voltage 107 of No. 5 becomes a constant voltage corresponding to the detection level of the voltage detection circuit 204. A specific circuit in an embodiment of the present invention will be explained with reference to FIG. Oscillation circuit 201
is an ORM oscillation circuit, and the NAND 205 turns on the oscillation operation by the output signal 225 of the voltage detection circuit 204.
This is the gate for turning off. The booster circuit 203 is a booster circuit using a capacitor, and when the signal 221 of the timing signal generating circuit 202 is "L#", the 10 electrodes of the battery 220, the P-type MOa) transistor 212, and the capacitor 21
5. N-type MOi9) A capacitor 215 is charged by the battery 220 through a path between the transistor 214 and one electrode of the battery 220. When the signal 222 is 1″H, the capacitor 215 is charged through the path of the ten electrodes of the battery 220, the capacitor 218, the NfiMO8) transistor 216, the capacitor 215, the HMIMOEI transistor 213, and one electrode of the battery 220. be done. Here capacitor 215
When the voltage exceeds the detection novel set by the voltage detector 719, the output signal 223 of the voltage detection circuit 204 becomes @L
”, and the output of the NAND 205 of the oscillation circuit 201 is -
1, and the oscillation stops.Then, the signal 221 of the timing signal generation circuit 2゜2 becomes "L", the signal 222 also becomes "L", and the booster circuit 203 stops with the capacitor 215 being charged. However, the boost operation stops (turns off).
At this stage, the terminal voltage of the capacitor 218 gradually drops due to the current consumed by the load 224. Furthermore, when the terminal voltage of the capacitor 218 falls below the detection level of the voltage detector 219, the output signal of the voltage detection circuit 204 22
25 becomes "H#", the oscillation circuit 201 starts an oscillation operation, and the booster circuit 203 also starts (turns on) a booster operation that alternately repeats the charging period of the capacitor 215 and the charging period of the capacitor 218.
以上述べたよ、うに、昇圧動作を電圧検出回路の出力信
号によりオン、オフさせることで昇圧出力電圧を定電圧
に保つことができる。このとき、負荀２２４で消費する
電流は全てコンデンサ２１５遍２１ａの充放電で供給さ
れるので、従来の定電圧発生回路で発生した（１）式で
示した無効゛電力の消費は、全くなくなる。As described above, the boosted output voltage can be maintained at a constant voltage by turning the boosting operation on and off according to the output signal of the voltage detection circuit. At this time, all the current consumed by the negative unit 224 is supplied by charging and discharging the capacitor 215 and 21a, so the consumption of reactive power shown in equation (1), which occurs in the conventional constant voltage generation circuit, is completely eliminated. .
ところで第２図の発振回路２０１はＯＲ５＠振回路を例
にとったが水晶発振、ＬＯ発振でもよい。Incidentally, the oscillation circuit 201 in FIG. 2 is an OR5@oscillation circuit as an example, but crystal oscillation or LO oscillation may also be used.
第３図は、第２図の定電圧発生回路の波形図であり、ｔ
ＤＬＹは、第２図のＮＭＭＯＢ ）ランジスタ２１４と
２１６が同時にオンして、コンデンｔ２１８の電荷を無
駄に放電させないための期間であり、インバータ２０６
，２０７，２０８，２０９の時間遅れで作っている。期
間ｔｅｌは、コンデンサ２１５の充電期間であり、期間
ｔｅｌはコンデンｔ２１８の充電期間である。またｔａ
ｙＣは昇圧動作の周期である。昇圧出力２１７の電位は
、昇圧動作オンの期間とオフの期間で、ｖＲＰなる電位
変動をする。電位変動ＶＲＰは、発振回路において、電
圧検出回路の出力信号が１Ｈ＃になって、発振動作が開
始するまでの時間ｔＰＤ２、また電圧検出回路の出力信
号が＠Ｌ＃になって発振動作が停止するまでの時間ｔＰ
Ｄ１、更に発振回路、タイミング信号発生回路、昇圧回
路、電圧検出回路、発振回路という、フィード・バック
を有する回路の時間遅れにより生じる。以上のことから
、電位変動ＶＲＰは回路の応答速度を上げることで充分
小さな値にすることができる。FIG. 3 is a waveform diagram of the constant voltage generation circuit of FIG.
DLY is a period in which the NMMOB transistors 214 and 216 in FIG.
, 207, 208, and 209 with time delays. The period tel is a charging period of the capacitor 215, and the period tel is a charging period of the capacitor t218. Also ta
yC is the cycle of boosting operation. The potential of the boost output 217 changes by vRP between the on period and the off period of the boost operation. In the oscillation circuit, the potential fluctuation VRP is determined by the time tPD2 from when the output signal of the voltage detection circuit becomes 1H# until the oscillation operation starts, and when the output signal of the voltage detection circuit becomes @L# and the oscillation operation stops. Time tP until
This is caused by time delays in circuits that have feedback, including D1, the oscillation circuit, the timing signal generation circuit, the booster circuit, the voltage detection circuit, and the oscillation circuit. From the above, the potential fluctuation VRP can be made sufficiently small by increasing the response speed of the circuit.
また発振回路での発振開始、停止の応答速度が遅い場合
には、第４図のように電圧検出回路４０４の出力信号４
０６をタイミング信号発生回路４０２へ接続して、昇圧
動作をオン、オフすることで、定電圧出力が得られる。Furthermore, if the response speed of starting and stopping oscillation in the oscillation circuit is slow, the output signal 4 of the voltage detection circuit 404 as shown in FIG.
By connecting 06 to the timing signal generation circuit 402 and turning on and off the boost operation, a constant voltage output can be obtained.
第４図の発振回路４０１はＣＲ発振回路を例にとってい
るが水晶発振、ＬＯ発振でもよくその目的は昇圧動作に
限らなくてもよい。Although the oscillation circuit 401 in FIG. 4 is a CR oscillation circuit, it may be used for crystal oscillation or LO oscillation, and its purpose is not limited to boost operation.
ところで定電圧出力電圧は、電圧検出回路の検出レベル
を変えることで任意に設定できる。Incidentally, the constant voltage output voltage can be arbitrarily set by changing the detection level of the voltage detection circuit.
第５図の公知の電圧検出回路を例にとると、オペアンプ
５０５の一方の入力である基準電圧５０４の設定を変え
るか、または昇圧回路の出力５０８を抵抗５０７で分圧
した出力５０９をオペアンプ５０５の他方の入力に接続
することで任意の定電圧出力電圧が得られる。Taking the known voltage detection circuit shown in FIG. 5 as an example, the setting of the reference voltage 504, which is one input of the operational amplifier 505, can be changed, or the output 509 obtained by dividing the output 508 of the booster circuit by the resistor 507 can be applied to the operational amplifier 505. Any constant voltage output voltage can be obtained by connecting to the other input of the .
以上述べたように本発明によれば、定電圧出力をコンデ
ンサ間の電荷の移動で発生させている為従来のシリーズ
抵抗型電圧レギ為レータを用いたものに比べ、非常に低
消費電力の定電圧発生回路ができる。これにより本発明
の定′ｇｌｔＦＥ、発生回路を用いたポータプル機器に
おいて′Ｉｔ源となる電池の消耗を少なくでき寿命を長
くできるという効果を有する。As described above, according to the present invention, the constant voltage output is generated by the movement of charge between capacitors, resulting in a constant voltage output with extremely low power consumption compared to the conventional series resistor type voltage regulator. Creates a voltage generation circuit. As a result, in a portable device using the constant gltFE and generating circuit of the present invention, the consumption of the battery which is the source of it can be reduced and its life can be extended.
更に、発振回路での発振動作をオン、オフすることで、
発振電流をオフの期間の分だけ減少でき、消費電流を更
に、低減できるという効果を有するまた本発明の定電圧
発生回路を半導体集積回路で実現する場合、従来のよう
な電圧レギエレータ回路を用いないため、この部分に相
当する面積だけチップ面積を小さくでき、チップの単価
を引き下げることができるという効果を有する。Furthermore, by turning on and off the oscillation operation in the oscillation circuit,
It has the effect that the oscillation current can be reduced by the amount of the off period, and the current consumption can be further reduced.Furthermore, when the constant voltage generation circuit of the present invention is implemented using a semiconductor integrated circuit, a conventional voltage regulator circuit is not used. Therefore, the chip area can be reduced by an area corresponding to this portion, and the unit price of the chip can be reduced.
第１図は本発明の定電圧発生回路のブロック図１０１・
・・・・・発振回路
１０２・・・・・・タイミング信号発生回路１０３・・
・・・・昇圧回路
１０４・・・・・・電圧検出回路
１０５・・・・・・発振回路の出力信号１０６・・・・
・・タイミング信号発生回路の出力信号１０７・・・・
・・昇圧出力（定電圧出力）１０８・・・・・・電圧検
出回路の出力信号第２図は本発明の定電圧発生回路の一
実施例を示す回路図。
２０１・・・・・・発振回路
２０２・・・・・・タイミング信号発生回路２０３・・
・・・・昇圧回路
２０４・・・・・・電圧検出回路
２０５ ・・・・・・ ＨＡＮＤ
２０６・・・・・・インバータ
２０７・・・・・・インバータ
２０８・・・・・・インバータ
２０９・・・・・・インバータ
２１０ ・・・・・・ ＨＡＮＤ
２１１ ・・・…Ｎ０Ｒ
２１２・・・・・・ＰｕＭＯｆ９）ランジスタ２１５・
・・・・・ＮｆｉＭＯ８）ランジスタ２１４・・・・・
・Ｎ１Ｍ０ Ｓ ）ランジスタ２１５…・・・コンデン
サ
２１６・・・・・・Ｎ１Ｍ０８）ランジスタ２１７・・
・・・・昇圧出力（定電圧出力）２１８・・・・・・コ
ンデンサ
２１９・・・・・・電圧検出器
２２０・・・・・・電池（電源）
２２１・・・・・・ＮＡｓＤ２１０の出力信号２２２・
・・・・・Ｎ０Ｒ２１１の出力信号２２３・・・・・・
電圧検出回路の出力信号２２４・・・・・・負 荷
第５図（ａ）、（ｂ）、ＣＣ）ｅｃｄ）＃（ｇ）、（１
）はに２図の定電圧発生回路の動作を示した波形図。
第４図は本発明による定電圧発生回路の他の実施例の回
路図。
４０１・・・・・・発振回路
４０２・・・・・・タイミング信号発生回路４０３・・
・・・・昇圧回路
４０４・・・・・・電圧検出回路
４０５・・・・・・負 荷
４０６・・・・・・電圧検出回路の出力信号第５図は電
圧検出回路の回路図である。
５０１・・・・・・昇圧回路
５０２・・・・・・電圧検出回路
５０５・・・・・・電圧検出回路の出力信号５０４・・
・・・・基準電圧
５０５・・・・・・オペアンプ
５０６・・・・・・負 荷
５０７・・−・・抵 抗
５０Ｂ・・・・・・昇圧出力
５０９・・・・・・昇圧出力電圧を分圧した出力第６図
は従来の定電圧発生回路のブロック図。
６０１・・・・・・発振回路
６０２・・・・・・タイミング信号発生回路６０３・・
・・・・昇圧回路
６０４・・・・・・電圧レギエレータ回路６０５・・・
・・・定電圧出力
第７図は、シリーズ抵抗を電圧レギエレータ回路の回路
図。
７０１・・・・・・基準電圧
７０２・・・・・・オペアンプ
７０３・・・・・・ＮｆｉＭｏｓトランジスタ７０４・
・・・・・電圧レギユレータｔ［［７０５・・・・・・
昇圧回路
７０６・・・・・・負 荷
以上FIG. 1 is a block diagram 101 of the constant voltage generation circuit of the present invention.
...Oscillation circuit 102 ...Timing signal generation circuit 103 ...
... Boost circuit 104 ... Voltage detection circuit 105 ... Output signal of oscillation circuit 106 ...
...Output signal 107 of the timing signal generation circuit...
. . . Boost output (constant voltage output) 108 . . . Output signal of voltage detection circuit FIG. 2 is a circuit diagram showing an embodiment of the constant voltage generation circuit of the present invention. 201...Oscillation circuit 202...Timing signal generation circuit 203...
...... Boost circuit 204... Voltage detection circuit 205... HAND 206... Inverter 207... Inverter 208... Inverter 209... ...Inverter 210 ...HAND 211 ...N0R 212 ...PuMOf9) Ranister 215
...NfiMO8) Ransistor 214...
・N1M0S) Ransistor 215...Capacitor 216...N1M08) Ransistor 217...
...Boost output (constant voltage output) 218 ... Capacitor 219 ... Voltage detector 220 ... Battery (power supply) 221 ... Output of NAsD210 Signal 222・
...Output signal 223 of N0R211...
Output signal 224 of the voltage detection circuit... Load Figure 5 (a), (b), CC) ecd) #(g), (1
)A waveform diagram showing the operation of the constant voltage generating circuit shown in Fig. 2. FIG. 4 is a circuit diagram of another embodiment of the constant voltage generating circuit according to the present invention. 401...Oscillation circuit 402...Timing signal generation circuit 403...
. . . Boost circuit 404 . . . Voltage detection circuit 405 . . . Load 406 . . . Output signal of voltage detection circuit Figure 5 is a circuit diagram of the voltage detection circuit. . 501... Boost circuit 502... Voltage detection circuit 505... Output signal of voltage detection circuit 504...
...Reference voltage 505...Operational amplifier 506...Load 507...Resistance 50B...Boost output 509...Boost output voltage Figure 6 is a block diagram of a conventional constant voltage generation circuit. 601...Oscillation circuit 602...Timing signal generation circuit 603...
... Boost circuit 604 ... Voltage regulator circuit 605 ...
... Constant voltage output Figure 7 is a circuit diagram of a voltage regulator circuit using series resistors. 701... Reference voltage 702... Operational amplifier 703... NfiMos transistor 704.
...Voltage regulator t[[705...
Boost circuit 706...Load or more
Claims (1)
接続し、 （ｂ）該タイミング信号発生回路の出力信号を昇圧回路
に接続し、 （ｃ）該昇圧回路の出力電圧または、出力電圧を分圧し
た電圧を電圧検出回路の入力に接続し、（ｄ）該電圧検
出回路の出力信号を前記の発振回路または、前記のタイ
ミング信号発生回路に接続し、 前記の電圧検出回路の出力信号により、昇圧動作をオン
、オフすることを特徴とする定電圧発生回路。[Claims] (a) An output signal of the oscillation circuit is connected to a timing signal generation circuit, (b) An output signal of the timing signal generation circuit is connected to a booster circuit, (c) An output voltage of the booster circuit Alternatively, a voltage obtained by dividing the output voltage is connected to the input of the voltage detection circuit, and (d) an output signal of the voltage detection circuit is connected to the oscillation circuit or the timing signal generation circuit, and the voltage detection is performed. A constant voltage generation circuit characterized by turning on and off boost operation according to the output signal of the circuit.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61274766A JPS63128406A (en) | 1986-11-18 | 1986-11-18 | Constant voltage generating circuit |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP61274766A JPS63128406A (en) | 1986-11-18 | 1986-11-18 | Constant voltage generating circuit |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63128406A true JPS63128406A (en) | 1988-06-01 |
Family
ID=17546276
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP61274766A Pending JPS63128406A (en) | 1986-11-18 | 1986-11-18 | Constant voltage generating circuit |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63128406A (en) |
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2005233846B2 (en) * | 2004-04-15 | 2008-09-11 | Daikin Industries, Ltd. | Joint |
| CN105867501A (en) * | 2016-05-16 | 2016-08-17 | 周玉林 | Human-body-induction-kitchen-ventilator power-socket controller |
-
1986
- 1986-11-18 JP JP61274766A patent/JPS63128406A/en active Pending
Cited By (2)
| Publication number | Priority date | Publication date | Assignee | Title |
|---|---|---|---|---|
| AU2005233846B2 (en) * | 2004-04-15 | 2008-09-11 | Daikin Industries, Ltd. | Joint |
| CN105867501A (en) * | 2016-05-16 | 2016-08-17 | 周玉林 | Human-body-induction-kitchen-ventilator power-socket controller |
Similar Documents
| Publication | Publication Date | Title |
|---|---|---|
| US4878147A (en) | Electromagnetic coil drive device | |
| JPS6042519Y2 (en) | integral circuit | |
| JPH06221210A (en) | Fuel injection control device for internal combustion engine | |
| JP2614938B2 (en) | Charge pump device | |
| JPS63128406A (en) | Constant voltage generating circuit | |
| JPH07255168A (en) | Dc-dc converter for generating a plurality of signals | |
| JPH10293617A (en) | Constant voltage power supply device and rush current preventing circuit | |
| JPH0739139A (en) | Constant current integrated power supply | |
| TW200413894A (en) | Regulator and related method capable of performing pre-charging | |
| JPH0225525B2 (en) | ||
| JPS6216044B2 (en) | ||
| JPS59114908A (en) | Integrated circuit device having oscillating circuit | |
| JPS5917892B2 (en) | multi vibrator | |
| JPS5661808A (en) | Shock noise preventing circuit | |
| JPS6119141B2 (en) | ||
| JPS6146187A (en) | Speed controller of dc motor | |
| JPS6413809A (en) | Semiconductor device | |
| JPS5939960A (en) | Control device for fuel pump | |
| JP2840073B2 (en) | DC constant current constant voltage power supply | |
| US3989998A (en) | Wide range pulse generator | |
| JPH0119567Y2 (en) | ||
| JPS6025154Y2 (en) | Muting circuit | |
| JPS62152217A (en) | Electronic device | |
| JPH0221808Y2 (en) | ||
| JPH0455004B2 (en) |