JPH0119567Y2 - - Google Patents

Description

[Detailed Description of the Invention] (a) Field of Industrial Application The present invention relates to a storage battery charging device, and more specifically, to a fully charged state detection circuit.

(b) Prior Art In a storage battery charging device, a detection circuit that detects the fully charged state of the storage battery is essential. Some conventional detection circuits monitor the terminal voltage of a storage battery and determine that the battery is fully charged when this terminal voltage exceeds a predetermined value. Such a detection circuit requires a voltage dividing circuit for terminal voltage and a voltage source for generating a comparison voltage.

(c) Problems to be solved by the invention In other words, the conventional full charge detection circuit required a voltage divider circuit and a new voltage generation source.

(d) Means for Solving the Problems The present invention includes a constant voltage circuit for charging a storage battery, and a circuit connected between the input voltage of the constant voltage circuit and the terminal voltage of the storage battery, and a voltage control circuit connected between the input voltage of the constant voltage circuit and the terminal voltage of the storage battery. This storage battery charging device includes means for generating a detected voltage higher than the terminal voltage, and a voltage comparator for comparing the output voltage of the constant voltage circuit and the detected voltage.

(e) Effect In other words, the constant voltage circuit output for charging is used as a reference voltage for full charge detection, so the configuration is simplified.

(f) Examples Embodiments of the present invention will be described below with reference to the drawings.

FIG. 1 is a circuit diagram of the embodiment, and FIG. 2 is a waveform diagram for explaining the operation.

In the drawing, Q1 and Q2 are Darlington-connected NPN first and second current control transistors, the base of the first current control transistor Q1 is connected to the emitter of the second current control transistor Q2, and both A collector is connected to an input terminal 1 to which an input voltage is applied. Q3 is
It is an NPN type reference voltage transistor, and its collector is connected to the base of the second current control transistor Q2. ZD1 is a first constant voltage diode whose cathode is connected to the emitter of the third transistor Q3, D1 is a first diode whose anode is connected to the anode of the first constant voltage diode DZ1, and D2 is a first diode whose anode is connected to the cathode of the first diode D1. A second diode is connected to the second diode, and the cathode is grounded. One terminal of VR is connected to the first current control transistor Q1 via the first resistor R1.
The other terminal is grounded via the second resistor R2, and the variable terminal is connected to the base of the reference voltage transistor Q3. Q4 is a PNP type display transistor whose emitter is connected to point A via a third resistor R3 and whose collector is grounded via a light emitting diode LED. R4 is a fourth resistor with one end connected to the emitter of display transistor Q4 and the other end grounded, and R7 has one end connected to point A (a)
The seventh resistor connected to R10, R11, R12
are the 10th, 11th, and 12th resistors connected in series between input terminal 1 and point B, D3 is the anode of the 10th resistor,
This is a third diode connected to the connection point between the eleventh resistors R10 and R11, and its cathode is connected to point B b. D4 is a fourth diode whose anode is connected to point B, and whose cathode is connected to the output terminal 2. OP1 is a first voltage comparator in which the inverting input terminal (-), that is, point C, is connected to the output terminal 2 via the 13th resistor R13, and the point C and the non-inverting input terminal (+), that is, point D, are connected to the output terminal 2 through the 13th resistor R13. Fifth and sixth diodes D5 and D6 for input protection are connected in antiparallel to , and a fourteenth resistor R14 for gain control is connected between the output terminal, that is, point E and point D. DZ2 is a second voltage regulator diode whose cathode is connected to point D, and the 15th resistor R
It is connected to the input terminal 1 via 15, and its anode is grounded. Ca is a differential capacitor having one end connected to point E, and the other end, point F, f being grounded via the sixteenth resistor R16. D7 is the seventh diode whose anode is connected to point F, OP2
is a second voltage comparator, whose inverting input terminal (-), ie, point G, is connected to the cathode of the seventh diode D7 and also to point A, via the 17th resistor R17, and whose non-inverting input terminal ( +) or H
A point h is connected to a connection point between the eleventh and twelfth resistors R11 and R12. R18 is the second voltage comparator OP2
An 18th resistor, Q6, connected between the output terminal of , that is, point I, and the base of the display transistor Q4.
is the first NPN type whose collector is connected to point B
It is a control transistor, and the base is the 19th resistor R.
19 to point I. R20 is a 20th resistor whose one end is connected to the base of the first control transistor Q6, and whose other end is grounded. One end of R21 is connected to the first control transistor Q6
The other end is connected to the connection point of the fifth and sixth resistors R5 and R6. The collector of Q7 is the first constant voltage diode
It is an NPN type second control transistor connected to the anode of ZD1, and the base is connected to the fifth and sixth resistors R.
5 and R6, and the emitter is grounded. BY is a storage battery to be charged, and its anode is connected to the output terminal 2 and its cathode is grounded. In addition, display transistor Q4, light emitting diode LED 3rd, 4th, 18th resistor R3, R4, R
18 constitutes a display circuit, and the others constitute a charging circuit. Furthermore, the voltage Vd at point D d is the voltage Vb at point B
The second voltage regulator diode DZ is lower than the voltage of the storage battery BY in a fully discharged state.
2 is selected.

Next, the operation of the above embodiment will be explained (see FIG. 2). The voltage at point A is a high voltage VaH when the second control transistor Q7 is off, and a low voltage VaL when it is on, and each voltage is controlled to be constant.

Assume that the storage battery BY is currently being charged. At this time, the second control transistor Q7 is in an off state, and the voltage at point A is VaH. A charging current is supplied to the storage battery BY via the resistor R7 and the fourth diode D4.
The voltage at point G should be the same as that at point A, and is maintained at VaH during the charging operation. On the other hand, the voltage at point H changes to terminal voltage Vc as the storage battery BY progresses in charging.
rises as . To be precise, H
The voltage at point h (detected voltage) is larger than the terminal voltage Vc by the sum of the forward voltage of the fourth diode D4 and the forward voltage of the third diode D3 divided by resistors R12 and R11.

During the charging operation, the voltage at point G is higher than the voltage at point H, so the second voltage comparator
The output of OP2 is at L level, and both the first and second control transistors Q6 and Q7 are off, which does not contradict the previous assumption. Also, the LED lights up while charging.
Displays that it is charging.

As the charging operation progresses and the terminal voltage Vc rises, the voltage at point H (detected voltage) becomes higher than the voltage at point G, and the second voltage comparator OP2 output is inverted and reaches the H level. Become. The reason why the voltage at point H becomes higher than the charging voltage VaH is because the unregulated voltage at input terminal 1 (the input voltage of the constant voltage circuit by Q1, Q2, and Q3) is used to connect the third diode D3.
This is because the resistors R11 and R12 create a voltage Vh that follows the terminal voltage Vc and is higher than this terminal voltage.

In other words, the third diode D3, the resistors R11, R
12, it is possible to detect full charge without requiring a separate new reference power source.

When the terminal voltage Vc increases and as a result, the output of the second voltage comparator OP2 becomes H level, the display transistor Q4 is turned off and the LED is turned off, and the first and second control transistors Q6 and Q7 are turned on. do. By turning on the second control transistor Q7, the voltage Vj at point J decreases, and the voltage at point A becomes a low voltage VaL. Therefore, the voltage Vb at point B decreases, the fourth diode D4 turns off, and the charging operation ends.

At the same time, the voltage at point G also decreases, so the output of the second voltage comparator OP2 remains at H level.

After charging is completed, the terminal voltage Vc is high, so the first
The output of voltage comparator OP1 is at L level.

When current is supplied from the charged storage battery BY to a load (not shown), the terminal voltage Vc gradually decreases. Even if the terminal voltage Vc decreases, even if the voltage at point G decreases, the output of the second voltage comparator OP2 will not be inverted to the L level. terminal voltage
When Vc is lower than voltage Vd, the first voltage comparator
The output of OP1 is inverted and becomes H level.

The rising edge of the inversion of the output of the first voltage comparator OP1 is detected by a differentiating circuit including a capacitor Co and a resistor R16. The rise of the output of the first voltage comparator OP1 to H level is caused by the seventh diode D7.
is applied to point G via. As a result, the inverting input of the second voltage comparator OP2 becomes higher than the voltage of the non-inverting input, and the output of the second voltage comparator OP2 is inverted to L level.

That is, when the terminal voltage Vc of the storage battery BY falls below a predetermined value, the output of the second voltage comparator OP2 becomes L level, and the first and second control transistors Q6,
Q7 is turned on, the voltage at point A becomes high again, and charging is restarted. Furthermore, when the voltage at point A becomes high, the voltage at point H also becomes high, so
Furthermore, since the terminal voltage Vc of the storage battery BY has decreased, the output of the second voltage comparator OP2 remains at the L level.

When charging is restarted in this way, the terminal voltage increases as described above, but when this terminal voltage Vc becomes larger than a predetermined value, the output of the second voltage comparator OP2 is inverted to H level, and charging ends. From then on, this charging and discharging will be repeated.

(g) Effects of the invention As described above, according to the invention, in a configuration in which full charge of a storage battery is detected when the terminal voltage of the storage battery rises to a predetermined value, a reference voltage source for comparison is used. There is no need to install a new one, and a power source for charging can be used, simplifying the configuration.
The effect is great.

[Brief explanation of drawings]

FIG. 1 is a circuit diagram of an embodiment of the present invention, and FIG. 2 is a waveform diagram for explaining the operation. Q1, Q2, Q3...transistor forming a constant voltage circuit, D3, R11, R12...detection voltage generation means, BY...storage battery, OP2...voltage comparator.

Claims (1)

[Scope of utility model registration request] a constant voltage circuit for charging the storage battery, connected between the input voltage of the constant voltage circuit and the terminal voltage of the storage battery, and tracking the terminal voltage of the storage battery;
A storage battery charging device comprising means for generating a detected voltage higher than this terminal voltage, and a voltage comparator for comparing the output voltage of the constant voltage circuit and the detected voltage.