JPS6312409B2 - - Google Patents

Description

DETAILED DESCRIPTION OF THE INVENTION The present invention relates to a pulse noise suppression device for effectively removing pulse noise in a vehicle-mounted FM receiver.

Such a conventional device is constructed as shown in FIG. In the figure, 1 is a low-pass filter (hereinafter abbreviated as LPF) that acts as a signal delay means.
The signal is then delayed by the amount of time necessary to process the noise. Gate 2 works to momentarily interrupt the signal only when pulse noise is input, and level hold circuit 3 maintains its output level at the signal level immediately before the interruption while the signal is interrupted by gate 2. work like that.

4 is a high-pass filter (hereinafter abbreviated as HPF) having a cutoff frequency of about 100 KHz, which functions to extract only noise components from the detection output from the FM detector (not shown). The noise amplifier 5 with AGC amplifies the output of the HPF 4, and when the noise energy exceeds a certain level, the AGC operates and lowers the gain. This is to prevent the gate 2 from being operated frequently and the signal being interrupted when the white noise component increases due to a weak electric field or the like. A monostable multivibrator (hereinafter abbreviated as monostable multi) 6 generates a pulse signal of a constant width for driving the gate 2 when the output of the noise amplifier 5 becomes larger than a certain constant value.

In the above-mentioned noise suppression device, when the signal from the FM detector is of a relatively low audible frequency as shown in FIG. , the output of the level hold circuit 3 is as shown in Fig. 2b.
As shown in FIG. 2, a signal is generated that maintains the level when gate 2 is closed. In this case, the level hold circuit 3 functions without any problem and no noise is generated.

However, if a 19KHz stereo pilot signal exists as shown in Figure 3a, if it is momentarily cut off by gate 2 during the period shown by the broken line, the third
Period when gate 2 is blocked as shown in figure b
A signal held at the DC level is obtained at the output of the level hold circuit 3, the waveform becomes discontinuous, the pilot signal is also blocked, MPX demodulation becomes impossible, and distortion (noise) occurs. This is because, since the frequency of the pilot signal is high, the time during which the gate 2 is cut off extends to half a wavelength or one wavelength, and the level hold circuit 3, which simply performs correction using a DC potential, cannot effectively correct it.

The present invention has been made in view of the above points, and
The object is to provide a pulse noise suppression device that can remove pulse noise from an audible signal including a stereo pilot signal without generating noise.

The present invention will be explained below with reference to FIG. 4 and subsequent figures.

FIG. 4 is a block diagram showing an embodiment of the pulse noise suppression device according to the present invention. In the figure, LPF1, H.
The P.F. 4, the noise amplifier with AGC 5, and the monostable multi-function device 6 may be the same as those of the conventional device shown in FIG.

At the output point A of the LPF 1, a signal as shown in FIG. 5a appears, which is a delayed version of the FM detection output applied to its input. This signal is a composite signal consisting of a pilot signal and an audible signal on which pulsed noise is superimposed. The output of the LPF 1 is supplied to a circuit requiring the pilot signal with the pilot signal therein bypassed, and is also applied to one negative input terminal of the subtraction circuit (arithmetic circuit) 7. A pilot cancel signal (hereinafter referred to as a pican signal) as shown in FIG. 5b is applied to the other - input terminal (point B) of the subtraction circuit 7. Since this pi-can signal is in opposite phase to the pilot signal in the composite signal, the subtraction circuit 7 cancels the pilot signal in the composite signal.

First and second level hold circuits 8 and 9 are connected between the first and second input terminals (points A and B) and the third input terminal (point C) of the subtraction circuit 7, respectively. has been done. These level hold circuits are composed of, for example, a capacitor connected between points A and C and between points B and C, and a first capacitor whose both ends are connected between points A and C. A first level hold circuit 8 is configured by a capacitor, and a second level hold circuit 9 is configured by a second capacitor connected between points A, C, and C, respectively. The potential difference between point B and point C is maintained to hold the level. and the third
A switch circuit 10, which is normally on when there is no pulse noise, is connected between the input terminal (point C) and ground. Therefore, the above-mentioned point C is normally connected to the ground in terms of direct current in the embodiment.

Therefore, normally the signals passed through the level hold circuits 8 and 9 are not applied to the third input terminal of the subtraction circuit 7, and the subtraction circuit 7 has a composite signal and a composite signal at the first and second input terminals, respectively. Only the pilot cancel signal is applied. For this purpose, the pilot signal is canceled and only the audio frequency output signal is transmitted from the subtraction circuit 7 to the MPX circuit. The switch circuit 10 is controlled to be turned off by a pulse signal generated by the monostable multi 6, and when the switch circuit 10 is turned off, the impedance at point C increases.

With the above-described configuration, when pulse noise as shown in FIG. 5A appears in the composite signal, the monostable multi 6 generates a pulse signal of a constant width to turn off the switch circuit 10. This OFF operation of the switch circuit 10 is performed for the composite signal at point A which has been passed through the LPF 1 and is delayed, at a time point _t1 shown by the broken line, before the pulse noise rises. And this switch circuit 10
By turning off, point C is lifted from the ground. In this case, since the first level hold circuit 8 is composed of a capacitor whose both ends are connected between points A and C as described above, the first level hold circuit 8 is While maintaining the DC level (earth level in the embodiment) at the third input terminal, the fluctuation component (AC component) consisting of the pulse noise and pilot signal applied to the first input terminal of the subtraction circuit 7 is converted to the third input terminal. It acts to add to the input terminal. In other words, the first level hold circuit 8 functions as a type of battery having as an electromotive force the DC level difference between both terminals at the moment the switch circuit 10 is turned off.

Furthermore, since the second level hold circuit 9 also consists of a capacitor whose both ends are connected between points B and C as described above, this second level hold circuit 9 also has a third level at the moment the switch circuit 10 is turned off. While maintaining the DC level (earth level in the embodiment) at the input terminal of the subtraction circuit 7, a fluctuation component (AC component) consisting of the Piquian signal applied to the second input terminal of the subtraction circuit 7 is applied to the third input terminal. It acts on That is, the second level hold circuit 9
It also functions as a type of battery, having as an electromotive force the DC level at both terminals at the moment the switch circuit 10 is turned off.

Therefore, the first level hold circuit 8
A pilot signal and a pulse noise component are applied to the input terminal (point C) of the circuit, and a piquiyan signal is applied to the third input terminal (point C) by the second level hold circuit 9.

As a result, as shown in FIG. 5c, a DC level of zero (earth level) and only pulse noise components are applied to the third input terminal (point C).

Therefore, for the audio frequency signal and pulse noise component from which the pilot signal has been removed by being simultaneously applied to the first and second input terminals of the subtraction circuit 7, the pulse noise component generated at the third input terminal is The noise component is subtracted, and the output terminal (point D) of the subtraction circuit 7 is provided with only the audio frequency signal as shown in FIG. 5d from which the pulse noise has been removed.

As described above, in the pulse noise suppression device according to the present invention, when removing pulse noise, the pilot signal is also removed at the same time, so a signal in which the pilot signal is cut off in the middle does not appear in the output. . Therefore, waveform distortion caused by cutting off the pilot signal midway and generation of noise associated with it are eliminated.

Furthermore, the device according to the present invention cancels both the pilot signal and noise by using general arithmetic circuits such as subtraction circuits or addition circuits, and can cancel both the pilot signal and noise without using a gate circuit. Since this is done by using a switch means, a practically effective effect of simplifying the circuit configuration can also be obtained.

[Brief explanation of the drawing]

FIG. 1 is a block diagram showing an example of a conventional device.
2a and b and 3a and b are waveform diagrams for explaining the operation of the device shown in FIG. 1, FIG. 4 is a block diagram showing an embodiment of the device according to the present invention, and FIG. 5a 4. d to d are waveform diagrams showing waveforms at each point of the device in FIG. 4. 1...Low pass filter (delay means), 4...
High pass filter, 5...Noise amplifier with AGC,
6... Monostable multivibrator, 7... Subtraction circuit (arithmetic circuit), 8, 9... Level hold circuit,
10...Switch circuit (switch means).

Claims (1)

[Claims] 1. A delay means for delaying an input signal, an output signal of this delay means, and a pilot signal in this output signal are in opposite phase, and a pilot cancel signal for canceling the pilot signal is inputted, respectively. an arithmetic circuit having first and second input terminals; a noise detection unit that detects pulse noise in the input signal and generates a pulse signal of a constant width; and an output signal from the delay means and a pilot canceller. A third input terminal having a reverse phase with respect to the first and second input terminals to which a signal is applied is connected in an alternating current manner between the ground and the third input terminal, and is normally turned on in response to a pulse signal from the noise detection section. a switch means for turning off the control circuit when the switch means is turned off; and a switch means for controlling the pulse noise and the pilot signal applied to the first input terminal of the arithmetic circuit to the third input terminal while maintaining the DC level of the third input terminal at the moment when the switch means turns off. a first level hold circuit that transmits the signal to the
a second level hold circuit that transmits the pilot cancel signal applied to the second input terminal of the arithmetic circuit to the third input terminal while maintaining the DC level of the third input terminal at the moment when the switch means is turned off; and by turning off the switch means, the pulse noise generated at the third input terminal is subtracted from the pulse noise in the signal applied to the first input terminal, and the signal is output. A pulse noise suppression device characterized by: