JPH0339964Y2 - - Google Patents

Description

[Detailed description of the invention] (a) Industrial application field The present invention relates to a stereo demodulation circuit having a pilot signal cancel function, and is capable of canceling the pilot signal without particularly affecting the stereo display circuit. This invention relates to a stereo demodulation circuit.

(b) Prior art A stereo system that demodulates left and right stereo signals L and R from a stereo composite signal consisting of a stereo sum signal (L+R), a stereo difference signal (L-R) subjected to carrier wave pressure AM modulation, and a 19KHz pilot signal. Demodulation circuits are known. Although the pilot signal is prepared to obtain a 38KHz subcarrier, it is desirable to remove it from the composite signal to be demodulated because there is a risk of causing beat interference, etc. For this purpose, a cancel circuit is placed at the input end of the stereo decoder. For example, Japanese Patent Publication No. 55-2101 discloses a stereo demodulation circuit equipped with a cancel circuit.
As shown in the figure, there is an input terminal 1 to which a stereo composite signal is applied, and output signals of 19KHz and 38KHz are generated in synchronization with the pilot signal in the stereo composite signal applied to the input terminal 1.
A PLL (phase locked loop) type signal generation circuit 2, a synchronous detection circuit 3 for synchronously detecting the composite signal according to the 19KHz output signal of the signal generation circuit 2, and a synchronous detection circuit 3 at the output end of the synchronous detection circuit 3. a connected low-pass filter 4; a DC amplifier circuit 5 connected to the output end of the low-pass filter 4;
a level control circuit 6 that controls the level of the 19KHz output signal of the signal generation circuit 2 according to the output signal of the DC amplifier circuit 5; and a stereo signal that is applied to the input terminal 1 according to the output signal of the level control circuit 6. A cancel circuit 7 that cancels the pilot signal included in the composite signal, a stereo decoder 8 that separates left and right stereo signals L and R according to the 38KHz output signal of the signal generation circuit 2, and the output of the DC amplifier circuit 5. The stereo display circuit 9 performs stereo display according to signals. In the synchronous detection circuit 3, the level of the pilot signal in the stereo composite signal is detected and applied to the level control circuit 6 via the low pass filter 4 and the DC amplifier circuit 5. Therefore, the level control circuit 6 adjusts the 19KHz output signal of the signal generating circuit 2 so that it is equal to the level of the pilot signal. Therefore, for example, by applying the output signal of the level control circuit 6 in reverse phase to the cancel circuit 7 and adding it to the pilot signal in the stereo composite signal, the pilot signal can be canceled. When the stereo composite signal with the pilot signal canceled is demodulated in the stereo decoder 8 using the output signal of the signal generation circuit 2, left and right stereo signals L and R are generated at the left and right output terminals 10 and 11. Furthermore, since the output signal of the DC amplifier circuit 5 is applied to the display circuit 9, when a pilot signal of a predetermined level or higher is present, the display circuit 9 indicates that the stereo reception state is present.

(c) Problems to be solved by the invention By the way, the degree of modulation of the pilot signal included in the stereo composite signal is determined to be 10%. For example, the level of the pilot signal contained in a 100mV stereo composite signal is
It becomes 10mV. However, since such a small level pilot signal must be synchronously detected and DC amplified to perform stereo display, the input offset voltage of the DC amplifier circuit 5 greatly influences the sensitivity of the stereo display. . In that case,
Since the DC amplifier circuit 5 is normally configured as a differential amplifier type and the level control circuit 6 is DC-coupled, the input impedance of the level control circuit 6 adversely affects the input offset voltage of the DC amplifier circuit 5. There was a problem with the sensitivity of the stereo display changing. Conversely, there is a problem in that the offset voltage of the DC amplifier circuit 5 affects the offset voltage of the level control circuit 6, thereby deteriorating the level follow-up characteristics when canceling the pilot signal.

(d) Means for solving the problems The present invention has been made in view of the above points, and includes first and second synchronous detection circuits for synchronously detecting pilot signals, and an output of the first synchronous detection circuit. a level control circuit that controls the level of the 19KHz signal synchronized with the stereo signal according to the signal; a stereo display circuit that performs stereo display according to the output signal of the second synchronous detection circuit; The present invention is characterized in that it includes a cancel circuit that cancels the pilot signal in the stereo composite signal accordingly.

(E) Effect According to the present invention, the level of the pilot signal can be detected by the output signal of the first synchronous detection circuit, and the pilot signal can be canceled.
Furthermore, stereo display can be performed using the output signal of the second synchronous detection circuit. Therefore, the output signals of the first and second synchronous detection circuits do not interfere with each other.

(F) Embodiment Figure 1 is a circuit diagram showing an embodiment of the present invention.
12 is an input terminal to which a stereo composite signal is applied, and 13 is a PLL (Phase Locked Loop) circuit which receives a 19KHz signal synchronized with the pilot signal in the stereo composite signal and
Signal generation circuit that generates a 38KHz subcarrier signal, 1
4 is a first synchronous detection circuit that synchronously detects the pilot signal using the 19KHz output signal of the signal generation circuit 13; 15 is a first low-pass filter that passes the output signal of the first synchronous detection circuit 14; A level control circuit 17 controls the level of the 19KHz output signal of the signal generation circuit 13 based on the output signal of the first low-pass filter 15; Pilot cancel circuit that performs pilot cancel by adding
8 is a decoder that separates the stereo composite signal from which the pilot signal has been canceled into left and right stereo signals using the output signal of the signal generation circuit 13; a second synchronous detection circuit that synchronously detects a pilot signal in the signal;
0 is a second low-pass filter that passes the output signal of the second synchronous detection circuit 19; 21 is a DC amplifier circuit that amplifies the output signal of the second low-pass filter 20; and 22 is driven by the output signal of the DC amplifier circuit 21. The display circuit 23 is a forced monaural circuit inserted into the transmission path of the 38 KHz subcarrier output signal of the signal generating circuit 13 and controlled by the output signal of the DC amplifier circuit 21.

Next, the operation will be explained. The stereo composite signal applied to the input terminal 12 is composed of a sum signal (L+R) of left and right stereo signals, a difference signal (L-R) of left and right stereo signals, and a pilot signal P. When the stereo composite signal is applied to the signal generation circuit 13, a 19KHz output signal synchronized with the pilot signal is generated at the first output terminal of the signal generation circuit 13, and a 19KHz output signal synchronized with the pilot signal is generated at the second output terminal. A 38KHz subcarrier output signal synchronized with the signal is generated. Also, the first and second
When a stereo composite signal is applied to the synchronous detection circuits 14 and 19, the stereo composite signal is synchronously detected by the 19KHz output signal, and the first and second synchronous detection circuits 14 and 19
A DC signal corresponding to the level of the pilot signal is generated at each output terminal. The output DC signal of the first synchronous detection circuit 14 passes through a first low-pass filter 15 and is applied to a level control circuit 16. In that case, since the 19KHz output signal of the signal generation circuit 13 is applied to the level control circuit 16, the level of the 19KHz output signal is controlled by the DC signal that has passed through the first low-pass filter 15, and the level A signal having the same frequency and level as the pilot signal contained in the stereo composite signal is generated at the output end of the control circuit 16.
The stereo composite signal applied to the input terminal 12 and the output signal of the level control circuit 16 are added (subtracted) in reverse phase by a pilot cancel circuit 17. Therefore, the input terminal of the decoder 18 receives a stereo composite signal from which the pilot signal has been removed, that is, a sum signal (L+R) and a difference signal (L-
R) is applied. Then, the stereo composite signal from which the pilot signal has been removed is converted into a 38KHz signal from the signal generation circuit 13 in the decoder 18.
Demodulated by the subcarrier signal, left and right stereo signals L and R are generated at output terminals 24 and 25, respectively.

On the other hand, the output DC signal of the second synchronous detection circuit 19 passes through a second low-pass filter 20 , is amplified by a DC amplifier circuit 21 , and is then applied to a display circuit 22 . If the pilot signal in the stereo composite signal has a sufficient level, the level of the DC signal will exceed the threshold level set in the DC amplifier circuit 21, so the display circuit 2
2 is activated and stereo display is performed. Furthermore, if the received signal is a monaural signal, or even if the received signal is a stereo signal but the electric field strength is weak and the level of the pilot signal is low, the level of the DC signal applied to the DC amplifier circuit 21 may exceed the threshold of the DC amplifier circuit 21. Since the hold level is not reached, the display circuit 2
2 does not work and displays monaural.

Further, the output signal of the DC amplifier circuit 21 is applied as a control signal to a forced monaural circuit 23 inserted between the signal generation circuit 13 and the decoder 18. Therefore, when receiving a monaural signal, when receiving a stereo signal with a weak electric field strength, and when a forced monaural signal is applied to the forced monaural terminal 26 provided in the second low-pass filter 20, the forced monaural circuit 23 is activated. and to the decoder 18.
Application of the 38KHz subcarrier signal is blocked. Since the decoder 18 does not demodulate when the 38KHz subcarrier signal is not applied, monaural signals are equally generated at the output terminals 24 and 25. However, in that case, the cancellation operation of the pilot signal continues and the pilot signal leakage causes
Deterioration of the SN ratio is prevented. For example, when a forced monaural signal is applied to the forced monaural terminal 26, a control signal is generated from the DC amplifier circuit 21, and the forced monaural circuit 23 is activated, so that the decoder 1
However, since the output DC signal of the first synchronous detection circuit 14 is applied to the level control circuit 16 via the first low-pass filter 15, the pilot cancel operation in the pilot cancel circuit 17 is performed normally. It can be done. Therefore, it is possible to simultaneously achieve the improvement of the SN ratio by performing forced monaural and the improvement of the SN ratio by pilot canceling, and achieve reception with a good SN ratio.

(G) Effect of the invention As described above, according to the invention, two synchronous detection circuits are provided, the pilot signal is canceled by the output signal of the first synchronous detection circuit, and the output signal of the second synchronous detection circuit is canceled. Since the stereo display is performed by using the stereo display, it is possible to prevent deterioration of the level follow-up characteristic during the pilot cancel operation, and also to prevent sensitivity changes in the stereo display. Further, if the forced monaural circuit is controlled by the output signal of the DC amplifier circuit for stereo display as in the embodiment, forced monaural operation can be performed simultaneously, and the SN ratio can be greatly improved.

[Brief explanation of the drawing]

FIG. 1 is a circuit diagram showing an embodiment of the present invention, and FIG. 2 is a circuit diagram showing a conventional stereo demodulation circuit. Explanation of main drawing numbers, 14...first synchronous detection circuit,
16... Level control circuit, 17... Pilot cancel circuit, 18... Decoder, 19... Second
Synchronous detection circuit, 21... DC amplifier circuit, 23...
Forced monaural circuit.

Claims (1)

[Scope of utility model registration request] A stereo demodulation circuit for separating left and right stereo signals from a stereo composite signal includes a signal generation circuit that generates an output signal synchronized with a pilot signal in the stereo composite signal, and a signal generation circuit that generates an output signal synchronized with a pilot signal in the stereo composite signal; a first synchronous detection circuit that synchronously detects a composite signal;
a level control circuit that controls the level of the output signal of the signal generation circuit according to the output signal of the synchronous detection circuit; and a cancel circuit that cancels the pilot signal included in the composite signal according to the output signal of the level control circuit. a second synchronous detection circuit that synchronously detects the composite signal according to the output signal of the signal generation circuit; and a stereo display circuit that performs stereo display according to the output signal of the second synchronous detection circuit. A stereo demodulation circuit characterized by: