JPS6312192A - Method of forming electric circuit - Google Patents

Method of forming electric circuit

Info

Publication number
JPS6312192A
JPS6312192A JP15562186A JP15562186A JPS6312192A JP S6312192 A JPS6312192 A JP S6312192A JP 15562186 A JP15562186 A JP 15562186A JP 15562186 A JP15562186 A JP 15562186A JP S6312192 A JPS6312192 A JP S6312192A
Authority
JP
Japan
Prior art keywords
circuit
etching
metal foil
forming
electric circuit
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP15562186A
Other languages
Japanese (ja)
Inventor
可伸 安部
熊沢 幸芳
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
Tamura Corp
Original Assignee
Tamura Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Tamura Corp filed Critical Tamura Corp
Priority to JP15562186A priority Critical patent/JPS6312192A/en
Publication of JPS6312192A publication Critical patent/JPS6312192A/en
Pending legal-status Critical Current

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  • Manufacturing Of Printed Circuit Boards (AREA)

Abstract

(57)【要約】本公報は電子出願前の出願データであるた
め要約のデータは記録されません。
(57) [Summary] This bulletin contains application data before electronic filing, so abstract data is not recorded.

Description

【発明の詳細な説明】 〔発明の目的〕 (産業上の利用分野) 本発明は、従来の印刷法または写真法に替わる電気回路
形成方法に関するものである。
DETAILED DESCRIPTION OF THE INVENTION OBJECTS OF THE INVENTION (Industrial Field of Application) The present invention relates to a method of forming electrical circuits as an alternative to conventional printing or photography methods.

(従来の技術) 従来、プリント基板、フレキシブルプリント基板、金属
板上に絶縁層を介し金属張りした基板等の回路形成方法
は、例えば第4図に示されるプリント基板の場合に示さ
れるように、絶縁材(例えばガラスエポキシ樹脂)11
上に張付けられた導電性金属箔(例えば銅箔)12の回
路部13となる部分に印刷法または写真法等の方法によ
りレジスト14を形成しく第4図a、b)、エツチング
することにより前記レジスト14により覆われていない
溶解部15を溶解除去しく第4図C)、最後に前記レジ
スト14を剥離して絶縁材11上に回路部13を形成す
る(第4図d)ことが一般的であった。
(Prior Art) Conventionally, methods for forming circuits such as printed circuit boards, flexible printed circuit boards, and circuit boards in which metal is covered with an insulating layer on a metal plate are as shown in the case of the printed circuit board shown in FIG. 4, for example. Insulating material (e.g. glass epoxy resin) 11
A resist 14 is formed on the portion of the conductive metal foil (for example, copper foil) 12 pasted thereon, which will become the circuit section 13, by a method such as a printing method or a photographic method (FIGS. 4a and 4b), and etching is performed to form a resist 14 on the portion that will become the circuit portion 13. Generally, the melted portion 15 not covered by the resist 14 is dissolved and removed (FIG. 4C), and finally the resist 14 is peeled off to form the circuit portion 13 on the insulating material 11 (FIG. 4D). Met.

(発明が解決しようとする問題点) この、従来の印刷法または写真法は、煩雑なレジスト膜
形成プロセスを必要とし、またエツチング液の廃液処理
に多大の費用を要し、さらに前記回路部13にはエツチ
ングの段階でアンダーカット16が生ずるので、高精度
の回路部が得られない欠点があった。最近は特に集積回
路の著しい発達に対応できる微細な回路部を得るための
高精度の回路形成方法が要望されている。
(Problems to be Solved by the Invention) This conventional printing method or photographic method requires a complicated process for forming a resist film, requires a large amount of cost for treating waste etching solution, and furthermore, However, since an undercut 16 occurs during the etching process, a highly accurate circuit section cannot be obtained. Recently, there has been a demand for a high-precision circuit forming method to obtain fine circuit parts that can cope with the rapid development of integrated circuits.

本発明はこのような点に鑑みなされたもので、高精度の
回路部を形成できる回路形成方法を提供することを目的
とするものである。
The present invention has been made in view of these points, and it is an object of the present invention to provide a circuit forming method that can form a highly accurate circuit section.

〔発明の構成〕[Structure of the invention]

(問題点を解決するための手段) 本発明は、第1図に示す絶縁材21上に導電性の金属箔
22を張付けてなる基板に回路を形成する方法において
、前記絶縁材21上の金属箔22のみに回路パターンに
応じた切込23を設けることにより、この金属箔22を
回路部24と溶解部25とに切り離して電気的に絶縁さ
せた後、前記回路部24を陰極として直流電圧を印加し
た状態で溶解部のエツチングを行う電気回路形成方法で
ある。
(Means for Solving the Problems) The present invention provides a method for forming a circuit on a substrate by pasting a conductive metal foil 22 on an insulating material 21 shown in FIG. By providing a notch 23 in accordance with the circuit pattern only in the foil 22, the metal foil 22 is separated into a circuit portion 24 and a melting portion 25 and electrically insulated, and then DC voltage is applied using the circuit portion 24 as a cathode. This is an electric circuit formation method in which etching is performed on the melted part while applying

(作用) 本発明は、前記金属箔22に形成された切込23によっ
て回路部24を溶解部25から電気的に絶縁し、前記回
路部24のみに陰極電位を印加することにより、この回
路部24はエツチング液中にあってもエツチングされる
ことなく絶縁材21上に残留し、溶解部25のみがエツ
チング液中に溶出される。
(Function) The present invention electrically insulates the circuit portion 24 from the melting portion 25 by the notch 23 formed in the metal foil 22, and applies a cathode potential only to the circuit portion 24. 24 remains on the insulating material 21 without being etched even if it is in the etching solution, and only the dissolved portion 25 is eluted into the etching solution.

(実施例) 以下、本発明を第1図乃至第3図に示される実施例を参
照して詳細に説明する。
(Example) Hereinafter, the present invention will be explained in detail with reference to the example shown in FIGS. 1 to 3.

第1図Aに示されるように、絶縁材(例えばガラスエポ
キシ樹脂)21の全面に導電性の金属箔(例えば銅箔)
22を張付けてなる基板にあって、前記金属箔22のみ
にカッター、レーザー、高圧水またはプレス等によって
、第1図Bに示される切込23を回路パターンに応じて
設ける。これにより、前記金属箔22を回路部24と溶
解部25とに切り離し、この回路部24と溶解部25と
を電気的に絶縁状態とする。
As shown in FIG. 1A, conductive metal foil (for example, copper foil) is applied to the entire surface of the insulating material (for example, glass epoxy resin) 21.
22, cutouts 23 shown in FIG. 1B are formed only in the metal foil 22 using a cutter, laser, high-pressure water, press, etc. according to the circuit pattern. As a result, the metal foil 22 is separated into the circuit portion 24 and the melting portion 25, and the circuit portion 24 and the melting portion 25 are electrically insulated.

次に、第2図に示されるようにエツチング槽31内の過
硫安溶液等のエツチング液32中に前記基板と、チタン
やカーボン等の不溶解性導電体33とを浸漬し、そして
前記基板の回路部24を陰極とするとともに前記不溶解
性導電体33を陽極として直゛流電源34に接続し、直
流電圧を印加した状態でエツチングすることにより、レ
ジストを形成ゼずとも前記溶解部25のみがエツチング
液32中に溶出し、回路部24はエツチング液中にもか
かわらず陰極電位が印加されているためエツチングされ
ることなく残留し、その結果第1図Cに示されるように
目的とする回路部24が得られる。
Next, as shown in FIG. 2, the substrate and an insoluble conductor 33 such as titanium or carbon are immersed in an etching solution 32 such as an ammonium persulfate solution in an etching tank 31, and then the substrate is etched. By connecting the circuit portion 24 as a cathode and the insoluble conductor 33 as an anode to a DC power source 34, and performing etching while applying a DC voltage, only the dissolving portion 25 can be etched without forming a resist. is eluted into the etching solution 32, and since the cathode potential is applied to the circuit portion 24 even though it is in the etching solution, it remains without being etched, and as a result, as shown in FIG. A circuit section 24 is obtained.

以上は本発明の一実施例に過ぎず、例えば直流電圧を大
とすることにより、最初の金属箔(銅箔)22の厚さが
薄い場合でも回路部24は溶解部25からエツチング液
中に溶出された金属(銅)で鍍金され、厚い金属箔(銅
箔)の回路部24を得ることもできる。このようにエツ
チング液中で金属鍍金されるから、1工程でエツチング
と鍍金とを同時に行え、しかも前記溶解部25から溶出
した金属(銅)イオンを再び鍍金材として回路部24に
析出させることができるので、省資源、公害防止上極め
て有利であり、アンダーカットのない高精度の回路部2
4が効率良く得られる。
The above is just one embodiment of the present invention; for example, by increasing the DC voltage, even if the initial metal foil (copper foil) 22 is thin, the circuit section 24 can be etched into the etching solution from the dissolving section 25. It is also possible to obtain the circuit portion 24 of thick metal foil (copper foil) by plating with the eluted metal (copper). Since metal plating is performed in the etching solution in this way, etching and plating can be performed simultaneously in one step, and furthermore, the metal (copper) ions eluted from the melting section 25 can be deposited on the circuit section 24 again as a plating material. This is extremely advantageous in terms of resource saving and pollution prevention, and provides a high-precision circuit section 2 with no undercuts.
4 can be obtained efficiently.

また、前記直流電圧を制御することにより、前記陰極回
路部24をエツチング、変化なし、鍍金またはその途中
段階と、どのようにも容易に制御できる。
Further, by controlling the DC voltage, the cathode circuit portion 24 can be easily controlled in any manner such as etching, no change, plating, or an intermediate stage thereof.

また前記実施例はエツチング液32中で行ったが、第3
図に示されるようにエツチング槽31内にスプレーされ
た露状雰囲気中で行ってもよく、この場合は、スプレー
ノズル(例えばチタン製)41を陽極とすればよく、こ
のノズル41にはポンプ42によって槽内のエツチング
液32が加圧供給される。
Further, although the above embodiment was carried out in the etching solution 32,
As shown in the figure, etching may be carried out in a dew atmosphere sprayed into the etching bath 31. In this case, a spray nozzle (for example, made of titanium) 41 may be used as an anode, and a pump 42 is attached to this nozzle 41. The etching liquid 32 in the tank is supplied under pressure.

このように、本発明は、実施形態を問わず電圧を印加し
ながらエツチングする方法であれば全て含む。
As described above, the present invention includes all methods that perform etching while applying a voltage, regardless of the embodiment.

また、第2図または第3図では単一の陰極回路部24が
示されているがその必要はなく、むしろこの陰極回路部
24は多数ある場合が普通であり、その場合、各々の陰
極回路部24に異なる電圧を印加するようにしてもよい
Furthermore, although a single cathode circuit section 24 is shown in FIG. Different voltages may be applied to the portions 24.

さらに、前記実施例ではエツチング液として過硫安溶液
を一例として上げたが、対象とする金属に応じて、これ
以外の全てのエツチング液を使用できることは言うまで
もない。
Further, in the above embodiments, an ammonium persulfate solution was used as an etching solution, but it goes without saying that any etching solution other than this can be used depending on the target metal.

〔発明の効果〕〔Effect of the invention〕

本発明によれば、絶縁材上の金属箔のみに回路パターン
に応じた切込を設けることにより、この金属箔を回路部
と溶解部とに切り離して電気的に絶縁させた後、前記回
路部を陰極として直流電圧を印加した状態で溶解部のエ
ツチングを行う回路形成方法であり、従来のようにレジ
ストを全く使用しないとともに、回路部が溶解部から切
り離されているから、この回路部にはエツチングの段階
でアンダーカットが生じない。このため高精度の回路部
を形成できる。また従来の印刷法または写真法のような
煩雑なレジスト膜形成プロセス〈例えばレジスト塗布、
露光処理等)を必要としない。さらに回路部を陰極とし
て直流電圧を印加することから、1工程でエツチングと
鍍金とを同時にでき、しかも前記溶解部からエツチング
液中に溶出した金属イオンを再び鍍金として回路部に析
出させることも可能であり、省資源および公害防止の面
で優れた効果を有する。
According to the present invention, by providing cuts corresponding to the circuit pattern only in the metal foil on the insulating material, the metal foil is separated into the circuit part and the melting part and electrically insulated, and then the circuit part This is a circuit formation method in which the molten part is etched while a DC voltage is applied to the molten metal as a cathode. Unlike conventional methods, no resist is used at all, and the circuit part is separated from the molten part. No undercuts occur during the etching stage. Therefore, a highly accurate circuit section can be formed. In addition, complicated resist film formation processes such as conventional printing methods or photographic methods (e.g. resist coating,
(exposure processing, etc.) is not required. Furthermore, since DC voltage is applied using the circuit section as a cathode, etching and plating can be performed simultaneously in one step, and metal ions eluted from the dissolving section into the etching solution can be deposited on the circuit section as plating again. It has excellent effects in terms of resource saving and pollution prevention.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の電気回路形成方法の工程を示す基板の
断面図、第2図はその方法におけるエツチングの実施例
を示す断面図、第3図はそのエツチングの他の実施例を
示す断面図、第4図は従来の電気回路形成方法の工程を
示す基板の断面図である。 21・・絶縁材、22・・金属箔、23・・切込、24
・・回路部、25・・溶解部。
FIG. 1 is a cross-sectional view of a substrate showing the steps of the electric circuit forming method of the present invention, FIG. 2 is a cross-sectional view showing an example of etching in the method, and FIG. 3 is a cross-sectional view showing another example of etching. 4 are cross-sectional views of a substrate showing the steps of a conventional electric circuit forming method. 21...Insulating material, 22...Metal foil, 23...Notch, 24
...Circuit part, 25...Dissolution part.

Claims (1)

【特許請求の範囲】[Claims] (1)絶縁材上に導電性の金属箔を張付けてなる基板に
回路を形成する方法において、前記絶縁材上の金属箔の
みに回路パターンに応じた切込を設けることにより、こ
の金属箔を回路部と溶解部とに切り離して電気的に絶縁
させた後、前記回路部を陰極として直流電圧を印加した
状態で溶解部のエッチングを行うことを特徴とする電気
回路形成方法。
(1) In a method of forming a circuit on a board made by pasting conductive metal foil on an insulating material, this metal foil is 1. A method for forming an electric circuit, which comprises separating the circuit part and the melting part and electrically insulating them, and then etching the melting part while applying a DC voltage using the circuit part as a cathode.
JP15562186A 1986-07-02 1986-07-02 Method of forming electric circuit Pending JPS6312192A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP15562186A JPS6312192A (en) 1986-07-02 1986-07-02 Method of forming electric circuit

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP15562186A JPS6312192A (en) 1986-07-02 1986-07-02 Method of forming electric circuit

Publications (1)

Publication Number Publication Date
JPS6312192A true JPS6312192A (en) 1988-01-19

Family

ID=15610009

Family Applications (1)

Application Number Title Priority Date Filing Date
JP15562186A Pending JPS6312192A (en) 1986-07-02 1986-07-02 Method of forming electric circuit

Country Status (1)

Country Link
JP (1) JPS6312192A (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007197785A (en) * 2006-01-27 2007-08-09 Japan Aerospace Exploration Agency Electrochemical etching performed in form of reaction liquid fluidized on working face

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
JP2007197785A (en) * 2006-01-27 2007-08-09 Japan Aerospace Exploration Agency Electrochemical etching performed in form of reaction liquid fluidized on working face
JP4568884B2 (en) * 2006-01-27 2010-10-27 独立行政法人 宇宙航空研究開発機構 Electrochemical etching with the reaction liquid flowing on the machined surface

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