CN116744563A - Circuit board and manufacturing method thereof - Google Patents
Circuit board and manufacturing method thereof Download PDFInfo
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- CN116744563A CN116744563A CN202210206616.9A CN202210206616A CN116744563A CN 116744563 A CN116744563 A CN 116744563A CN 202210206616 A CN202210206616 A CN 202210206616A CN 116744563 A CN116744563 A CN 116744563A
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- Prior art keywords
- copper layer
- circuit board
- preset position
- manufacturing
- circuit
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- 238000004519 manufacturing process Methods 0.000 title claims abstract description 55
- RYGMFSIKBFXOCR-UHFFFAOYSA-N Copper Chemical compound [Cu] RYGMFSIKBFXOCR-UHFFFAOYSA-N 0.000 claims abstract description 241
- 229910052802 copper Inorganic materials 0.000 claims abstract description 239
- 239000010949 copper Substances 0.000 claims abstract description 239
- 239000004020 conductor Substances 0.000 claims abstract description 90
- 238000005530 etching Methods 0.000 claims abstract description 83
- 239000000758 substrate Substances 0.000 claims abstract description 66
- 238000000034 method Methods 0.000 claims abstract description 61
- 238000005520 cutting process Methods 0.000 claims abstract description 52
- 239000002184 metal Substances 0.000 claims description 50
- 229910052751 metal Inorganic materials 0.000 claims description 50
- 238000010030 laminating Methods 0.000 claims description 7
- 239000011810 insulating material Substances 0.000 claims description 6
- 238000009713 electroplating Methods 0.000 claims description 5
- 238000005553 drilling Methods 0.000 claims description 4
- 238000000608 laser ablation Methods 0.000 claims description 4
- 238000003698 laser cutting Methods 0.000 claims description 4
- 238000001465 metallisation Methods 0.000 claims description 4
- XLYOFNOQVPJJNP-UHFFFAOYSA-N water Substances O XLYOFNOQVPJJNP-UHFFFAOYSA-N 0.000 claims description 4
- 238000010586 diagram Methods 0.000 description 46
- 230000009286 beneficial effect Effects 0.000 description 4
- 101100201843 Cyprinus carpio rsph1 gene Proteins 0.000 description 3
- 101100328516 Mus musculus Cnpy2 gene Proteins 0.000 description 3
- 239000011889 copper foil Substances 0.000 description 2
- 230000003628 erosive effect Effects 0.000 description 2
- 239000011248 coating agent Substances 0.000 description 1
- 238000000576 coating method Methods 0.000 description 1
- 230000007797 corrosion Effects 0.000 description 1
- 238000005260 corrosion Methods 0.000 description 1
- 238000009826 distribution Methods 0.000 description 1
- 238000005516 engineering process Methods 0.000 description 1
- 239000007788 liquid Substances 0.000 description 1
- 238000007747 plating Methods 0.000 description 1
- 238000003825 pressing Methods 0.000 description 1
- 230000001681 protective effect Effects 0.000 description 1
- 238000009751 slip forming Methods 0.000 description 1
Classifications
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/04—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed mechanically, e.g. by punching
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K1/00—Printed circuits
- H05K1/02—Details
- H05K1/09—Use of materials for the conductive, e.g. metallic pattern
-
- H—ELECTRICITY
- H05—ELECTRIC TECHNIQUES NOT OTHERWISE PROVIDED FOR
- H05K—PRINTED CIRCUITS; CASINGS OR CONSTRUCTIONAL DETAILS OF ELECTRIC APPARATUS; MANUFACTURE OF ASSEMBLAGES OF ELECTRICAL COMPONENTS
- H05K3/00—Apparatus or processes for manufacturing printed circuits
- H05K3/02—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding
- H05K3/06—Apparatus or processes for manufacturing printed circuits in which the conductive material is applied to the surface of the insulating support and is thereafter removed from such areas of the surface which are not intended for current conducting or shielding the conductive material being removed chemically or electrolytically, e.g. by photo-etch process
Landscapes
- Engineering & Computer Science (AREA)
- Microelectronics & Electronic Packaging (AREA)
- Manufacturing & Machinery (AREA)
- Manufacturing Of Printed Circuit Boards (AREA)
Abstract
The application provides a circuit board and a manufacturing method thereof, wherein the manufacturing method of the circuit board comprises the following steps: providing an insulating substrate; manufacturing a conductor copper layer on at least one side of the insulating substrate; deep cutting is carried out at a first preset position on the surface of the conductor copper layer; etching the first preset position on the surface of the conductor copper layer after deep cutting to expose the insulating substrate at the first preset position, so that the conductor copper layer forms a circuit copper layer, and the circuit board is obtained. By the method, the manufacture of the high-density circuit with the thick copper layer is realized.
Description
Technical Field
The application relates to the technical field of circuit boards, in particular to a circuit board and a manufacturing method thereof.
Background
With the rapid development of the electronic industry, the manufacturing technology of circuit boards as basic components of electronic products is becoming more and more important, and the requirements for manufacturing circuits and holes on the circuit boards are becoming finer and finer.
The existing circuit manufacturing of the printed circuit board is mainly divided into a Tenting process and an mSAP process, wherein the Tenting process and the mSAP process are respectively carried out by firstly forming a circuit pattern on a copper electroplating surface film, and then copper plating is carried out to complete circuit transfer. However, the Tenting process has the problems of high hardware configuration cost requirement, unstable consistency in circuit etching, overlarge side etching of the edge of the circuit, influence on circuit stability and the like, and the mSAP process has the problems of high cost, low efficiency, limitation on the thickness of a dry film, coating and film clamping risk and the like because an ultrathin copper foil needs to be matched with a protective copper foil.
Therefore, there is a need to develop new methods for manufacturing circuit boards to overcome the existing technical difficulties.
Disclosure of Invention
The application provides a circuit board and a manufacturing method thereof, which can ensure the thickness of copper and realize the manufacturing of high-density circuits with thick copper layers.
In order to solve the above problems, the present application provides a method for manufacturing a circuit board, the method comprising: providing an insulating substrate; manufacturing a conductor copper layer on at least one side of the insulating substrate; deep cutting is carried out at a first preset position on the surface of the conductor copper layer; etching the first preset position on the surface of the conductor copper layer after deep cutting to expose the insulating substrate at the first preset position, so that the conductor copper layer forms a circuit copper layer, and the circuit board is obtained.
Wherein the depth of the deep cut is not less than 50% of the thickness of the conductor copper layer and not more than 95% of the thickness of the conductor copper layer.
Wherein the deep cutting process comprises laser cutting, laser ablation, ion cutting and water jet cutting.
Before the step of deep cutting at the first preset position on the surface of the conductor copper layer, the method further comprises the following steps: attaching a photosensitive etching-resistant film on the surface of the conductor copper layer at a non-preset position; after the step of etching the first preset position on the surface of the conductor copper layer after deep cutting, the method further comprises the following steps: and removing the photosensitive etching-resistant film to obtain the circuit board.
Wherein, the step of laminating the photosensitive etching resist film at a non-preset position on the surface of the conductor copper layer comprises the following steps: attaching a photosensitive etching-resistant film on the surface of one side of the conductor copper layer, which is far away from the insulating substrate; and removing the photosensitive etching-resistant film at the first preset position on the surface of the conductor copper layer by using an exposure and development process so as to keep the photosensitive etching-resistant film at the non-preset position.
After the step of obtaining the circuit board, the method further comprises the following steps: taking the circuit board as a circuit board to be processed, and laminating an insulating material on at least one side surface of the circuit board to be processed to form an insulating layer; manufacturing a metal copper layer on the surface of one side of the insulating layer, which is far away from the circuit board to be processed; deep cutting is carried out at a second preset position on the surface of the metal copper layer; etching at a second preset position of the metal copper layer after deep cutting to form a circuit copper layer on the metal copper layer so as to obtain the circuit board with multiple layers of circuit copper layers.
Wherein, the step of laminating insulating materials on at least one side surface of the circuit board to be processed to form an insulating layer further comprises the following steps: and drilling and hole metallization treatment are carried out on the insulating layer so as to enable the metal copper layer to be connected with the conductor copper layer.
Wherein, the step of manufacturing a metal copper layer on the surface of one side of the insulating layer far away from the circuit board to be processed comprises the following steps: and the metal copper layer is arranged on the surface of one side of the insulating layer, which is far away from the circuit board to be processed, by utilizing a whole plate electroplating process.
Before the step of deep cutting at the preset position on the surface of the metal copper layer, the method comprises the following steps: attaching a photosensitive etching-resistant film on the surface of the metal copper layer; and covering part of the surface of the metal copper layer with the photosensitive etching-resistant film by using an exposure and development process, so that the metal copper layer which is not covered with the photosensitive etching-resistant film forms the patterned second preset position.
The present application also provides a circuit board comprising: an insulating substrate; and the conductor copper layer covers part of the surface of the insulating substrate to form a circuit copper layer.
The beneficial effects of the application are as follows: and pre-cutting the conductor copper layer at the first preset position through a deep cutting process, and then deep etching the conductor copper layer at the first preset position through an etching process so as to clean the conductor copper layer at the first preset position and expose the insulating substrate at the first preset position, thereby forming a circuit copper layer partially covering the insulating substrate on the insulating substrate by the conductor copper layer. Compared with the existing process for forming the circuit copper layer by only etching the conductor copper layer, the process for forming the circuit copper layer by cutting and controlling the depth and then etching reduces the time for etching the side edge of the conductor copper layer by the etching solution, thereby reducing the side etching of the circuit copper layer and improving the precision of the circuit copper layer. Particularly, when the thickness of the conductor copper layer or the circuit copper layer is thicker, the side corrosion of the circuit copper layer is greatly reduced by controlling deep cutting, and the stability of the circuit copper layer is improved.
Drawings
In order to more clearly illustrate the technical solutions of the embodiments of the present application, the drawings required for the description of the embodiments will be briefly described below, and it is apparent that the drawings in the following description are only some embodiments of the present application, and other drawings may be obtained according to these drawings without inventive effort for a person skilled in the art.
FIG. 1 is a schematic flow chart of a first embodiment of a method for manufacturing a circuit board according to the present application;
FIG. 2 is a flow chart of a second embodiment of a method for manufacturing a circuit board according to the present application;
FIG. 3a is a schematic diagram of a second embodiment of an insulating substrate according to the present application;
FIG. 3b is a schematic diagram illustrating an embodiment of the step S22 in FIG. 2;
FIG. 3c is a schematic diagram illustrating an embodiment of the step S23 in FIG. 2;
FIG. 3d is a schematic diagram illustrating an embodiment of the step S24 in FIG. 2;
FIG. 3e is a schematic diagram illustrating an embodiment of the step S25 in FIG. 2;
FIG. 3f is a schematic diagram illustrating an embodiment of the step S26 in FIG. 2;
FIG. 3g is a schematic diagram illustrating an embodiment of the step S27 in FIG. 2;
FIG. 4 is a flow chart of a third embodiment of a method for manufacturing a circuit board according to the present application;
FIG. 5a is a schematic diagram of an embodiment of a circuit board to be processed according to the present application;
FIG. 5b is a schematic diagram illustrating an embodiment of the step S42 in FIG. 4;
FIG. 5c is a schematic diagram illustrating an embodiment of the step S43 in FIG. 4;
FIG. 5d is a schematic diagram illustrating an embodiment of the step S44 of FIG. 4;
FIG. 5e is a schematic diagram of a first embodiment of a circuit board with multiple copper layers according to the present application;
fig. 6 is a schematic structural diagram of a fourth embodiment of a method for manufacturing a circuit board according to the present application;
FIG. 7a is a schematic diagram illustrating an embodiment of step S61 in FIG. 6;
FIG. 7b is a schematic diagram illustrating an embodiment of the step S62 of FIG. 6;
FIG. 7c is a schematic diagram illustrating an embodiment of the step S63 of FIG. 6;
FIG. 7d is a schematic diagram illustrating an embodiment of step S64 in FIG. 6;
FIG. 7e is a schematic diagram illustrating an embodiment of step S65 in FIG. 6;
FIG. 7f is a schematic diagram illustrating an embodiment of step S66 in FIG. 6;
FIG. 7g is a schematic diagram illustrating an embodiment of step S67 in FIG. 6;
FIG. 7h is a schematic diagram illustrating an embodiment of the step S68 in FIG. 6;
FIG. 7i is a schematic diagram of a second embodiment of a circuit board with a copper layer with multiple circuit traces according to the present application;
fig. 8 is a schematic structural diagram of an embodiment of a circuit board of the present application.
Detailed Description
The following description of the embodiments of the present application will be made clearly and completely with reference to the accompanying drawings, in which it is apparent that the embodiments described are only some embodiments of the present application, but not all embodiments. All other embodiments, which can be made by those skilled in the art based on the embodiments of the application without making any inventive effort, are intended to be within the scope of the application.
It should be noted that, if directional indications (such as up, down, left, right, front, and rear … …) are included in the embodiments of the present application, the directional indications are merely used to explain the relative positional relationship, movement conditions, etc. between the components in a specific posture (as shown in the drawings), and if the specific posture is changed, the directional indications are correspondingly changed.
Reference herein to "an embodiment" means that a particular feature, structure, or characteristic described in connection with the embodiment may be included in at least one embodiment of the application. The appearances of such phrases in various places in the specification are not necessarily all referring to the same embodiment, nor are separate or alternative embodiments mutually exclusive of other embodiments. Those of skill in the art will explicitly and implicitly appreciate that the embodiments described herein may be combined with other embodiments.
Referring to fig. 1, fig. 1 is a schematic flow chart of a first embodiment of a method for manufacturing a circuit board according to the present application. As shown in fig. 1, the method for manufacturing the circuit board includes:
step S11: an insulating substrate is provided.
In this embodiment, the insulating substrate is an insulating dielectric layer, and in other embodiments, the insulating substrate may be a surface-insulated PCB board.
Step S12: and manufacturing a conductor copper layer on at least one side of the insulating substrate.
In one embodiment, a conductor copper layer is manufactured on one side surface of an insulating substrate; in another embodiment, conductor copper layers are fabricated on opposite side surfaces of an insulating substrate. The specific manufacturing method comprises the following steps: and pressing a conductor copper layer on the surface of the insulating substrate, or manufacturing the conductor copper layer on the whole surface of the insulating substrate by utilizing a whole plate electroplating process. The conductor copper layer covers one side/two opposite side surfaces of the insulating substrate.
Step S13: and performing deep cutting at a first preset position on the surface of the conductor copper layer.
The method comprises the following steps: and marking a first preset position on the surface of one side of the conductor copper layer, which is far away from the insulating substrate. The method specifically comprises the step of attaching a photosensitive etching-resistant film to part of the surface of the conductor copper layer, wherein the surface of the conductor copper layer, which is not attached with the photosensitive etching-resistant film, is a first preset position. The photosensitive etching-resistant film attached to the surface of the conductor copper layer is in a circuit pattern, and is manufactured according to the required circuit copper layer.
In this embodiment, the depth cutting is performed on the conductor copper layer at the first preset position by using a cutting process/a depth control process. Deep cut refers to cutting in a direction perpendicular to the surface of the conductor copper layer, i.e. longitudinal cutting. The deep cutting process comprises laser cutting, laser ablation, ion cutting, water jet cutting and the like.
In this embodiment, assuming that the thickness of the conductive copper layer is H, the depth of the deep cut is not less than h×50% and not more than h×95%. In this embodiment, the deeper the depth of the deep cut, the less the etching time in step S14, the better the etching solution can avoid etching the side wall of the conductor copper layer, thereby improving the reliability of the circuit copper layer, but if the depth of the deep cut is too large, the insulating substrate is easily cut, and damage is caused to the insulating substrate, so the cutting depth is equal to or greater than h×50% and equal to or less than h×95%.
Step S14: etching is carried out at a first preset position on the surface of the conductor copper layer after deep cutting, and the insulating substrate at the first preset position is exposed, so that the conductor copper layer forms a circuit copper layer, and the circuit board is obtained.
And etching the conductor copper layer at a first preset position by using the etching solution, namely continuing etching at the position after cutting to remove the residual conductor copper layer, exposing the insulating substrate at the first preset position, and enabling the residual conductor copper layer to form a circuit copper layer on the insulating substrate, thereby obtaining the circuit board with the circuit copper layer.
The present application provides a second method for manufacturing a circuit board, and referring to fig. 2 specifically, fig. 2 is a schematic flow chart of a second embodiment of the method for manufacturing a circuit board of the present application. As shown in fig. 2, the method for manufacturing the circuit board includes:
step S21: an insulating substrate is provided.
The structure of the insulating substrate is shown in fig. 3a, and fig. 3a is a schematic structural diagram of a second embodiment of the insulating substrate according to the present application. In the present embodiment, the insulating substrate 30 is a rectangular plate member having a certain thickness.
Step S22: and manufacturing a conductor copper layer on at least one side of the insulating substrate.
In this embodiment, conductor copper layers are formed on opposite side surfaces of an insulating substrate. Specifically, referring to fig. 3b, fig. 3b is a schematic structural diagram of an embodiment of step S22 in fig. 2. The conductor copper layer 31 covers the entire surface of the insulating substrate 30.
Step S23: and adhering a photosensitive etching-resistant film on the surface of one side of the conductor copper layer, which is far away from the insulating substrate.
Referring to fig. 3c, fig. 3c is a schematic structural diagram of an embodiment of step S23 in fig. 2. As shown in fig. 3c, the photosensitive etching resist film 32 covers a surface of the conductive copper layer 31 on a side away from the insulating substrate 30.
Step S24: and removing the photosensitive etching-resistant film at the first preset position on the surface of the conductor copper layer by using an exposure and development process so as to keep the photosensitive etching-resistant film at the non-preset position.
Specifically, the photosensitive etching resist film is patterned according to the pattern of the wiring copper layer required, corresponding to the wiring copper layer. Specifically, the photosensitive etching-resistant film at the first preset position on the surface of the conductor copper layer is removed through exposure and development processes, so that the left photosensitive etching-resistant film forms a pattern corresponding to the circuit copper layer.
Referring to fig. 3d, fig. 3d is a schematic structural diagram of an embodiment of step S24 in fig. 2. As shown in fig. 3d, the photosensitive etching resist film 32 covers a portion of the surface of the conductor copper layer 31, and forms a pattern corresponding to the wiring copper layer. The surface of the conductor copper layer 31 not covered by the photosensitive etching resist film 32 is a first preset position.
Step S25: and performing deep cutting at a first preset position on the surface of the conductor copper layer.
Exposing the conductor copper layer at the first preset position through the step S24, and cutting the conductor copper layer at the first preset position to a preset depth through a depth cutting process. Wherein the preset depth is related to the thickness of the conductor copper layer, in particular, the preset depth is not less than 50% of the thickness of the conductor copper layer and not more than 95% of the thickness of the conductor copper layer.
Referring specifically to fig. 3e, fig. 3e is a schematic structural diagram of an embodiment of step S25 in fig. 2. As shown in fig. 3e, the conductor copper layer 31 at the first preset position is lower than the thickness of the conductor copper layer 31 at the other positions.
Step S26: etching is carried out at a first preset position on the surface of the conductor copper layer after deep cutting, and the insulating substrate at the first preset position is exposed, so that the conductor copper layer forms a circuit copper layer.
Specifically, etching the conductor copper layer at the first preset position by using etching liquid to remove the conductor copper layer at the first preset position, exposing the insulating substrate at the first preset position, and forming a circuit copper layer on the insulating substrate in a pattern distribution mode by the conductor copper layer.
Referring to fig. 3f, fig. 3f is a schematic structural diagram of an embodiment of step S26 in fig. 2. As shown in fig. 3f, the conductor copper layer 31 covers a portion of the surface of the insulating substrate 30 to form a patterned circuit copper layer. The photosensitive etching resist film 32 covers the surface of the conductor copper layer 31.
Step S27: and removing the photosensitive etching-resistant film to obtain the circuit board.
The photosensitive etching resist film on the surface of the conductor copper layer 31 is removed to obtain a circuit board containing a wiring copper layer. Referring specifically to fig. 3g, fig. 3g is a schematic structural diagram of an embodiment of step S27 in fig. 2. As shown in fig. 3g, the circuit board includes an insulating substrate 30 and a conductive copper layer 31, and the conductive copper layer 31 is patterned to cover the insulating substrate 30.
The beneficial effects of this embodiment are: the conductor copper layer is pre-cut through the cutting process, and then the conductor copper layer is etched through the etching process, so that the circuit copper layer with the preset pattern is obtained, and the problem that the stability of the circuit copper layer is affected due to large side etching caused by etching the conductor copper layer through the etching process is avoided. And for the circuit manufacture of thicker conductor copper layers, the depth cutting is carried out through the cutting process, so that the side etching time of the conductor copper layers is reduced, the distance between the side walls of the circuit copper layers is reduced, the precision of the circuit copper layers is improved, and therefore, the high-density circuit manufacture of the thick copper layers is utilized.
The present application also provides a third method for manufacturing a circuit board, referring to fig. 4, fig. 4 is a schematic flow chart of a third embodiment of the method for manufacturing a circuit board according to the present application. As shown in fig. 4, the method for manufacturing the circuit board includes:
step S41: a circuit board to be processed is provided.
The circuit board to be processed at least comprises a circuit copper layer. In this embodiment, the circuit boards in the first embodiment and the second embodiment are continued to be processed as the circuit boards to be processed. That is, the second circuit copper layer is continuously formed on the circuit board, and in other embodiments, the circuit board to be processed includes multiple circuit copper layers, and the nth circuit copper layer may be formed on the circuit board, which is not limited herein.
Referring to fig. 5a, fig. 5a is a schematic structural diagram of an embodiment of a circuit board to be processed according to the present application. As shown in fig. 5a, the circuit board to be processed includes an insulating substrate 50 and a first layer of circuit copper layer 51, and the first layer of circuit copper layer 51 covers a part of the surface of the insulating substrate 50.
Step S42: an insulating layer is formed by laminating an insulating material on at least one side surface of the circuit board to be processed.
In this embodiment, insulating layers are formed on the opposite side surfaces of the circuit board to be processed. In other embodiments, an insulating layer is fabricated on one side surface of the circuit board to be processed.
Fig. 5b is a schematic structural diagram of an embodiment of step S42 in fig. 4. As shown in fig. 5b, the insulating layer 52 covers the first layer of wiring copper layer 51 and the surface of the insulating substrate 50.
Step S43: and manufacturing a metal copper layer on the surface of one side of the insulating layer, which is far away from the circuit board to be processed.
Referring specifically to fig. 5c, fig. 5c is a schematic structural diagram of an embodiment of step S43 in fig. 4. As shown in fig. 5c, a metallic copper layer 53 covers one side surface of the insulating layer 52.
Step S44: and performing deep cutting at a second preset position on the surface of the metal copper layer.
The second preset position may be the same as or different from the first preset position. The second preset position is designed according to the graph of the second circuit copper layer.
The method comprises the steps of leaving a second preset position on the surface of the metal copper layer, and then carrying out deep cutting on the metal copper layer at the second preset position. Wherein, the method comprises covering part of the surface of the metal copper layer by a photosensitive etching-resistant film to expose the metal copper layer at the second preset position.
Referring specifically to fig. 5d, fig. 5d is a schematic structural diagram of an embodiment of step S44 in fig. 4. As shown in fig. 5d, the metal copper layer 53 is formed with a groove at the second predetermined position, and the depth of the groove is not less than 50% of the thickness of the metal copper layer 53 and not more than 95% of the thickness of the metal copper layer 53.
Step S45: etching is carried out at a second preset position of the deeply cut metal copper layer, so that the metal copper layer forms a circuit copper layer, and a circuit board with multiple circuit copper layers is obtained.
Referring to fig. 5e, fig. 5e is a schematic structural diagram of a circuit board with a copper layer with multiple circuit layers according to a first embodiment of the present application. As shown in fig. 5e, the circuit board includes an insulating substrate 50, a first layer of wiring copper layer 51, an insulating layer 52, and a second layer of wiring copper layer 53. The first circuit copper layer 51 covers a part of the surface of the insulating substrate 50, the insulating layer 52 covers the first copper layer 51 and the surface of the insulating substrate 50, and the second circuit copper layer 53 covers a part of the surface of the insulating layer 52.
The beneficial effects of this embodiment are: by the method, the multi-layer circuit copper layer is sequentially manufactured on the circuit board to form the circuit board containing the multi-layer circuit copper layer, and the method is suitable for manufacturing the circuit copper layer with high thickness and high fine density by cutting and etching, so that side erosion of the circuit copper layer is reduced, and the fine density of the circuit copper layer is improved.
The application also provides a manufacturing method of the fourth circuit board, and referring to fig. 6 specifically, fig. 6 is a schematic structural diagram of a fourth embodiment of the manufacturing method of the circuit board of the application. As shown in fig. 6, the method for manufacturing the circuit board includes:
step S61: a circuit board to be processed is provided.
Referring to fig. 7a, fig. 7a is a schematic structural diagram of an embodiment of step S61 in fig. 6. As shown in fig. 7a, the circuit board to be processed includes an insulating substrate 70 and a first layer of circuit copper layer 71, and the first layer of circuit copper layer 71 covers a part of the surface of the insulating substrate 70.
Step S62: an insulating layer is formed by laminating an insulating material on at least one side surface of the circuit board to be processed.
The insulating layer covers the whole surface of the circuit board to be processed, and particularly covers the conductor copper layer and the insulating substrate on the surface of the circuit board to be processed.
Referring specifically to fig. 7b, fig. 7b is a schematic structural diagram of an embodiment of step S62 in fig. 6. As shown in fig. 7b, an insulating layer 72 covers the first wiring copper layer 71 and the insulating substrate 70 on the surface of the circuit board to be processed.
Step S63: and (5) drilling the insulating layer and carrying out hole metallization treatment.
The method comprises the steps of drilling holes on the surface of the insulating layer to form the insulating layer covering part of the surface of the circuit board to be processed, and carrying out hole metallization treatment to facilitate the manufacture of the second circuit copper layer.
Specifically, referring to fig. 7c, fig. 7c is a schematic structural diagram of an embodiment of step S63 in fig. 6. As shown in fig. 7c, the insulating layer 72 partially covers a part of the surface of the first circuit copper layer 71 and the exposed surface of the insulating substrate 70.
Step S64: and manufacturing a metal copper layer on the surface of one side of the insulating layer, which is far away from the circuit board to be processed.
Specifically comprises the step of manufacturing a metal copper layer on the surface of an insulating layer by utilizing whole plate electroplating.
Referring specifically to fig. 7d, fig. 7d is a schematic structural diagram of an embodiment of step S64 in fig. 6. As shown in fig. 7d, the metal copper layer 73 covers the entire surface of the insulating layer 72 and the exposed surface of the first circuit copper layer 71.
Step S65: and attaching a photosensitive etching-resistant film on the surface of the metal copper layer.
Specifically, a photosensitive etching resist film is attached to the entire surface of the metallic copper layer remote from the insulating layer.
Referring to fig. 7e, fig. 7e is a schematic structural diagram of an embodiment of step S65 in fig. 6. As shown in fig. 7e, the photosensitive etching resist film 74 covers the entire surface of the metallic copper layer 73.
Step S66: and (3) covering the photosensitive etching-resistant film on part of the surface of the metal copper layer by using an exposure and development process, so that the metal copper layer which is not covered with the photosensitive etching-resistant film forms a patterned second preset position.
Specifically, the method comprises forming a second preset position by using the surface of the photosensitive etching-resistant film. The second preset position refers to a position of the surface of the metal copper layer, which is not covered by the photosensitive etching-resistant film.
Referring specifically to fig. 7f, fig. 7f is a schematic structural diagram of an embodiment of step S66 in fig. 6. As shown in fig. 7f, the photosensitive etching resist film 74 covers a portion of the surface of the metal copper layer 73 to form a circuit pattern, so that a second predetermined position is formed on the surface of the metal copper layer 73 not covered with the photosensitive etching resist film 74. The second preset position may be the same as or different from the first preset position, and is not limited herein.
Step S67: and performing deep cutting at a second preset position on the surface of the metal copper layer.
Wherein the depth of the deep cut is not less than 50% of the thickness of the metallic copper layer and not more than 95% of the thickness of the metallic copper layer. The deep cutting process comprises laser cutting, laser ablation, ion cutting, water jet cutting and the like. And forming a groove on the cut metal copper layer at a second preset position.
Referring specifically to fig. 7g, fig. 7g is a schematic structural diagram of an embodiment of step S67 in fig. 6. As shown in fig. 7g, the metallic copper layer 73 is recessed at a second predetermined position, and the depth of the recess is not less than 50% of the thickness of the metallic copper layer and not more than 95% of the thickness of the metallic copper layer. The photosensitive etching resist film 74 covers the region of the metallic copper layer 73 except for the second predetermined position.
Step S68: etching is carried out at a second preset position of the deeply cut metal copper layer, so that the metal copper layer forms a circuit copper layer.
And removing the metal copper layer at the second preset position by etching to expose the insulating layer, so that the metal copper layer forms a circuit copper layer.
Referring specifically to fig. 7h, fig. 7h is a schematic structural diagram of an embodiment of step S68 in fig. 6. As shown in fig. 7h, the metal copper layer 73 covers a part of the surface of the insulating layer 72, the photosensitive etching resist film 74 covers the surface of the metal copper layer 73, and the insulating layer 72 at the second preset position is exposed to form a circuit pattern.
Step S69: and removing the photosensitive etching-resistant film to obtain the circuit board containing the multilayer circuit copper layer.
And removing the photosensitive etching-resistant film to obtain the circuit board containing at least two circuit copper layers.
Referring to fig. 7i, fig. 7i is a schematic structural diagram of a circuit board with a copper layer as a multilayer circuit according to a second embodiment of the present application. As shown in fig. 7i, the circuit board includes an insulating substrate 70, first circuit copper layers 72 are formed on opposite side surfaces of the insulating substrate 70, an insulating layer 73 is covered on the surface of the first circuit copper layers 72, second circuit copper layers 72 are formed on the surface of the insulating layer 73, through holes are formed on the insulating layer 73, and the second circuit copper layers 72 are in circuit connection with the first circuit copper layers 71 through the through holes.
The beneficial effects of this embodiment are: by the method, the multi-layer circuit copper layer is sequentially manufactured on the circuit board to form the circuit board containing the multi-layer circuit copper layer, and the method is suitable for manufacturing the circuit copper layer with high thickness and high fine density by cutting and etching, so that side erosion of the circuit copper layer is reduced, and the fine density of the circuit copper layer is improved.
The application also provides a circuit board, and particularly referring to fig. 8, fig. 8 is a schematic structural diagram of an embodiment of the circuit board of the application. As shown in fig. 8, the circuit board includes an insulating substrate 80 and a conductor copper layer 81, and the conductor copper layer 81 covers a part of the surface of the insulating substrate 80 to form a wiring copper layer of a wiring pattern. In the present embodiment, the conductor copper layer 81 covers one side surface of the insulating substrate 80. In other embodiments, the conductive copper layer 81 covers opposite side surfaces of the insulating substrate 80.
The foregoing description is only of embodiments of the present application, and is not intended to limit the scope of the application, and all equivalent structures or equivalent processes using the descriptions and the drawings of the present application or directly or indirectly applied to other related technical fields are included in the scope of the application.
Claims (10)
1. A method for manufacturing a circuit board, the method comprising:
providing an insulating substrate;
manufacturing a conductor copper layer on at least one side of the insulating substrate;
deep cutting is carried out at a first preset position on the surface of the conductor copper layer;
etching the first preset position on the surface of the conductor copper layer after deep cutting to expose the insulating substrate at the first preset position, so that the conductor copper layer forms a circuit copper layer, and the circuit board is obtained.
2. The method of manufacturing a circuit board according to claim 1, wherein the depth of the deep cut is not less than 50% and not more than 95% of the thickness of the conductor copper layer.
3. The method of claim 1, wherein the deep cutting process comprises laser cutting, laser ablation, ion cutting, and water jet cutting.
4. The method for manufacturing a circuit board according to claim 1, wherein before the step of deep cutting at the first predetermined position on the surface of the conductor copper layer, the method further comprises:
attaching a photosensitive etching-resistant film on the surface of the conductor copper layer at a non-preset position;
after the step of etching the first preset position on the surface of the conductor copper layer after deep cutting, the method further comprises the following steps:
and removing the photosensitive etching-resistant film to obtain the circuit board.
5. The method of manufacturing a circuit board according to claim 4, wherein the step of attaching a photosensitive etching resist film at a non-preset position on the surface of the conductor copper layer comprises:
attaching a photosensitive etching-resistant film on the surface of one side of the conductor copper layer, which is far away from the insulating substrate;
and removing the photosensitive etching-resistant film at the first preset position on the surface of the conductor copper layer by using an exposure and development process so as to keep the photosensitive etching-resistant film at the non-preset position.
6. The method of manufacturing a circuit board according to claim 1, further comprising, after the step of obtaining the circuit board:
taking the circuit board as a circuit board to be processed, and laminating an insulating material on at least one side surface of the circuit board to be processed to form an insulating layer;
manufacturing a metal copper layer on the surface of one side of the insulating layer, which is far away from the circuit board to be processed;
deep cutting is carried out at a second preset position on the surface of the metal copper layer;
etching at a second preset position of the metal copper layer after deep cutting to form a circuit copper layer on the metal copper layer so as to obtain the circuit board with multiple layers of circuit copper layers.
7. The method of manufacturing a circuit board according to claim 6, wherein the step of laminating an insulating material on at least one side surface of the circuit board to be processed to form an insulating layer further comprises:
and drilling and hole metallization treatment are carried out on the insulating layer so as to enable the metal copper layer to be connected with the conductor copper layer.
8. The method of manufacturing a circuit board according to claim 6, wherein the step of manufacturing a metal copper layer on a surface of the insulating layer away from the circuit board to be processed comprises:
and the metal copper layer is arranged on the surface of one side of the insulating layer, which is far away from the circuit board to be processed, by utilizing a whole plate electroplating process.
9. The method of manufacturing a circuit board according to claim 6, wherein before the step of deep cutting at a predetermined position on the surface of the metal copper layer, the method comprises:
attaching a photosensitive etching-resistant film on the surface of the metal copper layer;
and covering part of the surface of the metal copper layer with the photosensitive etching-resistant film by using an exposure and development process, so that the metal copper layer which is not covered with the photosensitive etching-resistant film forms the patterned second preset position.
10. A circuit board, the circuit board comprising:
an insulating substrate;
and the conductor copper layer covers part of the surface of the insulating substrate to form a circuit copper layer.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210206616.9A CN116744563A (en) | 2022-03-02 | 2022-03-02 | Circuit board and manufacturing method thereof |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| CN202210206616.9A CN116744563A (en) | 2022-03-02 | 2022-03-02 | Circuit board and manufacturing method thereof |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| CN116744563A true CN116744563A (en) | 2023-09-12 |
Family
ID=87913817
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| CN202210206616.9A Pending CN116744563A (en) | 2022-03-02 | 2022-03-02 | Circuit board and manufacturing method thereof |
Country Status (1)
| Country | Link |
|---|---|
| CN (1) | CN116744563A (en) |
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2022
- 2022-03-02 CN CN202210206616.9A patent/CN116744563A/en active Pending
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