JPS63117135U - - Google Patents
Info
- Publication number
- JPS63117135U JPS63117135U JP791387U JP791387U JPS63117135U JP S63117135 U JPS63117135 U JP S63117135U JP 791387 U JP791387 U JP 791387U JP 791387 U JP791387 U JP 791387U JP S63117135 U JPS63117135 U JP S63117135U
- Authority
- JP
- Japan
- Prior art keywords
- data
- buffer
- time value
- host computer
- response time
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
- 239000000284 extract Substances 0.000 claims 1
- 238000000034 method Methods 0.000 claims 1
- 238000010586 diagram Methods 0.000 description 2
Landscapes
- Information Transfer Systems (AREA)
- Communication Control (AREA)
Description
第１図は本考案を実施した端末器のバツフア制
御装置のブロツク図、第２図は本考案の装置の動
作を表わすフローチヤート、第３図は受信バツフ
アの制御を表わす図である。
１……ホスト通信ライン、２……バツフア制御
回路、３１……データ・バツフア、３２……処理
時間バツフア、４……バツフア書き込みライン、
５……バツフア読み出しライン、６……応答時間
設定回路、７……端末制御回路、８……端末通信
ライン。
FIG. 1 is a block diagram of a buffer control device for a terminal device embodying the present invention, FIG. 2 is a flowchart showing the operation of the device of the present invention, and FIG. 3 is a diagram showing control of a receiving buffer. 1... Host communication line, 2... Buffer control circuit, 3 1 ... Data buffer, 3 2 ... Processing time buffer, 4... Buffer write line,
5...Buffer readout line, 6...Response time setting circuit, 7...Terminal control circuit, 8...Terminal communication line.
Claims (1)
る受信バツフアを有する端末器のバツフア制御装
置において、送信されたデータを格納するデータ
・バツフアと、送信されたデータを処理するのに
必要な処理時間値が格納される処理時間バツフア
と、予め応答時間値を設定する応答時間設定手段
とを設け、送信されたデータを前記データ・バツ
フアに格納する際に前記処理時間値を計算して前
記応答時間値より大きい時にｎｅａｒｌｙ ｆｕ
ｌｌ信号をホスト計算機へ出力し、前記データ・
バツフアからデータを取り出して処理が終了した
際にｎｅａｒｌｙ ｅｍｐｔｙ信号をホスト計算
機へ出力するバツフア制御回路とを備える端末器
のバツフア制御装置。 In a buffer control device of a terminal device that has a reception buffer that temporarily stores data sent from a host computer, a data buffer that stores the sent data and a processing time value necessary to process the sent data are stored. and a response time setting means for setting a response time value in advance, and when storing transmitted data in the data buffer, the processing time value is calculated to be greater than the response time value. Sometimes almost fu
The ll signal is output to the host computer, and the data
A buffer control device for a terminal device, comprising a buffer control circuit that extracts data from the buffer and outputs a nearly empty signal to a host computer when processing is completed.
Priority Applications (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP791387U JPS63117135U (en) | 1987-01-22 | 1987-01-22 |
Applications Claiming Priority (1)
| Application Number | Priority Date | Filing Date | Title |
|---|---|---|---|
| JP791387U JPS63117135U (en) | 1987-01-22 | 1987-01-22 |
Publications (1)
| Publication Number | Publication Date |
|---|---|
| JPS63117135U true JPS63117135U (en) | 1988-07-28 |
Family
ID=30791810
Family Applications (1)
| Application Number | Title | Priority Date | Filing Date |
|---|---|---|---|
| JP791387U Pending JPS63117135U (en) | 1987-01-22 | 1987-01-22 |
Country Status (1)
| Country | Link |
|---|---|
| JP (1) | JPS63117135U (en) |
-
1987
- 1987-01-22 JP JP791387U patent/JPS63117135U/ja active Pending
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