JPS63114154A - Lead frame - Google Patents

Lead frame

Info

Publication number
JPS63114154A
JPS63114154A JP25987186A JP25987186A JPS63114154A JP S63114154 A JPS63114154 A JP S63114154A JP 25987186 A JP25987186 A JP 25987186A JP 25987186 A JP25987186 A JP 25987186A JP S63114154 A JPS63114154 A JP S63114154A
Authority
JP
Japan
Prior art keywords
lead frame
island
large number
thermal expansion
difference
Prior art date
Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
Pending
Application number
JP25987186A
Other languages
Japanese (ja)
Inventor
Toshio Komiyama
込山 利男
Naoharu Senba
仙波 直治
Current Assignee (The listed assignees may be inaccurate. Google has not performed a legal analysis and makes no representation or warranty as to the accuracy of the list.)
NEC Corp
Original Assignee
NEC Corp
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by NEC Corp filed Critical NEC Corp
Priority to JP25987186A priority Critical patent/JPS63114154A/en
Publication of JPS63114154A publication Critical patent/JPS63114154A/en
Pending legal-status Critical Current

Links

Landscapes

  • Die Bonding (AREA)
  • Lead Frames For Integrated Circuits (AREA)

Abstract

PURPOSE:To prevent the generation of trouble due to the difference of the thermal expansion coefficients of a lead frame and a component part faststuck to the lead frame by forming a large number of cavities in an island section in the form of a lattice. CONSTITUTION:A large number of cavities 2 are bored to an island 1 in a lead frame in a latticed manner, and the island 1 is supported to an outer frame in the lead frame by hanging pins 3. Accordingly, the difference of the mutual thermal expansion coefficients of a molding resin, the lead frame, a substrate, a semiconductor element and metallic small-gage wires for connection can be absorbed, thus preventing the generation of trouble on quality such as the disconnection of circuit wirings, the cracks in the molding resin, etc.

Description

【発明の詳細な説明】 〔産業上の利用分野〕 本発明は主に樹脂封止型の半導体装置の外部リード付は
組立に使用でれるリードフレームに関する。
DETAILED DESCRIPTION OF THE INVENTION [Field of Industrial Application] The present invention mainly relates to a lead frame used for assembling resin-sealed semiconductor devices with external leads.

〔従来の技術〕[Conventional technology]

このようなリードフレームは一般に、半導体チップまた
は混成集積回路基板などが載置固着されるアイランド部
と、アイランド部の周囲を囲むように内端部が配置式n
た多数のリードから構成され、適当な金属板からエツチ
ング法またはプレスなどにより作シ出され、グイボンデ
ィング、金属細線接続用に貴金属メッキが施されている
Such a lead frame generally has an island part on which a semiconductor chip or a hybrid integrated circuit board is placed and fixed, and an inner end part arranged around the island part.
It is made from a suitable metal plate by etching or pressing, and is plated with a precious metal for bonding and fine metal wire connection.

第2図はこの種の従来のリードフレームのアイランド部
の平面図であシ、図において、アイランド部11はフラ
ットな板体であって、吊りピン3により IJ−ドフレ
ームの外枠(図示せず)に支持嘔nている。
FIG. 2 is a plan view of the island portion of this type of conventional lead frame. (2) is supported.

〔発明が解決しようとする問題点〕[Problem that the invention seeks to solve]

上述した従来のリードフレームはアイランドのサイズに
関係なく、1個の四角形の板体であり、アイランドサイ
ズが大きいと、モールド樹月旨、リードフレーム、基板
、半導体素子および接続用の金属線線間相互の熱膨張係
数の差によシ、回路接続の断線お、よびモールド樹脂ク
ラック等の問題が発生する。
The conventional lead frame described above is a single rectangular plate regardless of the size of the island, and if the island size is large, the space between the mold base, the lead frame, the substrate, the semiconductor element, and the metal wire for connection is large. Due to the difference in their thermal expansion coefficients, problems such as breakage of circuit connections and mold resin cracks occur.

〔問題点を解決するための手段〕[Means for solving problems]

本発明のリードフレームは、サイズの大きいアイランド
が必要である場合、アイランド部に格子状に多数の抜き
穴をあけることにより、このり−ドフレームとリードフ
レームに密着する部品との熱膨張係数の差による不都合
をなく丁のである。
In the lead frame of the present invention, when a large-sized island is required, by drilling a large number of holes in a grid pattern in the island portion, the coefficient of thermal expansion between the lead frame and the parts that are in close contact with the lead frame can be adjusted. This eliminates the inconvenience caused by differences.

〔実施例〕〔Example〕

次に本発明について図面音用いて説明金する。 Next, the present invention will be explained using drawings and sounds.

第1図は本発明の一実施例のアイランド部の平面図であ
る。リードフレームのアイランド1に格子状に多数の抜
き穴2があけられている。このアイランド1は吊シビン
3により、図示嘔nてぃないリードフレームの外枠に支
持嘔nている。
FIG. 1 is a plan view of an island portion according to an embodiment of the present invention. A large number of holes 2 are formed in a grid pattern in an island 1 of a lead frame. This island 1 is supported by a hanging sheath 3 on the outer frame of a lead frame (not shown).

〔発明の効果〕〔Effect of the invention〕

以上説明したように本発明は、リードフレームのアイラ
ンド部に格子器状に多数の抜き穴があけらj、ている仁
とにより、モールド樹月旨、リードフレーム、基板、牛
導体累子お工び接続用の金属Iv、IIl融間相互の熱
間相互数の差を吸収することができ、よって回路接続の
断線およびモールド樹脂クラック等の品質問題の発生を
防止できる効果がある。
As explained above, the present invention has a large number of punched holes in a lattice pattern in the island portion of the lead frame. It is possible to absorb the difference in the number of hot connections between metals Iv and IIl for connection and to prevent quality problems such as disconnections in circuit connections and mold resin cracks.

【図面の簡単な説明】[Brief explanation of the drawing]

第1図は本発明の一実施例に係るリードフレームのアイ
ランド部の平面図、第2図は従来のリードフレームのア
イランド部の平面図である。 l・・・・・・アイランド、2・・・・・・抜き大、3
・山・・吊ルピン。
FIG. 1 is a plan view of an island portion of a lead frame according to an embodiment of the present invention, and FIG. 2 is a plan view of an island portion of a conventional lead frame. l...Island, 2...Large without, 3
・Mountain...Hanging Lupin.

Claims (1)

【特許請求の範囲】[Claims] 半導体チップまたは回路基板が載置されるアイランド部
に、格子状に多数の抜き穴があけられていることを特徴
とするリードフレーム。
A lead frame is characterized by having a large number of punched holes in a grid pattern in the island portion on which a semiconductor chip or circuit board is mounted.
JP25987186A 1986-10-30 1986-10-30 Lead frame Pending JPS63114154A (en)

Priority Applications (1)

Application Number Priority Date Filing Date Title
JP25987186A JPS63114154A (en) 1986-10-30 1986-10-30 Lead frame

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP25987186A JPS63114154A (en) 1986-10-30 1986-10-30 Lead frame

Publications (1)

Publication Number Publication Date
JPS63114154A true JPS63114154A (en) 1988-05-19

Family

ID=17340111

Family Applications (1)

Application Number Title Priority Date Filing Date
JP25987186A Pending JPS63114154A (en) 1986-10-30 1986-10-30 Lead frame

Country Status (1)

Country Link
JP (1) JPS63114154A (en)

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